\doxysection{Class List}
Here are the classes, structs, unions and interfaces with brief descriptions\+:\begin{DoxyCompactList}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{Com\+Square\+::\+A\+P\+U\+::\+A\+PU}} }{\pageref{classComSquare_1_1APU_1_1APU}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge}{Com\+Square\+::\+Cartridge\+::\+Cartridge}} \\*Contains the rom\textquotesingle{}s memory/instructions }{\pageref{classComSquare_1_1Cartridge_1_1Cartridge}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{Com\+Square\+::\+C\+P\+U\+::\+C\+PU}} \\*The main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} }{\pageref{classComSquare_1_1CPU_1_1CPU}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+SP}} }{\pageref{classComSquare_1_1APU_1_1DSP_1_1DSP}}{}
\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header}{Com\+Square\+::\+Cartridge\+::\+Header}} }{\pageref{structComSquare_1_1Cartridge_1_1Header}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{Com\+Square\+::\+Memory\+::\+I\+Memory}} \\*Common interface implemented by all components mapping memory }{\pageref{classComSquare_1_1Memory_1_1IMemory}}{}
\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters}{Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers}} }{\pageref{structComSquare_1_1APU_1_1InternalRegisters}}{}
\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters}{Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers}} \\*Struct containing internal registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} }{\pageref{structComSquare_1_1CPU_1_1InternalRegisters}}{}
\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors}{Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors}} }{\pageref{structComSquare_1_1Cartridge_1_1InterruptVectors}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1InvalidAction}{Com\+Square\+::\+Invalid\+Action}} \\*Exception thrown when someone tries to load an invalid rom }{\pageref{classComSquare_1_1InvalidAction}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Com\+Square\+::\+Invalid\+Address}} \\*Exception thrown when trying to read/write to an invalid address }{\pageref{classComSquare_1_1InvalidAddress}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1InvalidRomException}{Com\+Square\+::\+Invalid\+Rom\+Exception}} \\*Exception thrown when someone tries to load an invalid rom }{\pageref{classComSquare_1_1InvalidRomException}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}} \\*Superset of the \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at F\+F\+FF) }{\pageref{classComSquare_1_1Memory_1_1IRectangleMemory}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer}{Com\+Square\+::\+Renderer\+::\+I\+Renderer}} }{\pageref{classComSquare_1_1Renderer_1_1IRenderer}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Com\+Square\+::\+Memory\+::\+Memory\+Bus}} \\*The memory bus is the component responsible of mapping addresses to components address and transmitting the data }{\pageref{classComSquare_1_1Memory_1_1MemoryBus}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow}{Com\+Square\+::\+Memory\+::\+Memory\+Shadow}} }{\pageref{classComSquare_1_1Memory_1_1MemoryShadow}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1NotImplementedException}{Com\+Square\+::\+Not\+Implemented\+Exception}} \\*When this is thrown, it means that we should work more }{\pageref{classComSquare_1_1NotImplementedException}}{}
\item\contentsline{section}{\mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p}{Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p}} \\*The Processor status register; }{\pageref{unionComSquare_1_1CPU_1_1Registers_1_1p}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{Com\+Square\+::\+P\+P\+U\+::\+P\+PU}} \\*The struct containing all the registers the \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}} }{\pageref{classComSquare_1_1PPU_1_1PPU}}{}
\item\contentsline{section}{\mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}{Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw}} \\*Program Status Word register }{\pageref{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram}{Com\+Square\+::\+Ram\+::\+Ram}} }{\pageref{classComSquare_1_1Ram_1_1Ram}}{}
\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers}{Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers}} \\*All the registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}} }{\pageref{structComSquare_1_1APU_1_1DSP_1_1Registers}}{}
\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1APU_1_1Registers}{Com\+Square\+::\+A\+P\+U\+::\+Registers}} }{\pageref{structComSquare_1_1APU_1_1Registers}}{}
\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Com\+Square\+::\+C\+P\+U\+::\+Registers}} \\*Struct containing registers for the main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} }{\pageref{structComSquare_1_1CPU_1_1Registers}}{}
\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer}{Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer}} }{\pageref{classComSquare_1_1Renderer_1_1SFRenderer}}{}
\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1SNES}{Com\+Square\+::\+S\+N\+ES}} \\*Container of all the components of the \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} }{\pageref{structComSquare_1_1SNES}}{}
\end{DoxyCompactList}
