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Implementing some addressing modes

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This commit is contained in:
AnonymusRaccoon
2020-02-10 17:50:48 +01:00
parent f516e7ec66
commit 04ea6f25d0
3 changed files with 19 additions and 10 deletions
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9
tests/CPU/testAddressingMode.cpp
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@@ -38,8 +38,7 @@ Test(AddrMode, Direct)
pair.second.cartridge->_data[0] = 0x15;
pair.second.cpu->_registers.pac = 0x808000;
pair.second.cpu->_registers.d = 0x1000;
cr_assert_eq(pair.second.cpu->_getDirectAddr(), 0x1015, "Returned address was %i but was expecting 0x1015.",
pair.second.cpu->_getDirectAddr());
cr_assert_eq(pair.second.cpu->_getDirectAddr(), 0x1015, "Returned address was %i but was expecting 0x1015.", pair.second.cpu->_getDirectAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808001);
}
@@ -59,7 +58,7 @@ Test(AddrMode, AbsoluteLong)
auto pair = Init();
pair.second.cartridge->_data[0] = 0x1C;
pair.second.cartridge->_data[1] = 0x90;
pair.second.cartridge->_data[1] = 0xFF;
pair.second.cartridge->_data[2] = 0xFF;
pair.second.cpu->_registers.pac = 0x808000;
pair.second.cpu->_registers.dbr = 0x88;
cr_assert_eq(pair.second.cpu->_getAbsoluteLongAddr(), 0xFF901C, "Returned address was %i but was expecting 0xFF901C.", pair.second.cpu->_getAbsoluteLongAddr());
@@ -70,8 +69,8 @@ Test(AddrMode, DirectIndirectIndexed)
{
auto pair = Init();
pair.second.cartridge->_data[0] = 0x10;
pair.second.sram->_data[0x1000] = 0x30;
pair.second.sram->_data[0x1001] = 0x40;
pair.second.wram->_data[0x1000] = 0x30;
pair.second.wram->_data[0x1001] = 0x40;
pair.second.cpu->_registers.pac = 0x808000;
pair.second.cpu->_registers.dbr = 0x80;
pair.second.cpu->_registers.y = 0x0001;