From 31aa3c843ea8b21fbfecdd99e43bb03fe39384a2 Mon Sep 17 00:00:00 2001
From: AnonymusRaccoon
Date: Fri, 14 Feb 2020 11:22:38 +0100
Subject: [PATCH] Implementing the REP instruction
---
sources/CPU/CPU.cpp | 2 +
sources/CPU/CPU.hpp | 8 +++-
.../CPU/Instructions/InternalInstruction.cpp | 13 +++++-
tests/CPU/testInternal.cpp | 42 +++++++++++++++++++
4 files changed, 61 insertions(+), 4 deletions(-)
diff --git a/sources/CPU/CPU.cpp b/sources/CPU/CPU.cpp
index d6e8e70..d7b8492 100644
--- a/sources/CPU/CPU.cpp
+++ b/sources/CPU/CPU.cpp
@@ -279,6 +279,8 @@ namespace ComSquare::CPU
case Instructions::SEP: this->SEP(this->_getImmediateAddr()); return 3;
+ case Instructions::REP: this->REP(this->_getImmediateAddr()); return 3;
+
default:
throw InvalidOpcode("CPU", opcode);
}
diff --git a/sources/CPU/CPU.hpp b/sources/CPU/CPU.hpp
index cdbc757..f094de5 100644
--- a/sources/CPU/CPU.hpp
+++ b/sources/CPU/CPU.hpp
@@ -260,7 +260,9 @@ namespace ComSquare::CPU
LDY_ABSY = 0xBC,
LDY_DPY = 0xB4,
- SEP = 0xE2
+ SEP = 0xE2,
+
+ REP = 0xC2
};
//! @brief The main CPU
@@ -360,7 +362,9 @@ namespace ComSquare::CPU
//! @brief Load the Y index register from memory.
void LDY(uint24_t addr);
//! @brief Set status bits.
- void SEP(uint24_t addr);
+ void SEP(uint24_t valueAddr);
+ //! @brief Reset status bits.
+ void REP(uint24_t valueAddr);
public:
explicit CPU(std::shared_ptr bus, Cartridge::Header &cartridgeHeader);
CPU(const CPU &) = default;
diff --git a/sources/CPU/Instructions/InternalInstruction.cpp b/sources/CPU/Instructions/InternalInstruction.cpp
index 4fb7490..652b82e 100644
--- a/sources/CPU/Instructions/InternalInstruction.cpp
+++ b/sources/CPU/Instructions/InternalInstruction.cpp
@@ -6,8 +6,17 @@
namespace ComSquare::CPU
{
- void CPU::SEP(uint24_t addr)
+ void CPU::SEP(uint24_t valueAddr)
{
- this->_registers.p.flags |= this->_bus->read(addr);
+ this->_registers.p.flags |= this->_bus->read(valueAddr);
+ }
+
+ void CPU::REP(uint24_t valueAddr)
+ {
+ this->_registers.p.flags &= ~this->_bus->read(valueAddr);
+ if (this->_isEmulationMode) {
+ this->_registers.p.x_b = true;
+ this->_registers.p.m = true;
+ }
}
}
\ No newline at end of file
diff --git a/tests/CPU/testInternal.cpp b/tests/CPU/testInternal.cpp
index 998518d..85a2e6c 100644
--- a/tests/CPU/testInternal.cpp
+++ b/tests/CPU/testInternal.cpp
@@ -27,4 +27,46 @@ Test(SEP, setsome)
pair.second.cpu->SEP(0x0);
auto data = pair.second.cpu->_registers.p.flags;
cr_assert_eq(data, 0b11110101, "The flag should be 245 but it was %i", data);
+}
+
+Test(REP, resetall)
+{
+ auto pair = Init();
+ pair.second.cpu->_isEmulationMode = false;
+ pair.second.wram->_data[0] = 0xFF;
+ pair.second.cpu->REP(0x0);
+ auto data = pair.second.cpu->_registers.p.flags;
+ cr_assert_eq(data, 0x00, "The flag should be 0x00 but it was %x", data);
+}
+
+Test(REP, resetsome)
+{
+ auto pair = Init();
+ pair.second.cpu->_isEmulationMode = false;
+ pair.second.wram->_data[0] = 0b01000000;
+ pair.second.cpu->_registers.p.flags = 0b01000000;
+ pair.second.cpu->REP(0x0);
+ auto data = pair.second.cpu->_registers.p.flags;
+ cr_assert_eq(data, 0x0, "The flag should be 0 but it was %x", data);
+}
+
+Test(REP, resetallEmulation)
+{
+ auto pair = Init();
+ pair.second.cpu->_isEmulationMode = true;
+ pair.second.wram->_data[0] = 0xFF;
+ pair.second.cpu->REP(0x0);
+ auto data = pair.second.cpu->_registers.p.flags;
+ cr_assert_eq(data, 0b00110000, "The flag should be 0b00110000 but it was %x", data);
+}
+
+Test(REP, resetsomeEmulation)
+{
+ auto pair = Init();
+ pair.second.cpu->_isEmulationMode = true;
+ pair.second.wram->_data[0] = 0b01000001;
+ pair.second.cpu->_registers.p.flags = 0b01000101;
+ pair.second.cpu->REP(0x0);
+ auto data = pair.second.cpu->_registers.p.flags;
+ cr_assert_eq(data, 0b00110100, "The flag should be 0b00110100 but it was %x", data);
}
\ No newline at end of file