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struct  ComSquare::APU::InternalRegisters
 
union  ComSquare::APU::InternalRegisters::psw
 Program Status Word register. More...
 
struct  ComSquare::APU::Registers
 
class  ComSquare::APU::APU
 
+ + + + + +

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APU.hpp
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+Go to the documentation of this file.
1 //
+
2 // Created by Melefo on 24/01/2020.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_APU_HPP
+
6 #define COMSQUARE_APU_HPP
+
7 
+
8 #include <memory>
+
9 #include "../DSP/DSP.hpp"
+
10 #include "../Memory/IMemory.hpp"
+
11 
+
12 namespace ComSquare::APU
+
13 {
+ +
15 
+
17  uint8_t x;
+
18 
+
20  union {
+
21  struct {
+
23  uint8_t a;
+
25  uint8_t y;
+
26  };
+
27  uint16_t ya;
+
28  };
+
29 
+
31  uint8_t sp;
+
32 
+
34  union {
+
35  struct {
+
36  uint8_t pcl;
+
37  uint8_t pch;
+
38  };
+
39  uint16_t pc;
+
40  };
+
41 
+
43  union psw {
+
45  bool n : 1;
+
47  bool v : 1;
+
49  bool p : 1;
+
51  bool b : 1;
+
53  bool h : 1;
+
55  bool i : 1;
+
57  bool z : 1;
+
59  bool c : 1;
+
60  };
+
61  };
+
62 
+
63  struct Registers
+
64  {
+
66  uint8_t unknown;
+
67 
+
69  uint8_t ctrlreg;
+
70 
+
72  uint8_t dspregAddr;
+
74  uint8_t dspregData;
+
75 
+
77  uint8_t port0;
+
79  uint8_t port1;
+
81  uint8_t port2;
+
83  uint8_t port3;
+
84 
+
86  uint8_t regmem1;
+
88  uint8_t regmem2;
+
89 
+
91  uint8_t timer0;
+
93  uint8_t timer1;
+
95  uint8_t timer2;
+
96 
+
98  uint8_t counter0;
+
100  uint8_t counter1;
+
102  uint8_t counter2;
+
103 
+
104  };
+
105 
+
106  class APU : public Memory::IMemory {
+
107  private:
+ + +
112 
+
114  std::shared_ptr<DSP::DSP> _dsp;
+
115  public:
+
116  explicit APU();
+
117 
+
122  uint8_t read(uint24_t addr) override;
+
127  void write(uint24_t addr, uint8_t data) override;
+
128  bool update();
+
129  };
+
130 }
+
131 
+
132 #endif //COMSQUARE_APU_HPP
+
+
ComSquare::APU::InternalRegisters::psw::h
bool h
Half carry flag.
Definition: APU.hpp:53
+
ComSquare::APU::Registers::port0
uint8_t port0
Port 0 register.
Definition: APU.hpp:77
+
ComSquare::APU::APU::_internalRegisters
InternalRegisters _internalRegisters
Internal registers of the CPU (accessible from the bus via addr $4200 to $421F).
Definition: APU.hpp:111
+
ComSquare::APU::InternalRegisters::psw
Program Status Word register.
Definition: APU.hpp:43
+
ComSquare::APU::InternalRegisters::pcl
uint8_t pcl
Definition: APU.hpp:36
+
ComSquare::APU::Registers::regmem2
uint8_t regmem2
Another Regular Memory register.
Definition: APU.hpp:88
+
ComSquare::APU::Registers::dspregData
uint8_t dspregData
DSP Register data register.
Definition: APU.hpp:74
+
ComSquare::APU::InternalRegisters::y
uint8_t y
The Y Index register.
Definition: APU.hpp:25
+
ComSquare::APU::APU::_dsp
std::shared_ptr< DSP::DSP > _dsp
The DSP component used to produce sound.
Definition: APU.hpp:114
+
ComSquare::APU::Registers::counter1
uint8_t counter1
Counter-1 register.
Definition: APU.hpp:100
+
ComSquare::APU::InternalRegisters::psw::z
bool z
Zero flag.
Definition: APU.hpp:57
+
ComSquare::APU::Registers::regmem1
uint8_t regmem1
Regular Memory register.
Definition: APU.hpp:86
+
ComSquare::APU::InternalRegisters::sp
uint8_t sp
The Stack pointer register.
Definition: APU.hpp:31
+
ComSquare::APU::InternalRegisters
Definition: APU.hpp:14
+
ComSquare::APU::InternalRegisters::x
uint8_t x
The X index register.
Definition: APU.hpp:17
+
ComSquare::APU::Registers::port1
uint8_t port1
Port 1 register.
Definition: APU.hpp:79
+
ComSquare::APU::Registers::counter0
uint8_t counter0
Counter-0 register.
Definition: APU.hpp:98
+
ComSquare::APU
Definition: APU.cpp:9
+
ComSquare::APU::InternalRegisters::psw::v
bool v
Overflow flag.
Definition: APU.hpp:47
+
ComSquare::APU::Registers::port2
uint8_t port2
Port 2 register.
Definition: APU.hpp:81
+
ComSquare::APU::APU::read
uint8_t read(uint24_t addr) override
Read from the internal APU register.
Definition: APU.cpp:14
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::APU::Registers::unknown
uint8_t unknown
An undocumented register.
Definition: APU.hpp:66
+
ComSquare::Memory::IMemory
Common interface implemented by all components mapping memory.
Definition: IMemory.hpp:16
+
ComSquare::APU::Registers::ctrlreg
uint8_t ctrlreg
Control Register register.
Definition: APU.hpp:69
+
ComSquare::APU::APU::update
bool update()
Definition: APU.cpp:93
+
ComSquare::APU::Registers::timer2
uint8_t timer2
Timer-2 register.
Definition: APU.hpp:95
+
ComSquare::APU::Registers::port3
uint8_t port3
Port 3 register.
Definition: APU.hpp:83
+
ComSquare::APU::InternalRegisters::psw::b
bool b
Break flag.
Definition: APU.hpp:51
+
ComSquare::APU::InternalRegisters::psw::c
bool c
Carry flag.
Definition: APU.hpp:59
+
ComSquare::APU::InternalRegisters::psw::p
bool p
Direct page flag.
Definition: APU.hpp:49
+
ComSquare::APU::InternalRegisters::ya
uint16_t ya
Definition: APU.hpp:27
+
ComSquare::APU::APU::APU
APU()
Definition: APU.cpp:11
+
ComSquare::APU::APU::_registers
Registers _registers
All the registers of the APU CPU.
Definition: APU.hpp:109
+
ComSquare::APU::Registers::counter2
uint8_t counter2
Counter-2 register.
Definition: APU.hpp:102
+
ComSquare::APU::APU::write
void write(uint24_t addr, uint8_t data) override
Write data to the internal APU register.
Definition: APU.cpp:46
+
ComSquare::APU::APU
Definition: APU.hpp:106
+
ComSquare::APU::Registers
Definition: APU.hpp:63
+
ComSquare::APU::InternalRegisters::a
uint8_t a
The Accumulator register.
Definition: APU.hpp:23
+
ComSquare::APU::InternalRegisters::psw::n
bool n
Negative flag.
Definition: APU.hpp:45
+
ComSquare::APU::Registers::timer1
uint8_t timer1
Timer-1 register.
Definition: APU.hpp:93
+
ComSquare::APU::InternalRegisters::pc
uint16_t pc
Definition: APU.hpp:39
+
ComSquare::APU::InternalRegisters::pch
uint8_t pch
Definition: APU.hpp:37
+
ComSquare::APU::Registers::dspregAddr
uint8_t dspregAddr
DSP Register Address register.
Definition: APU.hpp:72
+
ComSquare::APU::InternalRegisters::psw::i
bool i
Interrupt enabled flag.
Definition: APU.hpp:55
+
ComSquare::APU::Registers::timer0
uint8_t timer0
Timer-0 register.
Definition: APU.hpp:91
+ + + + diff --git a/docs/html/CMakeCCompilerId_8c.html b/docs/html/CMakeCCompilerId_8c.html new file mode 100644 index 0000000..6e82623 --- /dev/null +++ b/docs/html/CMakeCCompilerId_8c.html @@ -0,0 +1,354 @@ + + + + + + + +ComSquare: cmake-build-debug/CMakeFiles/3.15.3/CompilerIdC/CMakeCCompilerId.c File Reference + + + + + + + + + +
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+
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+
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+
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+
('0' + ((n)>>20 & 0xF)), \
+
('0' + ((n)>>16 & 0xF)), \
+
('0' + ((n)>>12 & 0xF)), \
+
('0' + ((n)>>8 & 0xF)), \
+
('0' + ((n)>>4 & 0xF)), \
+
('0' + ((n) & 0xF))
+
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#define DEC(n)
 
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#define DEC( n)
+
+Value:
('0' + (((n) / 10000000)%10)), \
+
('0' + (((n) / 1000000)%10)), \
+
('0' + (((n) / 100000)%10)), \
+
('0' + (((n) / 10000)%10)), \
+
('0' + (((n) / 1000)%10)), \
+
('0' + (((n) / 100)%10)), \
+
('0' + (((n) / 10)%10)), \
+
('0' + ((n) % 10))
+
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+ +

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+ +
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#define HEX( n)
+
+Value:
('0' + ((n)>>28 & 0xF)), \
+
('0' + ((n)>>24 & 0xF)), \
+
('0' + ((n)>>20 & 0xF)), \
+
('0' + ((n)>>16 & 0xF)), \
+
('0' + ((n)>>12 & 0xF)), \
+
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+
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+
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+
+
+ + + + diff --git a/docs/html/CMakeCache_8txt.html b/docs/html/CMakeCache_8txt.html new file mode 100644 index 0000000..bd9baec --- /dev/null +++ b/docs/html/CMakeCache_8txt.html @@ -0,0 +1,1852 @@ + + + + + + + +ComSquare: cmake-build-debug/CMakeCache.txt File Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ +
+
+
+Functions | +Variables
+
+
cmake-build-debug/CMakeCache.txt File Reference
+
+
+ + + + + + + + + + + + +

+Functions

 __has_include (STR)
 
 __has_include__ (STR)
 
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usr lib gcc x86_64 pc linux gnu includebackward
 
usr lib gcc x86_64 pc linux gnu include
 
usr lib gcc x86_64 pc linux gnu include fixed
 
usr include CMAKE_EXTRA_GENERATOR_C_SYSTEM_DEFINED_MACROS
 
CMAKE_EXTRA_GENERATOR_C_SYSTEM_INCLUDE_DIRS
 
+

Function Documentation

+ +

◆ __has_include()

+ +
+
+ + + + + + + + +
__has_include (STR )
+
+ +
+
+ +

◆ __has_include__()

+ +
+
+ + + + + + + + +
__has_include__ (STR )
+
+ +
+
+ +

◆ __has_include_next()

+ +
+
+ + + + + + + + +
__has_include_next (STR )
+
+ +
+
+ +

◆ __has_include_next__()

+ +
+
+ + + + + + + + +
__has_include_next__ (STR )
+
+ +
+
+ +

◆ __INTMAX_C()

+ +
+
+ + + + + + + + +
__INTMAX_C ()
+
+ +
+
+

Variable Documentation

+ +

◆ __ATOMIC_ACQ_REL

+ +
+
+ + + + +
__ATOMIC_ACQ_REL
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+ +
+
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◆ __ATOMIC_ACQUIRE

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+
+ + + + +
__ATOMIC_ACQUIRE
+
+ +
+
+ +

◆ __ATOMIC_CONSUME

+ +
+
+ + + + +
__ATOMIC_CONSUME
+
+ +
+
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◆ __ATOMIC_RELAXED

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+
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__ATOMIC_RELAXED
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◆ __ATOMIC_RELEASE

+ +
+
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__ATOMIC_RELEASE
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+
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◆ __ATOMIC_SEQ_CST

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+
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__ATOMIC_SEQ_CST
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__BIGGEST_ALIGNMENT__
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__CHAR_BIT__
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__FINITE_MATH_ONLY__
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__FLOAT_WORD_ORDER__
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◆ __GNUC__

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__GNUC__
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__GNUC_MINOR__
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__GNUC_PATCHLEVEL__
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CMAKE_AR __pad0__
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__PIC__
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__SIG_ATOMIC_TYPE__
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__SIZEOF_DOUBLE__
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+ +
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__SIZEOF_FLOAT__
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+ +
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+ +
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+ +
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__SIZEOF_LONG_DOUBLE__
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+ +
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__SIZEOF_LONG_LONG__
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__SIZEOF_POINTER__
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+ +
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__SIZEOF_SHORT__
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+ +
+
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__SIZEOF_SIZE_T__
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+ +
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◆ __STDC_HOSTED__

+ +
+
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__STDC_HOSTED__
+
+ +
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+ +

◆ __STDC_UTF_16__

+ +
+
+ + + + +
__STDC_UTF_16__
+
+ +
+
+ +

◆ __STDC_UTF_32__

+ +
+
+ + + + +
__STDC_UTF_32__
+
+ +
+
+ +

◆ __STDC_VERSION__

+ +
+
+ + + + +
__STDC_VERSION__
+
+ +
+
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◆ __UINT16_TYPE__

+ +
+
+ + + + +
__UINT16_TYPE__
+
+ +
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◆ __UINT32_TYPE__

+ +
+
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__UINT32_TYPE__
+
+ +
+
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◆ __UINT64_TYPE__

+ +
+
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__UINT64_TYPE__
+
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+
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◆ __UINT8_TYPE__

+ +
+
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__UINT8_TYPE__
+
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+
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◆ __UINT_FAST16_TYPE__

+ +
+
+ + + + +
__UINT_FAST16_TYPE__
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◆ __UINT_FAST32_TYPE__

+ +
+
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__UINT_FAST32_TYPE__
+
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__UINT_FAST64_TYPE__
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__UINT_FAST8_TYPE__
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__UINT_LEAST16_TYPE__
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__UINT_LEAST32_TYPE__
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◆ __UINT_LEAST64_TYPE__

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__UINT_LEAST64_TYPE__
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+ +
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__UINT_LEAST8_TYPE__
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◆ __UINTMAX_TYPE__

+ +
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__UINTMAX_TYPE__
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◆ __UINTPTR_TYPE__

+ +
+
+ + + + +
__UINTPTR_TYPE__
+
+ +
+
+ +

◆ __VERSION__

+ +
+
+ + + + +
__VERSION__
+
+ +
+
+ +

◆ __WCHAR_MAX__

+ +
+
+ + + + +
__WCHAR_MAX__
+
+ +
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◆ __WCHAR_MIN__

+ +
+
+ + + + +
__WCHAR_MIN__
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◆ __WCHAR_TYPE__

+ +
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__WCHAR_TYPE__
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__WCHAR_WIDTH__
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__WINT_MAX__
+
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◆ __WINT_MIN__

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__WINT_MIN__
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◆ __WINT_TYPE__

+ +
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__WINT_TYPE__
+
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◆ __WINT_WIDTH__

+ +
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__WINT_WIDTH__
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+
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◆ _LP64

+ +
+
+ + + + +
_LP64
+
+ +
+
+ +

◆ backward

+ +
+
+ + + + +
usr lib gcc x86_64 pc linux gnu include c backward
+
+ +
+
+ +

◆ char

+ +
+
+ + + + +
unsigned char
+
+ +
+
+ +

◆ CMAKE_EXTRA_GENERATOR_C_SYSTEM_DEFINED_MACROS

+ +
+
+ + + + +
usr include CMAKE_EXTRA_GENERATOR_C_SYSTEM_DEFINED_MACROS
+
+ +
+
+ +

◆ CMAKE_EXTRA_GENERATOR_C_SYSTEM_INCLUDE_DIRS

+ +
+
+ + + + +
c CMAKE_EXTRA_GENERATOR_C_SYSTEM_INCLUDE_DIRS
+
+ +
+
+ +

◆ CMAKE_EXTRA_GENERATOR_CXX_SYSTEM_INCLUDE_DIRS

+ +
+
+ + + + +
c CMAKE_EXTRA_GENERATOR_CXX_SYSTEM_INCLUDE_DIRS
+
+ +
+
+ +

◆ fixed

+ +
+
+ + + + +
usr lib gcc x86_64 pc linux gnu include fixed
+
+ +
+
+ +

◆ gnu

+ +
+
+ + + + +
usr lib gcc x86_64 pc linux gnu include c x86_64 pc linux gnu
+
+ +
+
+ +

◆ include

+ +
+
+ + + + +
usr local include
+
+ +
+
+ +

◆ int

+ +
+
+ + + + +
long unsigned int
+
+ +
+
+
+ + + + diff --git a/docs/html/CMakeLists_8txt.html b/docs/html/CMakeLists_8txt.html new file mode 100644 index 0000000..df7f6a3 --- /dev/null +++ b/docs/html/CMakeLists_8txt.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: CMakeLists.txt File Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ +
+
+
+
CMakeLists.txt File Reference
+
+
+
+ + + + diff --git a/docs/html/CPU_8cpp.html b/docs/html/CPU_8cpp.html new file mode 100644 index 0000000..f4da42f --- /dev/null +++ b/docs/html/CPU_8cpp.html @@ -0,0 +1,116 @@ + + + + + + + +ComSquare: sources/CPU/CPU.cpp File Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Namespaces
+
+
CPU.cpp File Reference
+
+
+
#include "CPU.hpp"
+#include <utility>
+#include "../Exceptions/NotImplementedException.hpp"
+#include "../Exceptions/InvalidAddress.hpp"
+
+Include dependency graph for CPU.cpp:
+
+
+ + + + + + + + + + + + + + + + + +
+
+ + + + + +

+Namespaces

 ComSquare
 
 ComSquare::CPU
 
+
+ + + + diff --git a/docs/html/CPU_8cpp__incl.map b/docs/html/CPU_8cpp__incl.map new file mode 100644 index 0000000..aa0138b --- /dev/null +++ b/docs/html/CPU_8cpp__incl.map @@ -0,0 +1,17 @@ + + + + + + + + + + + + + + + + + diff --git a/docs/html/CPU_8cpp__incl.md5 b/docs/html/CPU_8cpp__incl.md5 new file mode 100644 index 0000000..5f4ba8c --- /dev/null +++ b/docs/html/CPU_8cpp__incl.md5 @@ -0,0 +1 @@ +e817065913d3efa5f8313eb208084a50 \ No newline at end of file diff --git a/docs/html/CPU_8cpp__incl.png b/docs/html/CPU_8cpp__incl.png new file mode 100644 index 0000000..b8d0636 Binary files /dev/null and b/docs/html/CPU_8cpp__incl.png differ diff --git a/docs/html/CPU_8hpp.html b/docs/html/CPU_8hpp.html new file mode 100644 index 0000000..4a4ce45 --- /dev/null +++ b/docs/html/CPU_8hpp.html @@ -0,0 +1,138 @@ + + + + + + + +ComSquare: sources/CPU/CPU.hpp File Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Classes | +Namespaces
+
+
CPU.hpp File Reference
+
+
+
#include "../Memory/IMemory.hpp"
+#include "../Memory/MemoryBus.hpp"
+#include "../Models/Ints.hpp"
+
+Include dependency graph for CPU.hpp:
+
+
+ + + + + + + + + +
+
+This graph shows which files directly or indirectly include this file:
+
+
+ + + + + + + + +
+
+

Go to the source code of this file.

+ + + + + + + + + + + + + + +

+Classes

struct  ComSquare::CPU::Registers
 Struct containing registers for the main CPU. More...
 
union  ComSquare::CPU::Registers::p
 The Processor status register;. More...
 
struct  ComSquare::CPU::InternalRegisters
 Struct containing internal registers of the CPU. More...
 
class  ComSquare::CPU::CPU
 The main CPU. More...
 
+ + + + + +

+Namespaces

 ComSquare
 
 ComSquare::CPU
 
+
+ + + + diff --git a/docs/html/CPU_8hpp__dep__incl.map b/docs/html/CPU_8hpp__dep__incl.map new file mode 100644 index 0000000..67f48f9 --- /dev/null +++ b/docs/html/CPU_8hpp__dep__incl.map @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/docs/html/CPU_8hpp__dep__incl.md5 b/docs/html/CPU_8hpp__dep__incl.md5 new file mode 100644 index 0000000..945291f --- /dev/null +++ b/docs/html/CPU_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +e372c02e7bb206243d2bcd0f01ab70ec \ No newline at end of file diff --git a/docs/html/CPU_8hpp__dep__incl.png b/docs/html/CPU_8hpp__dep__incl.png new file mode 100644 index 0000000..9d965bf Binary files /dev/null and b/docs/html/CPU_8hpp__dep__incl.png differ diff --git a/docs/html/CPU_8hpp__incl.map b/docs/html/CPU_8hpp__incl.map new file mode 100644 index 0000000..d3891cb --- /dev/null +++ b/docs/html/CPU_8hpp__incl.map @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/docs/html/CPU_8hpp__incl.md5 b/docs/html/CPU_8hpp__incl.md5 new file mode 100644 index 0000000..217aa91 --- /dev/null +++ b/docs/html/CPU_8hpp__incl.md5 @@ -0,0 +1 @@ +80e3b5a5821dd0a515e562dae457396b \ No newline at end of file diff --git a/docs/html/CPU_8hpp__incl.png b/docs/html/CPU_8hpp__incl.png new file mode 100644 index 0000000..3179008 Binary files /dev/null and b/docs/html/CPU_8hpp__incl.png differ diff --git a/docs/html/CPU_8hpp_source.html b/docs/html/CPU_8hpp_source.html new file mode 100644 index 0000000..23e6c79 --- /dev/null +++ b/docs/html/CPU_8hpp_source.html @@ -0,0 +1,297 @@ + + + + + + + +ComSquare: sources/CPU/CPU.hpp Source File + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
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+
+
+
CPU.hpp
+
+
+Go to the documentation of this file.
1 //
+
2 // Created by anonymus-raccoon on 1/24/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_CPU_HPP
+
6 #define COMSQUARE_CPU_HPP
+
7 
+
8 #include "../Memory/IMemory.hpp"
+
9 #include "../Memory/MemoryBus.hpp"
+
10 #include "../Models/Ints.hpp"
+
11 
+
12 namespace ComSquare::CPU
+
13 {
+
15  struct Registers {
+
17  union {
+
18  struct {
+
19  uint8_t ah;
+
20  uint8_t al;
+
21  };
+
22  uint16_t a;
+
23  };
+
25  uint8_t dbr;
+
27  union {
+
28  struct {
+
29  uint8_t dh;
+
30  uint8_t dl;
+
31  };
+
32  uint16_t d;
+
33  };
+
35  uint8_t k;
+
37  union {
+
38  struct {
+
39  uint8_t pch;
+
40  uint8_t pcl;
+
41  };
+
42  uint16_t pc;
+
43  };
+
45  union {
+
46  struct {
+
47  uint8_t sh;
+
48  uint8_t sl;
+
49  };
+
50  uint16_t s;
+
51  };
+
53  union {
+
54  struct {
+
55  uint8_t xh;
+
56  uint8_t xl;
+
57  };
+
58  uint16_t x;
+
59  };
+
61  union {
+
62  struct {
+
63  uint8_t yh;
+
64  uint8_t yl;
+
65  };
+
66  uint16_t y;
+
67  };
+
68 
+
70  union p {
+
72  bool n : 1;
+
74  bool v : 1;
+
76  bool m : 1;
+
77  union {
+
79  bool x : 1;
+
81  bool b : 1;
+
82  };
+
84  bool d : 1;
+
86  bool i : 1;
+
88  bool z : 1;
+
90  bool c : 1;
+
91  };
+
92  };
+
93 
+ +
96  {
+
98  uint8_t nmitimen;
+
99 
+
101  uint8_t wrio;
+
102 
+
104  uint8_t wrmpya;
+
106  uint8_t wrmpyb;
+
107 
+
109  uint8_t wrdivl;
+
111  uint8_t wrdivh;
+
113  uint8_t wrdivb;
+
114 
+
116  uint8_t htimel;
+
118  uint8_t htimeh;
+
119 
+
121  uint8_t vtimel;
+
123  uint8_t vtimeh;
+
124 
+
126  uint8_t mdmaen;
+
127 
+
129  uint8_t hdmaen;
+
130 
+
132  uint8_t memsel;
+
133 
+
135  uint8_t rdnmi;
+
137  uint8_t timeup;
+
138 
+
140  uint8_t hvbjoy;
+
141 
+
143  uint8_t rdio;
+
144 
+
146  uint8_t rddivl;
+
148  uint8_t rddivh;
+
149 
+
151  uint8_t rdmpyl;
+
153  uint8_t rdmpyh;
+
154 
+
156  uint8_t joy1l;
+
158  uint8_t joy1h;
+
159 
+
161  uint8_t joy2l;
+
163  uint8_t joy2h;
+
164 
+
166  uint8_t joy3l;
+
168  uint8_t joy3h;
+
169 
+
171  uint8_t joy4l;
+
173  uint8_t joy4h;
+
174  };
+
175 
+
177  class CPU : public Memory::IMemory {
+
178  private:
+ +
182  bool _isEmulationMode = true;
+ +
186  std::shared_ptr<Memory::MemoryBus> _bus;
+
187 
+
190  int executeInstruction();
+
191  public:
+
192  explicit CPU(std::shared_ptr<Memory::MemoryBus> bus);
+
195  int update();
+
200  uint8_t read(uint24_t addr) override;
+
205  void write(uint24_t addr, uint8_t data) override;
+
206  };
+
207 }
+
208 
+
209 #endif //COMSQUARE_CPU_HPP
+
+
ComSquare::CPU::Registers::p::b
bool b
The Break flag (in emulation mode only)
Definition: CPU.hpp:81
+
ComSquare::CPU::InternalRegisters::joy4h
uint8_t joy4h
Controller Port Data Registers (Pad 4 - High)
Definition: CPU.hpp:173
+
ComSquare::CPU::Registers::sh
uint8_t sh
Definition: CPU.hpp:47
+
ComSquare::CPU::Registers::p::x
bool x
The indeX register width flag (in native mode only)
Definition: CPU.hpp:79
+
ComSquare::CPU::Registers::dl
uint8_t dl
Definition: CPU.hpp:30
+
ComSquare::CPU::Registers::d
uint16_t d
Definition: CPU.hpp:32
+
ComSquare::CPU::InternalRegisters::joy4l
uint8_t joy4l
Controller Port Data Registers (Pad 4 - Low)
Definition: CPU.hpp:171
+
ComSquare::CPU::Registers::p::i
bool i
The Interrupt disable flag.
Definition: CPU.hpp:86
+
ComSquare::CPU::Registers::yh
uint8_t yh
Definition: CPU.hpp:63
+
ComSquare::CPU::Registers::pc
uint16_t pc
Definition: CPU.hpp:42
+
ComSquare::CPU::InternalRegisters::joy3h
uint8_t joy3h
Controller Port Data Registers (Pad 3 - High)
Definition: CPU.hpp:168
+
ComSquare::CPU::InternalRegisters::joy3l
uint8_t joy3l
Controller Port Data Registers (Pad 3 - Low)
Definition: CPU.hpp:166
+
ComSquare::CPU::InternalRegisters::rdio
uint8_t rdio
IO Port Read Register.
Definition: CPU.hpp:143
+
ComSquare::CPU::CPU
The main CPU.
Definition: CPU.hpp:177
+
ComSquare::CPU::InternalRegisters::wrio
uint8_t wrio
IO Port Write Register.
Definition: CPU.hpp:101
+
ComSquare::CPU::InternalRegisters::vtimel
uint8_t vtimel
IRQ Timer Registers (Vertical - Low)
Definition: CPU.hpp:121
+
ComSquare::CPU::Registers::dbr
uint8_t dbr
The Data Bank Register;.
Definition: CPU.hpp:25
+
ComSquare::CPU::Registers::p::n
bool n
The Negative flag.
Definition: CPU.hpp:72
+
ComSquare::CPU::Registers::xh
uint8_t xh
Definition: CPU.hpp:55
+
ComSquare::CPU::CPU::_isEmulationMode
bool _isEmulationMode
Is the CPU running in emulation mode (in 8bits)
Definition: CPU.hpp:182
+
ComSquare::CPU::CPU::write
void write(uint24_t addr, uint8_t data) override
Write data to the internal CPU register.
Definition: CPU.cpp:86
+
ComSquare::CPU::Registers::pch
uint8_t pch
Definition: CPU.hpp:39
+
ComSquare::CPU::InternalRegisters::wrdivb
uint8_t wrdivb
Divisor & Dividend Registers (B)
Definition: CPU.hpp:113
+
ComSquare::CPU
Definition: CPU.cpp:11
+
ComSquare::CPU::InternalRegisters::rddivl
uint8_t rddivl
Divide Result Registers (can sometimes be used as multiplication result register) - LOW.
Definition: CPU.hpp:146
+
ComSquare::CPU::InternalRegisters::wrdivh
uint8_t wrdivh
Divisor & Dividend Registers (A - High)
Definition: CPU.hpp:111
+
ComSquare::CPU::InternalRegisters::htimel
uint8_t htimel
IRQ Timer Registers (Horizontal - Low)
Definition: CPU.hpp:116
+
ComSquare::CPU::InternalRegisters::joy1l
uint8_t joy1l
Controller Port Data Registers (Pad 1 - Low)
Definition: CPU.hpp:156
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::CPU::InternalRegisters::rdmpyl
uint8_t rdmpyl
Multiplication Result Registers (can sometimes be used as divide result register) - LOW.
Definition: CPU.hpp:151
+
ComSquare::CPU::Registers::p::v
bool v
The oVerflow flag.
Definition: CPU.hpp:74
+
ComSquare::Memory::IMemory
Common interface implemented by all components mapping memory.
Definition: IMemory.hpp:16
+
ComSquare::CPU::InternalRegisters::timeup
uint8_t timeup
Interrupt Flag Registers - TimeUp.
Definition: CPU.hpp:137
+
ComSquare::CPU::InternalRegisters::htimeh
uint8_t htimeh
IRQ Timer Registers (Horizontal - High)
Definition: CPU.hpp:118
+
ComSquare::CPU::CPU::executeInstruction
int executeInstruction()
Execute a single instruction.
Definition: CPU.cpp:193
+
ComSquare::CPU::Registers::k
uint8_t k
The program banK register;.
Definition: CPU.hpp:35
+
ComSquare::CPU::Registers::p::z
bool z
The Zero flag.
Definition: CPU.hpp:88
+
ComSquare::CPU::InternalRegisters::joy1h
uint8_t joy1h
Controller Port Data Registers (Pad 1 - High)
Definition: CPU.hpp:158
+
ComSquare::CPU::Registers::p
The Processor status register;.
Definition: CPU.hpp:70
+
ComSquare::CPU::InternalRegisters::rddivh
uint8_t rddivh
Divide Result Registers (can sometimes be used as multiplication result register) - HIGH.
Definition: CPU.hpp:148
+
ComSquare::CPU::CPU::read
uint8_t read(uint24_t addr) override
Read from the internal CPU register.
Definition: CPU.cpp:18
+
ComSquare::CPU::InternalRegisters::wrdivl
uint8_t wrdivl
Divisor & Dividend Registers (A - Low)
Definition: CPU.hpp:109
+
ComSquare::CPU::InternalRegisters::hvbjoy
uint8_t hvbjoy
PPU Status Register.
Definition: CPU.hpp:140
+
ComSquare::CPU::InternalRegisters
Struct containing internal registers of the CPU.
Definition: CPU.hpp:95
+
ComSquare::CPU::Registers::sl
uint8_t sl
Definition: CPU.hpp:48
+
ComSquare::CPU::InternalRegisters::memsel
uint8_t memsel
ROM Speed Register.
Definition: CPU.hpp:132
+
ComSquare::CPU::InternalRegisters::joy2l
uint8_t joy2l
Controller Port Data Registers (Pad 2 - Low)
Definition: CPU.hpp:161
+
ComSquare::CPU::CPU::_internalRegisters
InternalRegisters _internalRegisters
Internal registers of the CPU (accessible from the bus via addr $4200 to $421F).
Definition: CPU.hpp:184
+
ComSquare::CPU::InternalRegisters::mdmaen
uint8_t mdmaen
DMA Enable Register.
Definition: CPU.hpp:126
+
ComSquare::CPU::Registers::pcl
uint8_t pcl
Definition: CPU.hpp:40
+
ComSquare::CPU::InternalRegisters::nmitimen
uint8_t nmitimen
Interrupt Enable Register.
Definition: CPU.hpp:98
+
ComSquare::CPU::CPU::CPU
CPU(std::shared_ptr< Memory::MemoryBus > bus)
Definition: CPU.cpp:13
+
ComSquare::CPU::InternalRegisters::rdmpyh
uint8_t rdmpyh
Multiplication Result Registers (can sometimes be used as divide result register) - HIGH.
Definition: CPU.hpp:153
+
ComSquare::CPU::InternalRegisters::joy2h
uint8_t joy2h
Controller Port Data Registers (Pad 2 - High)
Definition: CPU.hpp:163
+
ComSquare::CPU::Registers::yl
uint8_t yl
Definition: CPU.hpp:64
+
ComSquare::CPU::InternalRegisters::vtimeh
uint8_t vtimeh
IRQ Timer Registers (Vertical - High)
Definition: CPU.hpp:123
+
ComSquare::CPU::Registers::p::d
bool d
The Decimal mode flag.
Definition: CPU.hpp:84
+
ComSquare::CPU::CPU::_registers
Registers _registers
All the registers of the CPU.
Definition: CPU.hpp:180
+
ComSquare::CPU::Registers
Struct containing registers for the main CPU.
Definition: CPU.hpp:15
+
ComSquare::CPU::Registers::x
uint16_t x
Definition: CPU.hpp:58
+
ComSquare::CPU::Registers::dh
uint8_t dh
Definition: CPU.hpp:29
+
ComSquare::CPU::Registers::y
uint16_t y
Definition: CPU.hpp:66
+
ComSquare::CPU::Registers::ah
uint8_t ah
Definition: CPU.hpp:19
+
ComSquare::CPU::Registers::p::m
bool m
The accumulator and Memory width flag (in native mode only)
Definition: CPU.hpp:76
+
ComSquare::CPU::Registers::al
uint8_t al
Definition: CPU.hpp:20
+
ComSquare::CPU::InternalRegisters::wrmpyb
uint8_t wrmpyb
Multiplicand Register B.
Definition: CPU.hpp:106
+
ComSquare::CPU::InternalRegisters::rdnmi
uint8_t rdnmi
Interrupt Flag Registers.
Definition: CPU.hpp:135
+
ComSquare::CPU::InternalRegisters::hdmaen
uint8_t hdmaen
HDMA Enable Register.
Definition: CPU.hpp:129
+
ComSquare::CPU::Registers::s
uint16_t s
Definition: CPU.hpp:50
+
ComSquare::CPU::Registers::p::c
bool c
The Carry flag.
Definition: CPU.hpp:90
+
ComSquare::CPU::CPU::update
int update()
This function continue to execute the Cartridge code.
Definition: CPU.cpp:184
+
ComSquare::CPU::Registers::a
uint16_t a
Definition: CPU.hpp:22
+
ComSquare::CPU::Registers::xl
uint8_t xl
Definition: CPU.hpp:56
+
ComSquare::CPU::InternalRegisters::wrmpya
uint8_t wrmpya
Multiplicand Register A.
Definition: CPU.hpp:104
+
ComSquare::CPU::CPU::_bus
std::shared_ptr< Memory::MemoryBus > _bus
The memory bus to use for read/write.
Definition: CPU.hpp:186
+ + + + diff --git a/docs/html/Cartridge_8cpp.html b/docs/html/Cartridge_8cpp.html new file mode 100644 index 0000000..bad77e5 --- /dev/null +++ b/docs/html/Cartridge_8cpp.html @@ -0,0 +1,122 @@ + + + + + + + +ComSquare: sources/Cartridge/Cartridge.cpp File Reference + + + + + + + + + +
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+
Cartridge.cpp File Reference
+
+
+
#include <sys/stat.h>
+#include <iostream>
+#include <cstring>
+#include "Cartridge.hpp"
+#include "../Exceptions/InvalidAddress.hpp"
+#include "../Exceptions/InvalidRom.hpp"
+#include "../Exceptions/InvalidAction.hpp"
+
+Include dependency graph for Cartridge.cpp:
+
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+Namespaces

 ComSquare
 
 ComSquare::Cartridge
 
+
+ + + + diff --git a/docs/html/Cartridge_8cpp__incl.map b/docs/html/Cartridge_8cpp__incl.map new file mode 100644 index 0000000..63f6168 --- /dev/null +++ b/docs/html/Cartridge_8cpp__incl.map @@ -0,0 +1,20 @@ + + + + + + + + + + + + + + + + + + + + diff --git a/docs/html/Cartridge_8cpp__incl.md5 b/docs/html/Cartridge_8cpp__incl.md5 new file mode 100644 index 0000000..0990cbc --- /dev/null +++ b/docs/html/Cartridge_8cpp__incl.md5 @@ -0,0 +1 @@ +84034f0ef49cd653cb7e38c47dc0b0cb \ No newline at end of file diff --git a/docs/html/Cartridge_8cpp__incl.png b/docs/html/Cartridge_8cpp__incl.png new file mode 100644 index 0000000..f4163ab Binary files /dev/null and b/docs/html/Cartridge_8cpp__incl.png differ diff --git a/docs/html/Cartridge_8hpp.html b/docs/html/Cartridge_8hpp.html new file mode 100644 index 0000000..c3b1fd0 --- /dev/null +++ b/docs/html/Cartridge_8hpp.html @@ -0,0 +1,183 @@ + + + + + + + +ComSquare: sources/Cartridge/Cartridge.hpp File Reference + + + + + + + + + +
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+Classes | +Namespaces | +Macros | +Enumerations
+
+
Cartridge.hpp File Reference
+
+
+
#include <string>
+#include "../Memory/IMemory.hpp"
+#include "../Models/Ints.hpp"
+#include "../Memory/IRectangleMemory.hpp"
+#include "InterruptVectors.hpp"
+
+Include dependency graph for Cartridge.hpp:
+
+
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+This graph shows which files directly or indirectly include this file:
+
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Go to the source code of this file.

+ + + + + + + +

+Classes

struct  ComSquare::Cartridge::Header
 
class  ComSquare::Cartridge::Cartridge
 Contains the rom's memory/instructions. More...
 
+ + + + + +

+Namespaces

 ComSquare
 
 ComSquare::Cartridge
 
+ + + +

+Macros

#define ADDMAPPINGMODE(x, flag)   (x = static_cast<MappingMode>(x | (flag)))
 
+ + + +

+Enumerations

enum  ComSquare::Cartridge::MappingMode {
+  ComSquare::Cartridge::LoRom = 1u << 0u, +ComSquare::Cartridge::HiRom = 1u << 1u, +ComSquare::Cartridge::SlowRom = 1u << 2u, +ComSquare::Cartridge::FastRom = 1u << 3u, +
+  ComSquare::Cartridge::ExRom = 1u << 4u +
+ }
 
+

Macro Definition Documentation

+ +

◆ ADDMAPPINGMODE

+ +
+
+ + + + + + + + + + + + + + + + + + +
#define ADDMAPPINGMODE( x,
 flag 
)   (x = static_cast<MappingMode>(x | (flag)))
+
+ +
+
+
+ + + + diff --git a/docs/html/Cartridge_8hpp__dep__incl.map b/docs/html/Cartridge_8hpp__dep__incl.map new file mode 100644 index 0000000..1085c72 --- /dev/null +++ b/docs/html/Cartridge_8hpp__dep__incl.map @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/docs/html/Cartridge_8hpp__dep__incl.md5 b/docs/html/Cartridge_8hpp__dep__incl.md5 new file mode 100644 index 0000000..8728e2a --- /dev/null +++ b/docs/html/Cartridge_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +f6a3e4fdc4affc840c717d04916bf1ac \ No newline at end of file diff --git a/docs/html/Cartridge_8hpp__dep__incl.png b/docs/html/Cartridge_8hpp__dep__incl.png new file mode 100644 index 0000000..54f6469 Binary files /dev/null and b/docs/html/Cartridge_8hpp__dep__incl.png differ diff --git a/docs/html/Cartridge_8hpp__incl.map b/docs/html/Cartridge_8hpp__incl.map new file mode 100644 index 0000000..1d06444 --- /dev/null +++ b/docs/html/Cartridge_8hpp__incl.map @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/docs/html/Cartridge_8hpp__incl.md5 b/docs/html/Cartridge_8hpp__incl.md5 new file mode 100644 index 0000000..9299420 --- /dev/null +++ b/docs/html/Cartridge_8hpp__incl.md5 @@ -0,0 +1 @@ +0724c30633b3bc9c64e77ebda7732848 \ No newline at end of file diff --git a/docs/html/Cartridge_8hpp__incl.png b/docs/html/Cartridge_8hpp__incl.png new file mode 100644 index 0000000..19457e9 Binary files /dev/null and b/docs/html/Cartridge_8hpp__incl.png differ diff --git a/docs/html/Cartridge_8hpp_source.html b/docs/html/Cartridge_8hpp_source.html new file mode 100644 index 0000000..3c505f6 --- /dev/null +++ b/docs/html/Cartridge_8hpp_source.html @@ -0,0 +1,186 @@ + + + + + + + +ComSquare: sources/Cartridge/Cartridge.hpp Source File + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
Cartridge.hpp
+
+
+Go to the documentation of this file.
1 //
+
2 // Created by anonymus-raccoon on 1/27/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_CARTRIDGE_HPP
+
6 #define COMSQUARE_CARTRIDGE_HPP
+
7 
+
8 #include <string>
+
9 #include "../Memory/IMemory.hpp"
+
10 #include "../Models/Ints.hpp"
+
11 #include "../Memory/IRectangleMemory.hpp"
+
12 #include "InterruptVectors.hpp"
+
13 
+
14 namespace ComSquare::Cartridge
+
15 {
+
16  #define ADDMAPPINGMODE(x, flag) (x = static_cast<MappingMode>(x | (flag)))
+
17  enum MappingMode {
+
18  LoRom = 1u << 0u,
+
19  HiRom = 1u << 1u,
+
20  SlowRom = 1u << 2u,
+
21  FastRom = 1u << 3u,
+
22  ExRom = 1u << 4u,
+
23  };
+
24 
+
25  struct Header
+
26  {
+
28  std::string gameName;
+ +
32  uint8_t romType;
+
34  unsigned romSize;
+
36  unsigned sramSize;
+
38  union {
+
39  uint8_t creatorIDs[2];
+
40  uint16_t creatorID;
+
41  };
+
43  uint8_t version;
+
45  union {
+
46  uint8_t checksumComplements[2];
+ +
48  };
+
50  union {
+
51  uint8_t checksums[2];
+
52  uint16_t checksum;
+
53  };
+ + +
58  };
+
59 
+ +
62  private:
+
64  uint8_t *_data;
+
66  size_t _size;
+
67 
+
71  static size_t getRomSize(const std::string &romPath);
+
74  bool _loadHeader();
+
77  uint32_t _getHeaderAddress();
+
81  Header _mapHeader(uint32_t headerAddress);
+
82  public:
+
84  explicit Cartridge(const std::string &romPath);
+
86  ~Cartridge();
+
87 
+ +
94  uint8_t read_internal(uint24_t addr) override;
+
99  void write_internal(uint24_t addr, uint8_t data) override;
+
100  };
+
101 }
+
102 
+
103 #endif //COMSQUARE_CARTRIDGE_HPP
+
+
ComSquare::Memory::IRectangleMemory
Superset of the IMemory to map non continuous rectangle to the memory. (A rectangle that spam across ...
Definition: IRectangleMemory.hpp:14
+
ComSquare::Cartridge::Header::emulationInterrupts
InterruptVectors emulationInterrupts
The interrupt vectors used to halt the CPU in emulation mode.
Definition: Cartridge.hpp:57
+
ComSquare::Cartridge::LoRom
@ LoRom
Definition: Cartridge.hpp:18
+
ComSquare::Cartridge::Header::checksums
uint8_t checksums[2]
Definition: Cartridge.hpp:51
+
ComSquare::Cartridge::Header::sramSize
unsigned sramSize
The size of the SRom inside the cartridge.
Definition: Cartridge.hpp:36
+
ComSquare::Cartridge::Header::mappingMode
MappingMode mappingMode
The memory mapping of the ROM.
Definition: Cartridge.hpp:30
+
ComSquare::Cartridge::Header::gameName
std::string gameName
The name of the game.
Definition: Cartridge.hpp:28
+
ComSquare::Cartridge::Cartridge::_size
size_t _size
The size of the rom data.
Definition: Cartridge.hpp:66
+
ComSquare::Cartridge::Cartridge::write_internal
void write_internal(uint24_t addr, uint8_t data) override
Write data to the rom.
Definition: Cartridge.cpp:55
+
ComSquare::Cartridge::Cartridge::_data
uint8_t * _data
The rom data (contains all the instructions).
Definition: Cartridge.hpp:64
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::Cartridge
Definition: Cartridge.cpp:13
+
ComSquare::Cartridge::Header::creatorIDs
uint8_t creatorIDs[2]
Definition: Cartridge.hpp:39
+
ComSquare::Cartridge::Header::romType
uint8_t romType
The rom type (special information about the rom, still don't know what).
Definition: Cartridge.hpp:32
+
ComSquare::Cartridge::Cartridge::Cartridge
Cartridge(const std::string &romPath)
Load a rom from it's path.
Definition: Cartridge.cpp:15
+
ComSquare::Cartridge::Cartridge::~Cartridge
~Cartridge()
Destructor that free the cartridge data.
Definition: Cartridge.cpp:33
+
ComSquare::Cartridge::Cartridge::_getHeaderAddress
uint32_t _getHeaderAddress()
Get the address of the header.
Definition: Cartridge.cpp:110
+
ComSquare::Cartridge::MappingMode
MappingMode
Definition: Cartridge.hpp:17
+
ComSquare::Cartridge::Header::nativeInterrupts
InterruptVectors nativeInterrupts
The interrupt vectors used to halt the CPU in native mode.
Definition: Cartridge.hpp:55
+
ComSquare::Cartridge::FastRom
@ FastRom
Definition: Cartridge.hpp:21
+
InterruptVectors.hpp
+
ComSquare::Cartridge::SlowRom
@ SlowRom
Definition: Cartridge.hpp:20
+
ComSquare::Cartridge::Header::checksumComplement
uint16_t checksumComplement
Definition: Cartridge.hpp:47
+
ComSquare::Cartridge::Cartridge::read_internal
uint8_t read_internal(uint24_t addr) override
Read from the rom.
Definition: Cartridge.cpp:48
+
ComSquare::Cartridge::InterruptVectors
Definition: InterruptVectors.hpp:10
+
ComSquare::Cartridge::Cartridge
Contains the rom's memory/instructions.
Definition: Cartridge.hpp:61
+
ComSquare::Cartridge::ExRom
@ ExRom
Definition: Cartridge.hpp:22
+
ComSquare::Cartridge::Header
Definition: Cartridge.hpp:25
+
ComSquare::Cartridge::Cartridge::getRomSize
static size_t getRomSize(const std::string &romPath)
Get the size of a rom from it's path.
Definition: Cartridge.cpp:38
+
ComSquare::Cartridge::Cartridge::header
Header header
The header of the cartridge.
Definition: Cartridge.hpp:89
+
ComSquare::Cartridge::Header::checksumComplements
uint8_t checksumComplements[2]
Definition: Cartridge.hpp:46
+
ComSquare::Cartridge::Header::romSize
unsigned romSize
The size (in bytes) of the ram.
Definition: Cartridge.hpp:34
+
ComSquare::Cartridge::Cartridge::_loadHeader
bool _loadHeader()
Set the public variable header by parsing the header in the ROM.
Definition: Cartridge.cpp:169
+
ComSquare::Cartridge::Header::creatorID
uint16_t creatorID
Definition: Cartridge.hpp:40
+
ComSquare::Cartridge::HiRom
@ HiRom
Definition: Cartridge.hpp:19
+
ComSquare::Cartridge::Cartridge::_mapHeader
Header _mapHeader(uint32_t headerAddress)
Parse the memory to get a readable header.
Definition: Cartridge.cpp:62
+
ComSquare::Cartridge::Header::checksum
uint16_t checksum
Definition: Cartridge.hpp:52
+
ComSquare::Cartridge::Header::version
uint8_t version
The version of the game.
Definition: Cartridge.hpp:43
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+#include <SFML/Audio.hpp>
+#include "../Memory/IMemory.hpp"
+
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struct  ComSquare::APU::DSP::Registers
 All the registers of the DSP. More...
 
class  ComSquare::APU::DSP::DSP
 
+ + + + + + + +

+Namespaces

 ComSquare
 
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+
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DSP.hpp
+
+
+Go to the documentation of this file.
1 //
+
2 // Created by Melefo on 28/01/2020.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_DSP_HPP
+
6 #define COMSQUARE_DSP_HPP
+
7 
+
8 #include <cstdint>
+
9 #include <SFML/Audio.hpp>
+
10 #include "../Memory/IMemory.hpp"
+
11 
+
12 namespace ComSquare::APU::DSP
+
13 {
+
15  struct Registers {
+
17  uint8_t volL[8];
+
19  uint8_t volR[8];
+
20 
+
22  uint8_t pitchL[8];
+
24  uint8_t pitchH[8];
+
25 
+
27  uint8_t srcn[8];
+
28 
+
30  uint8_t adsr1[8];
+
32  uint8_t adsr2[8];
+
34  uint8_t gain[8];
+
36  uint8_t envx[8];
+
38  uint8_t outx[8];
+
39 
+
41  uint8_t mvolL;
+
43  uint8_t mvolR;
+
44 
+
46  uint8_t evolL;
+
48  uint8_t evolR;
+
49 
+
51  union {
+
52  struct {
+
53  bool kon7 : 1;
+
54  bool kon6 : 1;
+
55  bool kon5 : 1;
+
56  bool kon4 : 1;
+
57  bool kon3 : 1;
+
58  bool kon2 : 1;
+
59  bool kon1 : 1;
+
60  bool kon0 : 1;
+
61  };
+
62  uint8_t kon;
+
63  };
+
65  union {
+
66  struct {
+
67  bool kof7 : 1;
+
68  bool kof6 : 1;
+
69  bool kof5 : 1;
+
70  bool kof4 : 1;
+
71  bool kof3 : 1;
+
72  bool kof2 : 1;
+
73  bool kof1 : 1;
+
74  bool kof0 : 1;
+
75  };
+
76  uint8_t kof;
+
77  };
+
78 
+
80  uint8_t flg;
+
81 
+
83  union {
+
84  struct {
+
85  bool endx7 : 1;
+
86  bool endx6 : 1;
+
87  bool endx5 : 1;
+
88  bool endx4 : 1;
+
89  bool endx3 : 1;
+
90  bool endx2 : 1;
+
91  bool endx1 : 1;
+
92  bool endx0 : 1;
+
93  };
+
94  uint8_t endx;
+
95  };
+
96 
+
98  uint8_t efb;
+
99 
+
101  uint8_t unused;
+
102 
+
104  union {
+
105  struct {
+
106  bool pmon7 : 1;
+
107  bool pmon6 : 1;
+
108  bool pmon5 : 1;
+
109  bool pmon4 : 1;
+
110  bool pmon3 : 1;
+
111  bool pmon2 : 1;
+
112  bool pmon1 : 1;
+
113  bool __ : 1;
+
114  };
+
115  uint8_t pmon;
+
116  };
+
117 
+
119  union {
+
120  struct {
+
121  bool non7 : 1;
+
122  bool non6 : 1;
+
123  bool non5 : 1;
+
124  bool non4 : 1;
+
125  bool non3 : 1;
+
126  bool non2 : 1;
+
127  bool non1 : 1;
+
128  bool non0 : 1;
+
129  };
+
130  uint8_t non;
+
131  };
+
133  union {
+
134  struct {
+
135  bool eon7 : 1;
+
136  bool eon6 : 1;
+
137  bool eon5 : 1;
+
138  bool eon4 : 1;
+
139  bool eon3 : 1;
+
140  bool eon2 : 1;
+
141  bool eon1 : 1;
+
142  bool eon0 : 1;
+
143  };
+
144  uint8_t eon;
+
145  };
+
147  uint8_t dir;
+
148 
+
150  uint8_t esa;
+
152  uint8_t edl;
+
154  uint8_t coeff[8];
+
155  };
+
156 
+
157  class DSP : public Memory::IMemory {
+
158  private:
+ +
161 
+
163  sf::Sound _channels[8];
+
164 
+
166  sf::SoundBuffer _soundBuffer;
+
167  public:
+
168  explicit DSP();
+
169 
+
174  uint8_t read(uint24_t addr) override;
+
179  void write(uint24_t addr, uint8_t data) override;
+
180  };
+
181 }
+
182 
+
183 #endif //COMSQUARE_DSP_HPP
+
+
ComSquare::APU::DSP::DSP::_registers
Registers _registers
All registers of the DSP.
Definition: DSP.hpp:160
+
ComSquare::APU::DSP::Registers::kof6
bool kof6
Definition: DSP.hpp:68
+
ComSquare::APU::DSP::Registers::flg
uint8_t flg
Flags register.
Definition: DSP.hpp:80
+
ComSquare::APU::DSP::Registers::eon5
bool eon5
Definition: DSP.hpp:137
+
ComSquare::APU::DSP::Registers::mvolL
uint8_t mvolL
Left output of the Main Volume register.
Definition: DSP.hpp:41
+
ComSquare::APU::DSP::Registers::kof3
bool kof3
Definition: DSP.hpp:71
+
ComSquare::APU::DSP::Registers::kon6
bool kon6
Definition: DSP.hpp:54
+
ComSquare::APU::DSP::Registers::gain
uint8_t gain[8]
Gain register.
Definition: DSP.hpp:34
+
ComSquare::APU::DSP::Registers::pitchL
uint8_t pitchL[8]
Lower 8 bits of pitch register.
Definition: DSP.hpp:22
+
ComSquare::APU::DSP::Registers::non3
bool non3
Definition: DSP.hpp:125
+
ComSquare::APU::DSP::Registers::adsr1
uint8_t adsr1[8]
Envelope register.
Definition: DSP.hpp:30
+
ComSquare::APU::DSP::Registers::eon6
bool eon6
Definition: DSP.hpp:136
+
ComSquare::APU::DSP::DSP::read
uint8_t read(uint24_t addr) override
Read from the internal DSP register.
Definition: DSP.cpp:19
+
ComSquare::APU::DSP::Registers::pmon7
bool pmon7
Definition: DSP.hpp:106
+
ComSquare::APU::DSP::Registers::non1
bool non1
Definition: DSP.hpp:127
+
ComSquare::APU::DSP::Registers::non5
bool non5
Definition: DSP.hpp:123
+
ComSquare::APU::DSP::Registers::volL
uint8_t volL[8]
Left channel volume register.
Definition: DSP.hpp:17
+
ComSquare::APU::DSP::Registers::kof2
bool kof2
Definition: DSP.hpp:72
+
ComSquare::APU::DSP::Registers::eon1
bool eon1
Definition: DSP.hpp:141
+
ComSquare::APU::DSP::Registers::pmon
uint8_t pmon
Definition: DSP.hpp:115
+
ComSquare::APU::DSP::Registers::endx7
bool endx7
Definition: DSP.hpp:85
+
ComSquare::APU::DSP::Registers::evolR
uint8_t evolR
Right output of the Echo Volume register.
Definition: DSP.hpp:48
+
ComSquare::APU::DSP::Registers::pmon1
bool pmon1
Definition: DSP.hpp:112
+
ComSquare::APU::DSP::Registers::kof7
bool kof7
Definition: DSP.hpp:67
+
ComSquare::APU::DSP::Registers::endx1
bool endx1
Definition: DSP.hpp:91
+
ComSquare::APU::DSP::Registers::envx
uint8_t envx[8]
Envelope value register.
Definition: DSP.hpp:36
+
ComSquare::APU::DSP::Registers::pmon3
bool pmon3
Definition: DSP.hpp:110
+
ComSquare::APU::DSP::Registers::outx
uint8_t outx[8]
Wave height register.
Definition: DSP.hpp:38
+
ComSquare::APU::DSP::Registers::kon5
bool kon5
Definition: DSP.hpp:55
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::APU::DSP::Registers::kon3
bool kon3
Definition: DSP.hpp:57
+
ComSquare::APU::DSP::Registers::endx0
bool endx0
Definition: DSP.hpp:92
+
ComSquare::APU::DSP::Registers::non4
bool non4
Definition: DSP.hpp:124
+
ComSquare::APU::DSP::Registers::__
bool __
Definition: DSP.hpp:113
+
ComSquare::Memory::IMemory
Common interface implemented by all components mapping memory.
Definition: IMemory.hpp:16
+
ComSquare::APU::DSP::Registers::non
uint8_t non
Definition: DSP.hpp:130
+
ComSquare::APU::DSP::Registers::kon4
bool kon4
Definition: DSP.hpp:56
+
ComSquare::APU::DSP::Registers::kof1
bool kof1
Definition: DSP.hpp:73
+
ComSquare::APU::DSP::Registers::esa
uint8_t esa
Echo data start register.
Definition: DSP.hpp:150
+
ComSquare::APU::DSP::Registers::non2
bool non2
Definition: DSP.hpp:126
+
ComSquare::APU::DSP::Registers::pmon4
bool pmon4
Definition: DSP.hpp:109
+
ComSquare::APU::DSP::DSP::write
void write(uint24_t addr, uint8_t data) override
Write data to the internal DSP register.
Definition: DSP.cpp:235
+
ComSquare::APU::DSP::Registers::eon
uint8_t eon
Definition: DSP.hpp:144
+
ComSquare::APU::DSP::Registers::endx
uint8_t endx
Definition: DSP.hpp:94
+
ComSquare::APU::DSP::Registers::mvolR
uint8_t mvolR
Right output of the Main Volume register.
Definition: DSP.hpp:43
+
ComSquare::APU::DSP::Registers::efb
uint8_t efb
Echo feedback register.
Definition: DSP.hpp:98
+
ComSquare::APU::DSP::Registers::srcn
uint8_t srcn[8]
Source number register.
Definition: DSP.hpp:27
+
ComSquare::APU::DSP::Registers::kof5
bool kof5
Definition: DSP.hpp:69
+
ComSquare::APU::DSP::Registers::kof0
bool kof0
Definition: DSP.hpp:74
+
ComSquare::APU::DSP::Registers::pitchH
uint8_t pitchH[8]
Higher 8 bits of pitch register.
Definition: DSP.hpp:24
+
ComSquare::APU::DSP::Registers::non7
bool non7
Definition: DSP.hpp:121
+
ComSquare::APU::DSP::Registers::eon0
bool eon0
Definition: DSP.hpp:142
+
ComSquare::APU::DSP::Registers
All the registers of the DSP.
Definition: DSP.hpp:15
+
ComSquare::APU::DSP::Registers::endx2
bool endx2
Definition: DSP.hpp:90
+
ComSquare::APU::DSP::Registers::adsr2
uint8_t adsr2[8]
Envelope controllers register.
Definition: DSP.hpp:32
+
ComSquare::APU::DSP::Registers::non0
bool non0
Definition: DSP.hpp:128
+
ComSquare::APU::DSP::Registers::pmon6
bool pmon6
Definition: DSP.hpp:107
+
ComSquare::APU::DSP::Registers::unused
uint8_t unused
Not used register.
Definition: DSP.hpp:101
+
ComSquare::APU::DSP::Registers::endx5
bool endx5
Definition: DSP.hpp:87
+
ComSquare::APU::DSP::DSP::_soundBuffer
sf::SoundBuffer _soundBuffer
A buffer containing current wave.
Definition: DSP.hpp:166
+
ComSquare::APU::DSP::Registers::kon0
bool kon0
Definition: DSP.hpp:60
+
ComSquare::APU::DSP::DSP::_channels
sf::Sound _channels[8]
8x channels of sample used to make sound
Definition: DSP.hpp:163
+
ComSquare::APU::DSP::Registers::kon
uint8_t kon
Definition: DSP.hpp:62
+
ComSquare::APU::DSP::Registers::eon7
bool eon7
Definition: DSP.hpp:135
+
ComSquare::APU::DSP::Registers::volR
uint8_t volR[8]
Left channel volume register.
Definition: DSP.hpp:19
+
ComSquare::APU::DSP::Registers::endx4
bool endx4
Definition: DSP.hpp:88
+
ComSquare::APU::DSP::DSP
Definition: DSP.hpp:157
+
ComSquare::APU::DSP::Registers::coeff
uint8_t coeff[8]
Echo FIR filter coefficients.
Definition: DSP.hpp:154
+
ComSquare::APU::DSP::Registers::non6
bool non6
Definition: DSP.hpp:122
+
ComSquare::APU::DSP::Registers::endx3
bool endx3
Definition: DSP.hpp:89
+
ComSquare::APU::DSP::Registers::kon1
bool kon1
Definition: DSP.hpp:59
+
ComSquare::APU::DSP::Registers::pmon2
bool pmon2
Definition: DSP.hpp:111
+
ComSquare::APU::DSP::Registers::kon2
bool kon2
Definition: DSP.hpp:58
+
ComSquare::APU::DSP::Registers::endx6
bool endx6
Definition: DSP.hpp:86
+
ComSquare::APU::DSP::Registers::eon4
bool eon4
Definition: DSP.hpp:138
+
ComSquare::APU::DSP::Registers::kof4
bool kof4
Definition: DSP.hpp:70
+
ComSquare::APU::DSP
Definition: DSP.cpp:8
+
ComSquare::APU::DSP::DSP::DSP
DSP()
Definition: DSP.cpp:10
+
ComSquare::APU::DSP::Registers::evolL
uint8_t evolL
Left output of the Echo Volume register.
Definition: DSP.hpp:46
+
ComSquare::APU::DSP::Registers::pmon5
bool pmon5
Definition: DSP.hpp:108
+
ComSquare::APU::DSP::Registers::eon2
bool eon2
Definition: DSP.hpp:140
+
ComSquare::APU::DSP::Registers::edl
uint8_t edl
Echo delay size register.
Definition: DSP.hpp:152
+
ComSquare::APU::DSP::Registers::eon3
bool eon3
Definition: DSP.hpp:139
+
ComSquare::APU::DSP::Registers::kof
uint8_t kof
Definition: DSP.hpp:76
+
ComSquare::APU::DSP::Registers::dir
uint8_t dir
Source Directory offset register.
Definition: DSP.hpp:147
+
ComSquare::APU::DSP::Registers::kon7
bool kon7
Definition: DSP.hpp:53
+ + + + diff --git a/docs/html/IMemory_8cpp.html b/docs/html/IMemory_8cpp.html new file mode 100644 index 0000000..6fbd67d --- /dev/null +++ b/docs/html/IMemory_8cpp.html @@ -0,0 +1,105 @@ + + + + + + + +ComSquare: sources/Memory/IMemory.cpp File Reference + + + + + + + + + +
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#include <cstdint>
+#include <vector>
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class  ComSquare::Memory::IMemory
 Common interface implemented by all components mapping memory. More...
 
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+ + + + diff --git a/docs/html/IMemory_8hpp__dep__incl.map b/docs/html/IMemory_8hpp__dep__incl.map new file mode 100644 index 0000000..cfce578 --- /dev/null +++ b/docs/html/IMemory_8hpp__dep__incl.map @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/docs/html/IMemory_8hpp__dep__incl.md5 b/docs/html/IMemory_8hpp__dep__incl.md5 new file mode 100644 index 0000000..680b235 --- /dev/null +++ b/docs/html/IMemory_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +259f40792486e69cd47a7b709904ce01 \ No newline at end of file diff --git a/docs/html/IMemory_8hpp__dep__incl.png b/docs/html/IMemory_8hpp__dep__incl.png new file mode 100644 index 0000000..7a8e3b2 Binary files /dev/null and b/docs/html/IMemory_8hpp__dep__incl.png differ diff --git a/docs/html/IMemory_8hpp__incl.map b/docs/html/IMemory_8hpp__incl.map new file mode 100644 index 0000000..e37d6ea --- /dev/null +++ b/docs/html/IMemory_8hpp__incl.map @@ -0,0 +1,6 @@ + + + + + + diff --git a/docs/html/IMemory_8hpp__incl.md5 b/docs/html/IMemory_8hpp__incl.md5 new file mode 100644 index 0000000..9578d4b --- /dev/null +++ b/docs/html/IMemory_8hpp__incl.md5 @@ -0,0 +1 @@ +238a377e11c53ea2c41488c201fff0bd \ No newline at end of file diff --git a/docs/html/IMemory_8hpp__incl.png b/docs/html/IMemory_8hpp__incl.png new file mode 100644 index 0000000..0bf03a6 Binary files /dev/null and b/docs/html/IMemory_8hpp__incl.png differ diff --git a/docs/html/IMemory_8hpp_source.html b/docs/html/IMemory_8hpp_source.html new file mode 100644 index 0000000..27f0b08 --- /dev/null +++ b/docs/html/IMemory_8hpp_source.html @@ -0,0 +1,119 @@ + + + + + + + +ComSquare: sources/Memory/IMemory.hpp Source File + + + + + + + + + +
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IMemory.hpp
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1 //
+
2 // Created by anonymus-raccoon on 1/23/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_IMEMORY_HPP
+
6 #define COMSQUARE_IMEMORY_HPP
+
7 
+
8 
+
9 #include <cstdint>
+
10 #include <vector>
+
11 #include "../Models/Ints.hpp"
+
12 
+
13 namespace ComSquare::Memory
+
14 {
+
16  class IMemory {
+
17  private:
+ + +
22  public:
+
27  virtual uint8_t read(uint24_t addr) = 0;
+
32  virtual void write(uint24_t addr, uint8_t data) = 0;
+
37  void setMemoryRegion(uint24_t start, uint24_t end);
+
41  virtual bool hasMemoryAt(uint24_t addr);
+
44  virtual uint24_t getStart();
+
45  };
+
46 };
+
47 
+
48 
+
49 #endif //COMSQUARE_IMEMORY_HPP
+
+
ComSquare::Memory::IMemory::_end
uint24_t _end
The last continuous address mapped to this components. For shadows, see the MemoryShadow class.
Definition: IMemory.hpp:21
+
ComSquare::Memory::IMemory::read
virtual uint8_t read(uint24_t addr)=0
Read data from the component.
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::Memory::IMemory
Common interface implemented by all components mapping memory.
Definition: IMemory.hpp:16
+
ComSquare::Memory::IMemory::getStart
virtual uint24_t getStart()
Get the first address mapped to this component.
Definition: IMemory.cpp:21
+
ComSquare::Memory::IMemory::setMemoryRegion
void setMemoryRegion(uint24_t start, uint24_t end)
Change starting and ending points of this mapped memory.
Definition: IMemory.cpp:10
+
ComSquare::Memory::IMemory::_start
uint24_t _start
The starting address mapped to this component.
Definition: IMemory.hpp:19
+
ComSquare::Memory
Definition: IMemory.cpp:8
+
ComSquare::Memory::IMemory::hasMemoryAt
virtual bool hasMemoryAt(uint24_t addr)
Return true if this component has mapped the address.
Definition: IMemory.cpp:16
+
ComSquare::Memory::IMemory::write
virtual void write(uint24_t addr, uint8_t data)=0
Write data to this component.
+ + + + diff --git a/docs/html/IRectangleMemory_8cpp.html b/docs/html/IRectangleMemory_8cpp.html new file mode 100644 index 0000000..f13ae54 --- /dev/null +++ b/docs/html/IRectangleMemory_8cpp.html @@ -0,0 +1,110 @@ + + + + + + + +ComSquare: sources/Memory/IRectangleMemory.cpp File Reference + + + + + + + + + +
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#include "IRectangleMemory.hpp"
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#include "IMemory.hpp"
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class  ComSquare::Memory::IRectangleMemory
 Superset of the IMemory to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at FFFF). More...
 
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+ + + + diff --git a/docs/html/IRectangleMemory_8hpp__dep__incl.map b/docs/html/IRectangleMemory_8hpp__dep__incl.map new file mode 100644 index 0000000..c6e26bb --- /dev/null +++ b/docs/html/IRectangleMemory_8hpp__dep__incl.map @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/docs/html/IRectangleMemory_8hpp__dep__incl.md5 b/docs/html/IRectangleMemory_8hpp__dep__incl.md5 new file mode 100644 index 0000000..ab95daa --- /dev/null +++ b/docs/html/IRectangleMemory_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +650a4d556666d0bc4f1aa585bec7c504 \ No newline at end of file diff --git a/docs/html/IRectangleMemory_8hpp__dep__incl.png b/docs/html/IRectangleMemory_8hpp__dep__incl.png new file mode 100644 index 0000000..f327df3 Binary files /dev/null and b/docs/html/IRectangleMemory_8hpp__dep__incl.png differ diff --git a/docs/html/IRectangleMemory_8hpp__incl.map b/docs/html/IRectangleMemory_8hpp__incl.map new file mode 100644 index 0000000..45786a6 --- /dev/null +++ b/docs/html/IRectangleMemory_8hpp__incl.map @@ -0,0 +1,7 @@ + + + + + + + diff --git a/docs/html/IRectangleMemory_8hpp__incl.md5 b/docs/html/IRectangleMemory_8hpp__incl.md5 new file mode 100644 index 0000000..ed80b17 --- /dev/null +++ b/docs/html/IRectangleMemory_8hpp__incl.md5 @@ -0,0 +1 @@ +470af07966122cb67ba2b37a9d93dbe3 \ No newline at end of file diff --git a/docs/html/IRectangleMemory_8hpp__incl.png b/docs/html/IRectangleMemory_8hpp__incl.png new file mode 100644 index 0000000..729f80e Binary files /dev/null and b/docs/html/IRectangleMemory_8hpp__incl.png differ diff --git a/docs/html/IRectangleMemory_8hpp_source.html b/docs/html/IRectangleMemory_8hpp_source.html new file mode 100644 index 0000000..9803814 --- /dev/null +++ b/docs/html/IRectangleMemory_8hpp_source.html @@ -0,0 +1,126 @@ + + + + + + + +ComSquare: sources/Memory/IRectangleMemory.hpp Source File + + + + + + + + + +
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IRectangleMemory.hpp
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1 //
+
2 // Created by anonymus-raccoon on 1/29/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_IRECTANGLEMEMORY_HPP
+
6 #define COMSQUARE_IRECTANGLEMEMORY_HPP
+
7 
+
8 
+
9 #include "IMemory.hpp"
+
10 
+
11 namespace ComSquare::Memory
+
12 {
+
14  class IRectangleMemory : public IMemory {
+
15  private:
+
17  uint8_t _startBank = 0;
+
19  uint8_t _endBank = 0;
+
21  uint16_t _startPage = 0;
+
23  uint16_t _endPage = 0;
+
24  public:
+
29  uint8_t read(uint24_t addr) override;
+
34  void write(uint24_t addr, uint8_t data) override;
+
39  virtual uint8_t read_internal(uint24_t addr) = 0;
+
44  virtual void write_internal(uint24_t addr, uint8_t data) = 0;
+
48  bool hasMemoryAt(uint24_t addr) override;
+
51  uint24_t getStart() override;
+
58  void setMemoryRegion(uint8_t startBank, uint8_t endBank, uint16_t startPage, uint16_t endPage);
+
59  };
+
60 }
+
61 
+
62 #endif //COMSQUARE_IRECTANGLEMEMORY_HPP
+
+
ComSquare::Memory::IRectangleMemory
Superset of the IMemory to map non continuous rectangle to the memory. (A rectangle that spam across ...
Definition: IRectangleMemory.hpp:14
+
ComSquare::Memory::IRectangleMemory::_startBank
uint8_t _startBank
The first bank to map to.
Definition: IRectangleMemory.hpp:17
+
ComSquare::Memory::IRectangleMemory::read
uint8_t read(uint24_t addr) override
Read data from the component using the same method as the basic IMemory.
Definition: IRectangleMemory.cpp:10
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::Memory::IMemory
Common interface implemented by all components mapping memory.
Definition: IMemory.hpp:16
+
ComSquare::Memory::IRectangleMemory::getStart
uint24_t getStart() override
Get the first address mapped to this component.
Definition: IRectangleMemory.cpp:53
+
ComSquare::Memory::IRectangleMemory::write
void write(uint24_t addr, uint8_t data) override
Write data to this component using the same method as the basic IMemory.
Definition: IRectangleMemory.cpp:26
+
ComSquare::Memory::IRectangleMemory::read_internal
virtual uint8_t read_internal(uint24_t addr)=0
Internal component read. Implement this as you would implement a basic IMemory's read.
+
ComSquare::Memory::IRectangleMemory::setMemoryRegion
void setMemoryRegion(uint8_t startBank, uint8_t endBank, uint16_t startPage, uint16_t endPage)
Change starting and ending points of this mapped memory.
Definition: IRectangleMemory.cpp:58
+
ComSquare::Memory::IRectangleMemory::_startPage
uint16_t _startPage
The first address of each bank to map.
Definition: IRectangleMemory.hpp:21
+
ComSquare::Memory::IRectangleMemory::_endPage
uint16_t _endPage
The last address of each bank to map.
Definition: IRectangleMemory.hpp:23
+
ComSquare::Memory
Definition: IMemory.cpp:8
+
IMemory.hpp
+
ComSquare::Memory::IRectangleMemory::write_internal
virtual void write_internal(uint24_t addr, uint8_t data)=0
Internal component write. Implement this as you would implement a basic IMemory's write.
+
ComSquare::Memory::IRectangleMemory::hasMemoryAt
bool hasMemoryAt(uint24_t addr) override
Return true if this component has mapped the address.
Definition: IRectangleMemory.cpp:42
+
ComSquare::Memory::IRectangleMemory::_endBank
uint8_t _endBank
The last bank to map to.
Definition: IRectangleMemory.hpp:19
+ + + + diff --git a/docs/html/IRenderer_8hpp.html b/docs/html/IRenderer_8hpp.html new file mode 100644 index 0000000..bfe437e --- /dev/null +++ b/docs/html/IRenderer_8hpp.html @@ -0,0 +1,118 @@ + + + + + + + +ComSquare: sources/Renderer/IRenderer.hpp File Reference + + + + + + + + + +
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class  ComSquare::Renderer::IRenderer
 
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+ + + + diff --git a/docs/html/IRenderer_8hpp__dep__incl.map b/docs/html/IRenderer_8hpp__dep__incl.map new file mode 100644 index 0000000..6bd848b --- /dev/null +++ b/docs/html/IRenderer_8hpp__dep__incl.map @@ -0,0 +1,5 @@ + + + + + diff --git a/docs/html/IRenderer_8hpp__dep__incl.md5 b/docs/html/IRenderer_8hpp__dep__incl.md5 new file mode 100644 index 0000000..6e9bfe2 --- /dev/null +++ b/docs/html/IRenderer_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +fee2471b3e8f303911eb41f1b2ae3598 \ No newline at end of file diff --git a/docs/html/IRenderer_8hpp__dep__incl.png b/docs/html/IRenderer_8hpp__dep__incl.png new file mode 100644 index 0000000..4e1bd8f Binary files /dev/null and b/docs/html/IRenderer_8hpp__dep__incl.png differ diff --git a/docs/html/IRenderer_8hpp__incl.map b/docs/html/IRenderer_8hpp__incl.map new file mode 100644 index 0000000..a6b52a3 --- /dev/null +++ b/docs/html/IRenderer_8hpp__incl.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/IRenderer_8hpp__incl.md5 b/docs/html/IRenderer_8hpp__incl.md5 new file mode 100644 index 0000000..9524ea5 --- /dev/null +++ b/docs/html/IRenderer_8hpp__incl.md5 @@ -0,0 +1 @@ +486ff7a5615c3123432b8e0fec6a2d66 \ No newline at end of file diff --git a/docs/html/IRenderer_8hpp__incl.png b/docs/html/IRenderer_8hpp__incl.png new file mode 100644 index 0000000..15d2a0a Binary files /dev/null and b/docs/html/IRenderer_8hpp__incl.png differ diff --git a/docs/html/IRenderer_8hpp_source.html b/docs/html/IRenderer_8hpp_source.html new file mode 100644 index 0000000..b2c50c3 --- /dev/null +++ b/docs/html/IRenderer_8hpp_source.html @@ -0,0 +1,107 @@ + + + + + + + +ComSquare: sources/Renderer/IRenderer.hpp Source File + + + + + + + + + +
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1 //
+
2 // Created by cbihan on 1/30/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_IRENDERER_HPP
+
6 #define COMSQUARE_IRENDERER_HPP
+
7 
+
8 #include <string>
+
9 
+ +
11 {
+
12  class IRenderer {
+
13  public:
+
15  virtual void setWindowName(std::string) = 0;
+
17  bool shouldExit;
+
19  virtual void drawScreen() = 0;
+
21  virtual void putPixel(int x, int y, uint8_t rgba) = 0;
+
22  };
+
23 }
+
24 
+
25 #endif //COMSQUARE_IRENDERER_HPP
+
+
ComSquare::Renderer::IRenderer::shouldExit
bool shouldExit
Tells to the program if the window has been closed, and therefore if he should stop.
Definition: IRenderer.hpp:17
+
ComSquare::Renderer::IRenderer::putPixel
virtual void putPixel(int x, int y, uint8_t rgba)=0
Set a pixel to the coordinates x, y with the color rgba.
+
ComSquare::Renderer::IRenderer::drawScreen
virtual void drawScreen()=0
Render the buffer to the window.
+
ComSquare::Renderer
Definition: IRenderer.hpp:10
+
ComSquare::Renderer::IRenderer
Definition: IRenderer.hpp:12
+
ComSquare::Renderer::IRenderer::setWindowName
virtual void setWindowName(std::string)=0
Set a new name to the window, if there is already a name it will be overwrite.
+ + + + diff --git a/docs/html/InterruptVectors_8hpp.html b/docs/html/InterruptVectors_8hpp.html new file mode 100644 index 0000000..52c22b5 --- /dev/null +++ b/docs/html/InterruptVectors_8hpp.html @@ -0,0 +1,112 @@ + + + + + + + +ComSquare: sources/Cartridge/InterruptVectors.hpp File Reference + + + + + + + + + +
+
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struct  ComSquare::Cartridge::InterruptVectors
 
+ + + + + +

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 ComSquare::Cartridge
 
+
+ + + + diff --git a/docs/html/InterruptVectors_8hpp__dep__incl.map b/docs/html/InterruptVectors_8hpp__dep__incl.map new file mode 100644 index 0000000..55b9250 --- /dev/null +++ b/docs/html/InterruptVectors_8hpp__dep__incl.map @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/docs/html/InterruptVectors_8hpp__dep__incl.md5 b/docs/html/InterruptVectors_8hpp__dep__incl.md5 new file mode 100644 index 0000000..2f026b0 --- /dev/null +++ b/docs/html/InterruptVectors_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +a57e58fbfbf95797eebab149a5261b28 \ No newline at end of file diff --git a/docs/html/InterruptVectors_8hpp__dep__incl.png b/docs/html/InterruptVectors_8hpp__dep__incl.png new file mode 100644 index 0000000..c03a196 Binary files /dev/null and b/docs/html/InterruptVectors_8hpp__dep__incl.png differ diff --git a/docs/html/InterruptVectors_8hpp_source.html b/docs/html/InterruptVectors_8hpp_source.html new file mode 100644 index 0000000..7b9753b --- /dev/null +++ b/docs/html/InterruptVectors_8hpp_source.html @@ -0,0 +1,132 @@ + + + + + + + +ComSquare: sources/Cartridge/InterruptVectors.hpp Source File + + + + + + + + + +
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1 //
+
2 // Created by anonymus-raccoon on 1/31/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_INTERRUPTVECTORS_HPP
+
6 #define COMSQUARE_INTERRUPTVECTORS_HPP
+
7 
+
8 namespace ComSquare::Cartridge
+
9 {
+ +
12  union {
+
13  uint8_t cop8[2];
+
14  uint16_t cop;
+
15  };
+
17  union {
+
18  uint8_t brk8[2];
+
19  uint16_t brk;
+
20  };
+
22  union {
+
23  uint8_t abort8[2];
+
24  uint16_t abort;
+
25  };
+
27  union {
+
28  uint8_t nmi8[2];
+
29  uint16_t nmi;
+
30  };
+
32  union {
+
33  uint8_t reset8[2];
+
34  uint16_t reset;
+
35  };
+
37  union {
+
38  uint8_t irq8[2];
+
39  uint16_t irq;
+
40  };
+
41  };
+
42 }
+
43 
+
44 #endif //COMSQUARE_INTERRUPTVECTORS_HPP
+
+
ComSquare::Cartridge::InterruptVectors::reset
uint16_t reset
Definition: InterruptVectors.hpp:34
+
ComSquare::Cartridge::InterruptVectors::abort
uint16_t abort
Definition: InterruptVectors.hpp:24
+
ComSquare::Cartridge::InterruptVectors::cop8
uint8_t cop8[2]
Definition: InterruptVectors.hpp:13
+
ComSquare::Cartridge::InterruptVectors::abort8
uint8_t abort8[2]
Definition: InterruptVectors.hpp:23
+
ComSquare::Cartridge
Definition: Cartridge.cpp:13
+
ComSquare::Cartridge::InterruptVectors::irq
uint16_t irq
Definition: InterruptVectors.hpp:39
+
ComSquare::Cartridge::InterruptVectors
Definition: InterruptVectors.hpp:10
+
ComSquare::Cartridge::InterruptVectors::irq8
uint8_t irq8[2]
Definition: InterruptVectors.hpp:38
+
ComSquare::Cartridge::InterruptVectors::brk
uint16_t brk
Definition: InterruptVectors.hpp:19
+
ComSquare::Cartridge::InterruptVectors::cop
uint16_t cop
Definition: InterruptVectors.hpp:14
+
ComSquare::Cartridge::InterruptVectors::nmi
uint16_t nmi
Definition: InterruptVectors.hpp:29
+
ComSquare::Cartridge::InterruptVectors::nmi8
uint8_t nmi8[2]
Definition: InterruptVectors.hpp:28
+
ComSquare::Cartridge::InterruptVectors::reset8
uint8_t reset8[2]
Definition: InterruptVectors.hpp:33
+
ComSquare::Cartridge::InterruptVectors::brk8
uint8_t brk8[2]
Definition: InterruptVectors.hpp:18
+ + + + diff --git a/docs/html/Ints_8hpp.html b/docs/html/Ints_8hpp.html new file mode 100644 index 0000000..633a245 --- /dev/null +++ b/docs/html/Ints_8hpp.html @@ -0,0 +1,136 @@ + + + + + + + +ComSquare: sources/Models/Ints.hpp File Reference + + + + + + + + + +
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typedef unsigned uint24_t
 
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typedef unsigned uint24_t
+
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1 //
+
2 // Created by anonymus-raccoon on 1/28/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_INTS_HPP
+
6 #define COMSQUARE_INTS_HPP
+
7 
+
8 typedef unsigned uint24_t;
+
9 
+
10 #endif //COMSQUARE_INTS_HPP
+
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+ + + + diff --git a/docs/html/InvalidAction_8hpp.html b/docs/html/InvalidAction_8hpp.html new file mode 100644 index 0000000..8fc0610 --- /dev/null +++ b/docs/html/InvalidAction_8hpp.html @@ -0,0 +1,118 @@ + + + + + + + +ComSquare: sources/Exceptions/InvalidAction.hpp File Reference + + + + + + + + + +
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class  ComSquare::InvalidAction
 Exception thrown when someone tries to load an invalid rom. More...
 
+ + + +

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 ComSquare
 
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+ + + + diff --git a/docs/html/InvalidAction_8hpp__dep__incl.map b/docs/html/InvalidAction_8hpp__dep__incl.map new file mode 100644 index 0000000..0ec24d4 --- /dev/null +++ b/docs/html/InvalidAction_8hpp__dep__incl.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/InvalidAction_8hpp__dep__incl.md5 b/docs/html/InvalidAction_8hpp__dep__incl.md5 new file mode 100644 index 0000000..55bf15e --- /dev/null +++ b/docs/html/InvalidAction_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +716d800f5b66fa7606499f12ae4555ff \ No newline at end of file diff --git a/docs/html/InvalidAction_8hpp__dep__incl.png b/docs/html/InvalidAction_8hpp__dep__incl.png new file mode 100644 index 0000000..cc31cdc Binary files /dev/null and b/docs/html/InvalidAction_8hpp__dep__incl.png differ diff --git a/docs/html/InvalidAction_8hpp__incl.map b/docs/html/InvalidAction_8hpp__incl.map new file mode 100644 index 0000000..1866060 --- /dev/null +++ b/docs/html/InvalidAction_8hpp__incl.map @@ -0,0 +1,5 @@ + + + + + diff --git a/docs/html/InvalidAction_8hpp__incl.md5 b/docs/html/InvalidAction_8hpp__incl.md5 new file mode 100644 index 0000000..cf0d8f9 --- /dev/null +++ b/docs/html/InvalidAction_8hpp__incl.md5 @@ -0,0 +1 @@ +1118377cfecd16725b5c286689e79d7a \ No newline at end of file diff --git a/docs/html/InvalidAction_8hpp__incl.png b/docs/html/InvalidAction_8hpp__incl.png new file mode 100644 index 0000000..6540992 Binary files /dev/null and b/docs/html/InvalidAction_8hpp__incl.png differ diff --git a/docs/html/InvalidAction_8hpp_source.html b/docs/html/InvalidAction_8hpp_source.html new file mode 100644 index 0000000..47fa5b9 --- /dev/null +++ b/docs/html/InvalidAction_8hpp_source.html @@ -0,0 +1,106 @@ + + + + + + + +ComSquare: sources/Exceptions/InvalidAction.hpp Source File + + + + + + + + + +
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1 //
+
2 // Created by anonymus-raccoon on 1/30/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_INVALIDACTION_HPP
+
6 #define COMSQUARE_INVALIDACTION_HPP
+
7 
+
8 #include <exception>
+
9 #include <string>
+
10 
+
11 namespace ComSquare
+
12 {
+
14  class InvalidAction : std::exception {
+
15  private:
+
16  std::string _msg;
+
17  public:
+
18  explicit InvalidAction(const std::string &msg) : _msg(msg) {}
+
19  const char *what() const noexcept override { return this->_msg.c_str(); }
+
20  };
+
21 }
+
22 #endif //COMSQUARE_INVALIDACTION_HPP
+
+
ComSquare::InvalidAction::_msg
std::string _msg
Definition: InvalidAction.hpp:16
+
ComSquare::InvalidAction::InvalidAction
InvalidAction(const std::string &msg)
Definition: InvalidAction.hpp:18
+
ComSquare::InvalidAction::what
const char * what() const noexcept override
Definition: InvalidAction.hpp:19
+
ComSquare::InvalidAction
Exception thrown when someone tries to load an invalid rom.
Definition: InvalidAction.hpp:14
+
ComSquare
Definition: APU.cpp:9
+ + + + diff --git a/docs/html/InvalidAddress_8hpp.html b/docs/html/InvalidAddress_8hpp.html new file mode 100644 index 0000000..69219cc --- /dev/null +++ b/docs/html/InvalidAddress_8hpp.html @@ -0,0 +1,128 @@ + + + + + + + +ComSquare: sources/Exceptions/InvalidAddress.hpp File Reference + + + + + + + + + +
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+#include <sstream>
+
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class  ComSquare::InvalidAddress
 Exception thrown when trying to read/write to an invalid address. More...
 
+ + + +

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 ComSquare
 
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+ + + + diff --git a/docs/html/InvalidAddress_8hpp__dep__incl.map b/docs/html/InvalidAddress_8hpp__dep__incl.map new file mode 100644 index 0000000..70c5d34 --- /dev/null +++ b/docs/html/InvalidAddress_8hpp__dep__incl.map @@ -0,0 +1,10 @@ + + + + + + + + + + diff --git a/docs/html/InvalidAddress_8hpp__dep__incl.md5 b/docs/html/InvalidAddress_8hpp__dep__incl.md5 new file mode 100644 index 0000000..3ea806b --- /dev/null +++ b/docs/html/InvalidAddress_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +df0c153236d94f4caa296b34fc8619ea \ No newline at end of file diff --git a/docs/html/InvalidAddress_8hpp__dep__incl.png b/docs/html/InvalidAddress_8hpp__dep__incl.png new file mode 100644 index 0000000..d2b233c Binary files /dev/null and b/docs/html/InvalidAddress_8hpp__dep__incl.png differ diff --git a/docs/html/InvalidAddress_8hpp__incl.map b/docs/html/InvalidAddress_8hpp__incl.map new file mode 100644 index 0000000..01b8f9c --- /dev/null +++ b/docs/html/InvalidAddress_8hpp__incl.map @@ -0,0 +1,7 @@ + + + + + + + diff --git a/docs/html/InvalidAddress_8hpp__incl.md5 b/docs/html/InvalidAddress_8hpp__incl.md5 new file mode 100644 index 0000000..bfe4a2a --- /dev/null +++ b/docs/html/InvalidAddress_8hpp__incl.md5 @@ -0,0 +1 @@ +d24d0ddf5a5d2c8c7416858cd6124a23 \ No newline at end of file diff --git a/docs/html/InvalidAddress_8hpp__incl.png b/docs/html/InvalidAddress_8hpp__incl.png new file mode 100644 index 0000000..c30d0a0 Binary files /dev/null and b/docs/html/InvalidAddress_8hpp__incl.png differ diff --git a/docs/html/InvalidAddress_8hpp_source.html b/docs/html/InvalidAddress_8hpp_source.html new file mode 100644 index 0000000..d1ab603 --- /dev/null +++ b/docs/html/InvalidAddress_8hpp_source.html @@ -0,0 +1,114 @@ + + + + + + + +ComSquare: sources/Exceptions/InvalidAddress.hpp Source File + + + + + + + + + +
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1 //
+
2 // Created by anonymus-raccoon on 1/27/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_INVALIDADDRESS_HPP
+
6 #define COMSQUARE_INVALIDADDRESS_HPP
+
7 
+
8 #include <exception>
+
9 #include <string>
+
10 #include <ios>
+
11 #include <sstream>
+
12 
+
13 namespace ComSquare
+
14 {
+
16  class InvalidAddress : std::exception {
+
17  private:
+
18  std::string _msg;
+
19  public:
+
20  InvalidAddress(std::string where, int32_t addr)
+
21  {
+
22  std::stringstream stream;
+
23  stream << "Could not read/write data at address: 0x" << std::hex << addr << " from " << where;
+
24  this->_msg = stream.str();
+
25  }
+
26  const char *what() const noexcept override { return this->_msg.c_str(); }
+
27  };
+
28 }
+
29 
+
30 #endif //COMSQUARE_INVALIDADDRESS_HPP
+
+
ComSquare::InvalidAddress::what
const char * what() const noexcept override
Definition: InvalidAddress.hpp:26
+
ComSquare::InvalidAddress::_msg
std::string _msg
Definition: InvalidAddress.hpp:18
+
ComSquare::InvalidAddress::InvalidAddress
InvalidAddress(std::string where, int32_t addr)
Definition: InvalidAddress.hpp:20
+
ComSquare::InvalidAddress
Exception thrown when trying to read/write to an invalid address.
Definition: InvalidAddress.hpp:16
+
ComSquare
Definition: APU.cpp:9
+ + + + diff --git a/docs/html/InvalidRom_8hpp.html b/docs/html/InvalidRom_8hpp.html new file mode 100644 index 0000000..bdc37db --- /dev/null +++ b/docs/html/InvalidRom_8hpp.html @@ -0,0 +1,118 @@ + + + + + + + +ComSquare: sources/Exceptions/InvalidRom.hpp File Reference + + + + + + + + + +
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class  ComSquare::InvalidRomException
 Exception thrown when someone tries to load an invalid rom. More...
 
+ + + +

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 ComSquare
 
+
+ + + + diff --git a/docs/html/InvalidRom_8hpp__dep__incl.map b/docs/html/InvalidRom_8hpp__dep__incl.map new file mode 100644 index 0000000..3995cd4 --- /dev/null +++ b/docs/html/InvalidRom_8hpp__dep__incl.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/InvalidRom_8hpp__dep__incl.md5 b/docs/html/InvalidRom_8hpp__dep__incl.md5 new file mode 100644 index 0000000..5d3ee9b --- /dev/null +++ b/docs/html/InvalidRom_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +f8c9ecc09740f11a289e8622cd9fdb5a \ No newline at end of file diff --git a/docs/html/InvalidRom_8hpp__dep__incl.png b/docs/html/InvalidRom_8hpp__dep__incl.png new file mode 100644 index 0000000..52c1634 Binary files /dev/null and b/docs/html/InvalidRom_8hpp__dep__incl.png differ diff --git a/docs/html/InvalidRom_8hpp__incl.map b/docs/html/InvalidRom_8hpp__incl.map new file mode 100644 index 0000000..0448b99 --- /dev/null +++ b/docs/html/InvalidRom_8hpp__incl.map @@ -0,0 +1,5 @@ + + + + + diff --git a/docs/html/InvalidRom_8hpp__incl.md5 b/docs/html/InvalidRom_8hpp__incl.md5 new file mode 100644 index 0000000..2fa836d --- /dev/null +++ b/docs/html/InvalidRom_8hpp__incl.md5 @@ -0,0 +1 @@ +f16d22bb32c2c34654654389a7702617 \ No newline at end of file diff --git a/docs/html/InvalidRom_8hpp__incl.png b/docs/html/InvalidRom_8hpp__incl.png new file mode 100644 index 0000000..866452e Binary files /dev/null and b/docs/html/InvalidRom_8hpp__incl.png differ diff --git a/docs/html/InvalidRom_8hpp_source.html b/docs/html/InvalidRom_8hpp_source.html new file mode 100644 index 0000000..6c8becf --- /dev/null +++ b/docs/html/InvalidRom_8hpp_source.html @@ -0,0 +1,107 @@ + + + + + + + +ComSquare: sources/Exceptions/InvalidRom.hpp Source File + + + + + + + + + +
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1 //
+
2 // Created by anonymus-raccoon on 1/28/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_INVALIDROM_HPP
+
6 #define COMSQUARE_INVALIDROM_HPP
+
7 
+
8 #include <exception>
+
9 #include <string>
+
10 
+
11 namespace ComSquare
+
12 {
+
14  class InvalidRomException : std::exception {
+
15  private:
+
16  std::string _msg;
+
17  public:
+
18  explicit InvalidRomException(const std::string &msg) : _msg(msg) {}
+
19  const char *what() const noexcept override { return this->_msg.c_str(); }
+
20  };
+
21 }
+
22 
+
23 #endif //COMSQUARE_INVALIDROM_HPP
+
+
ComSquare::InvalidRomException::what
const char * what() const noexcept override
Definition: InvalidRom.hpp:19
+
ComSquare::InvalidRomException::InvalidRomException
InvalidRomException(const std::string &msg)
Definition: InvalidRom.hpp:18
+
ComSquare::InvalidRomException
Exception thrown when someone tries to load an invalid rom.
Definition: InvalidRom.hpp:14
+
ComSquare::InvalidRomException::_msg
std::string _msg
Definition: InvalidRom.hpp:16
+
ComSquare
Definition: APU.cpp:9
+ + + + diff --git a/docs/html/MemoryBus_8cpp.html b/docs/html/MemoryBus_8cpp.html new file mode 100644 index 0000000..ad48e5f --- /dev/null +++ b/docs/html/MemoryBus_8cpp.html @@ -0,0 +1,124 @@ + + + + + + + +ComSquare: sources/Memory/MemoryBus.cpp File Reference + + + + + + + + + +
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#include <algorithm>
+#include <iostream>
+#include "MemoryBus.hpp"
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+#include "MemoryShadow.hpp"
+
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#include <cstdint>
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+#include <memory>
+#include "IMemory.hpp"
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class  ComSquare::Memory::MemoryBus
 The memory bus is the component responsible of mapping addresses to components address and transmitting the data. More...
 
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MemoryBus.hpp
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1 //
+
2 // Created by anonymus-raccoon on 1/23/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_MEMORYBUS_HPP
+
6 #define COMSQUARE_MEMORYBUS_HPP
+
7 
+
8 #include <cstdint>
+
9 #include <vector>
+
10 #include <memory>
+
11 #include "IMemory.hpp"
+
12 
+
13 namespace ComSquare
+
14 {
+
15  struct SNES;
+
16 
+
17  namespace Memory
+
18  {
+
20  class MemoryBus {
+
21  private:
+
23  std::vector<std::shared_ptr<IMemory>> _memoryAccessors;
+
24 
+
28  std::shared_ptr<IMemory> getAccessor(uint24_t addr);
+
29 
+
31  uint8_t _openbus = 0;
+
32 
+
36  inline void _mirrorComponents(SNES &console, int i);
+
37 
+
38  public:
+
42  uint8_t read(uint24_t addr);
+
43 
+
47  void write(uint24_t addr, uint8_t data);
+
48 
+
51  void mapComponents(SNES &console);
+
52  };
+
53  }
+
54 }
+
55 
+
56 
+
57 #endif //COMSQUARE_MEMORYBUS_HPP
+
+
ComSquare::Memory::MemoryBus::read
uint8_t read(uint24_t addr)
Read data at a global address.
Definition: MemoryBus.cpp:24
+
ComSquare::Memory::MemoryBus
The memory bus is the component responsible of mapping addresses to components address and transmitti...
Definition: MemoryBus.hpp:20
+
ComSquare::Memory::MemoryBus::_memoryAccessors
std::vector< std::shared_ptr< IMemory > > _memoryAccessors
The list of components registered inside the bus. Every components that can read/write to a public ad...
Definition: MemoryBus.hpp:23
+
ComSquare::SNES
Container of all the components of the SNES.
Definition: SNES.hpp:18
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::Memory::MemoryBus::write
void write(uint24_t addr, uint8_t data)
Write a data to a global address.
Definition: MemoryBus.cpp:37
+
ComSquare::Memory::MemoryBus::getAccessor
std::shared_ptr< IMemory > getAccessor(uint24_t addr)
Helper function to get the components that is responsible of read/write at an address.
Definition: MemoryBus.cpp:13
+
ComSquare::Memory::MemoryBus::_openbus
uint8_t _openbus
The last value read via the memory bus.
Definition: MemoryBus.hpp:31
+
ComSquare::Memory::MemoryBus::mapComponents
void mapComponents(SNES &console)
Map components to the address space using the currently loaded cartridge to set the right mapping mod...
Definition: MemoryBus.cpp:56
+
IMemory.hpp
+
ComSquare::Memory::MemoryBus::_mirrorComponents
void _mirrorComponents(SNES &console, int i)
WRam, CPU, PPU & ALU registers are mirrored to all banks of Q1 & Q3. This function is used for the mi...
Definition: MemoryBus.cpp:48
+
ComSquare
Definition: APU.cpp:9
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1 //
+
2 // Created by anonymus-raccoon on 1/28/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_MEMORYSHADOW_HPP
+
6 #define COMSQUARE_MEMORYSHADOW_HPP
+
7 
+
8 #include <memory>
+
9 #include "IMemory.hpp"
+
10 
+
11 namespace ComSquare::Memory
+
12 {
+
13  class MemoryShadow : public IMemory {
+
14  private:
+
16  std::shared_ptr<IMemory> _initial;
+
17  public:
+
19  explicit MemoryShadow(std::shared_ptr<IMemory> initial, uint24_t start, uint24_t end);
+
20 
+
21  static std::shared_ptr<IMemory> createShadow(std::shared_ptr<IMemory> initial, uint24_t start, uint24_t end);
+
26  uint8_t read(uint24_t addr) override;
+
31  void write(uint24_t addr, uint8_t data) override;
+
32  };
+
33 }
+
34 
+
35 #endif //COMSQUARE_MEMORYSHADOW_HPP
+
+
ComSquare::Memory::MemoryShadow::read
uint8_t read(uint24_t addr) override
Read from the initial IMemory given.
Definition: MemoryShadow.cpp:22
+
ComSquare::Memory::MemoryShadow
Definition: MemoryShadow.hpp:13
+
ComSquare::Memory::MemoryShadow::write
void write(uint24_t addr, uint8_t data) override
Write data to the ram.
Definition: MemoryShadow.cpp:27
+
ComSquare::Memory::MemoryShadow::createShadow
static std::shared_ptr< IMemory > createShadow(std::shared_ptr< IMemory > initial, uint24_t start, uint24_t end)
Definition: MemoryShadow.cpp:17
+
ComSquare::Memory::MemoryShadow::_initial
std::shared_ptr< IMemory > _initial
Memory to shadow from.
Definition: MemoryShadow.hpp:16
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::Memory::IMemory
Common interface implemented by all components mapping memory.
Definition: IMemory.hpp:16
+
ComSquare::Memory
Definition: IMemory.cpp:8
+
IMemory.hpp
+
ComSquare::Memory::MemoryShadow::MemoryShadow
MemoryShadow(std::shared_ptr< IMemory > initial, uint24_t start, uint24_t end)
Create a shadow for the memory given as parameter.
Definition: MemoryShadow.cpp:11
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1 //
+
2 // Created by anonymus-raccoon on 1/27/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_NOTIMPLEMENTEDEXCEPTION_HPP
+
6 #define COMSQUARE_NOTIMPLEMENTEDEXCEPTION_HPP
+
7 
+
8 #include <exception>
+
9 
+
10 namespace ComSquare
+
11 {
+
13  class NotImplementedException : std::exception {
+
14  public:
+
15  explicit NotImplementedException() = default;
+
16  const char *what() const noexcept override { return "Not implemented yet."; }
+
17  };
+
18 }
+
19 
+
20 #endif //COMSQUARE_NOTIMPLEMENTEDEXCEPTION_HPP
+
+
ComSquare::NotImplementedException::what
const char * what() const noexcept override
Definition: NotImplementedException.hpp:16
+
ComSquare::NotImplementedException::NotImplementedException
NotImplementedException()=default
+
ComSquare::NotImplementedException
When this is thrown, it means that we should work more.
Definition: NotImplementedException.hpp:13
+
ComSquare
Definition: APU.cpp:9
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class  ComSquare::PPU::PPU
 The struct containing all the registers the PPU. More...
 
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PPU.hpp
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+Go to the documentation of this file.
1 //
+
2 // Created by cbihan on 1/27/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_PPU_HPP
+
6 #define COMSQUARE_PPU_HPP
+
7 
+
8 #include <stdint-gcc.h>
+
9 #include "../Memory/IMemory.hpp"
+
10 
+
11 namespace ComSquare::PPU
+
12 {
+
14  class PPU : public Memory::IMemory {
+
15  private:
+
17  union {
+
18  struct {
+
19  bool fblank: 1;
+
20  bool _: 3;
+
21  uint8_t brightness: 4;
+
22  };
+
23  uint8_t raw;
+
24  } inidisp;
+
26  union {
+
27  struct {
+
28  uint8_t objectSize: 3;
+
29  bool nameSelect: 2;
+
30  uint8_t baseSelect: 3;
+
31  };
+
32  uint8_t raw;
+
33  } obsel;
+
35  union {
+
36  struct {
+ +
38  uint8_t _: 6;
+
39  uint32_t oamAddress: 9;
+
40  };
+
41  struct {
+
42  uint8_t oamaddh;
+
43  uint8_t oamaddl;
+
44  };
+
45  uint32_t raw;
+
46  } oamadd;
+
48  uint8_t oamdata;
+
50  union {
+
51  struct {
+ + + + + +
57  uint8_t bgMode: 3;
+
58  };
+
59  uint8_t raw;
+
60  } bgmode;
+
62  union {
+
63  struct {
+
64  uint8_t pixelSize: 4;
+
65  bool affectBg4: 1;
+
66  bool affectBg3: 1;
+
67  bool affectBg2: 1;
+
68  bool affectBg1: 1;
+
69  };
+
70  uint8_t raw;
+
71  } mosaic;
+
73  union {
+
74  struct {
+
75  uint8_t tilemapAddress: 6;
+ + +
78  };
+
79  uint8_t raw;
+
80  } bg1sc;
+
82  union {
+
83  struct {
+
84  uint8_t tilemapAddress: 6;
+ + +
87  };
+
88  uint8_t raw;
+
89  } bg2sc;
+
91  union {
+
92  struct {
+
93  uint8_t tilemapAddress: 6;
+ + +
96  };
+
97  uint8_t raw;
+
98  } bg3sc;
+
100  union {
+
101  struct {
+
102  uint8_t tilemapAddress: 6;
+ +
104  bool tilemapVerticalMirroring: 1;
+
105  };
+
106  uint8_t raw;
+
107  } bg4sc;
+
109  union {
+
110  struct {
+
111  uint8_t baseAddressBg2a4: 4;
+
112  uint8_t baseAddressBg1a3: 4;
+
113  };
+
114  uint8_t raw;
+
115  } bg12nba;
+
117  union {
+
118  struct {
+
119  uint8_t baseAddressBg2a4: 4;
+
120  uint8_t baseAddressBg1a3: 4;
+
121  };
+
122  uint8_t raw;
+
123  } bg34nba;
+
126  union {
+
127  struct {
+
128  uint8_t _ : 6;
+
129  uint32_t offsetBg: 10;
+
130  };
+
131  uint16_t raw;
+
132  } bg1ofs;
+
135  union {
+
136  struct {
+
137  uint8_t _ : 3;
+
138  uint32_t offsetBg : 13;
+
139  };
+
140  uint8_t raw;
+
141  } m7ofs;
+
144  union {
+
145  struct {
+
146  uint8_t _ : 6;
+
147  uint32_t offsetBg: 10;
+
148  };
+
149  uint8_t raw;
+
150  } bg2ofs;
+
153  union {
+
154  struct {
+
155  uint8_t _ : 6;
+
156  uint32_t offsetBg: 10;
+
157  };
+
158  uint8_t raw;
+
159  } bg3ofs;
+
162  union {
+
163  struct {
+
164  uint8_t _ : 3;
+
165  uint32_t offsetBg: 10;
+
166  };
+
167  uint8_t raw;
+
168  } bg4ofs;
+
170  union {
+
171  struct {
+
172  bool address: 1;
+
173  uint8_t _ : 3;
+
174  uint8_t addressRemapping: 2;
+
175  uint8_t incrementCount: 2;
+
176  };
+
177  uint8_t raw;
+
178  } vmain;
+
180  union {
+
181  struct {
+
182  uint8_t vmaddh;
+
183  uint8_t vmaddl;
+
184  };
+
185  uint32_t vmadd;
+
186  } vmadd;
+
188  union {
+
189  struct {
+
190  uint8_t vmdatah;
+
191  uint8_t vmdatal;
+
192  };
+
193  uint32_t vmdata;
+
194  } vmdata;
+
196  union {
+
197  struct {
+ +
199  bool emptySpaceFill: 1;
+
200  uint8_t _: 4;
+ + +
203  };
+
204  uint8_t raw;
+
205  } m7sel;
+
208  union {
+
209  struct {
+
210  uint8_t _: 3;
+
211  uint8_t value;
+
212  };
+
213  uint32_t center;
+
214  } m7x;
+
216  union {
+
217  struct {
+
218  uint8_t _: 3;
+
219  uint8_t value;
+
220  };
+
221  uint32_t center;
+
222  } m7y;
+
224  uint8_t cgadd;
+
226  union {
+
227  struct {
+
228  bool _: 1;
+
229  uint8_t blue: 5;
+
230  uint8_t green: 5;
+
231  uint8_t red: 5;
+
232  };
+
233  uint16_t raw;
+
234  } cgdata;
+
236  union {
+
237  struct {
+ + + + + + + + +
246  };
+
247  uint8_t raw;
+
248  } wsel;
+
250  uint8_t wh0;
+
252  uint8_t wh1;
+
254  uint8_t wh2;
+
256  uint8_t wh3;
+
258  union {
+
259  struct {
+
260  uint8_t maskLogicBg1: 2;
+
261  uint8_t maskLogicBg2: 2;
+
262  uint8_t maskLogicBg3: 2;
+
263  uint8_t maskLogicBg4: 2;
+
264  };
+
265  uint8_t raw;
+
266  } wbglog;
+
268  union {
+
269  struct {
+
270  uint8_t _: 4;
+
271  uint8_t maskLogicObj: 2;
+
272  uint8_t maskLogicColor: 2;
+
273  };
+
274  uint8_t raw;
+
275  } wobjlog;
+
277  union {
+
278  struct {
+
279  uint8_t _: 3;
+ + + + + +
285  };
+
286  uint8_t raw;
+
287  } tm;
+
289  union {
+
290  struct {
+
291  uint8_t _: 3;
+
292  bool enableWindowDisplayObj: 1;
+
293  bool enableWindowDisplayBg4: 1;
+
294  bool enableWindowDisplayBg3: 1;
+
295  bool enableWindowDisplayBg2: 1;
+
296  bool enableWindowDisplayBg1: 1;
+
297  };
+
298  uint8_t raw;
+
299  } ts;
+
301  union {
+
302  struct {
+
303  uint8_t _: 3;
+ + + + + +
309  };
+
310  uint8_t raw;
+
311  } tmw;
+
313  union {
+
314  struct {
+
315  uint8_t _: 3;
+
316  bool enableWindowMaskingObj: 1;
+
317  bool enableWindowMaskingBg4: 1;
+
318  bool enableWindowMaskingBg3: 1;
+
319  bool enableWindowMaskingBg2: 1;
+
320  bool enableWindowMaskingBg1: 1;
+
321  };
+
322  uint8_t raw;
+
323  } tsw;
+
325  union {
+
326  struct {
+ +
328  uint8_t preventColorMath: 2;
+
329  uint8_t _: 2;
+
330  bool addSubscreen: 1;
+ +
332  };
+
333  uint8_t raw;
+
334  } cgwsel;
+
336  union {
+
337  struct {
+ +
339  bool halfColorMath: 1;
+ + + + + + +
346  };
+
347  uint8_t raw;
+
348  } cgadsub;
+
350  union {
+
351  struct {
+
352  bool blue: 1;
+
353  bool green: 1;
+
354  bool red: 1;
+
355  uint8_t colorIntensity: 5;
+
356  };
+
357  uint8_t raw;
+
358  } coldata;
+
360  union {
+
361  struct {
+
362  bool externalSync: 1;
+
363  bool mode7ExtBg: 1;
+
364  uint8_t _: 2;
+ +
366  bool overscanMode: 1;
+
367  bool objInterlace: 1;
+ +
369  };
+
370  uint8_t raw;
+
371  } setini;
+
373  union {
+
374  struct {
+
375  uint8_t mpyl;
+
376  uint8_t mpym;
+
377  uint8_t mpyh;
+
378  };
+
379  uint32_t mpy;
+
380  } mpy;
+
381  public:
+
382  explicit PPU() = default;
+
387  uint8_t read(uint24_t addr) override;
+
392  void write(uint24_t addr, uint8_t data) override;
+
395  void update(int cycles);
+
396  };
+
397 }
+
398 #endif //COMSQUARE_PPU_HPP
+
+
ComSquare::PPU::PPU::enablePseudoHiresMode
bool enablePseudoHiresMode
Definition: PPU.hpp:365
+
ComSquare::PPU::PPU::externalSync
bool externalSync
Definition: PPU.hpp:362
+
ComSquare::PPU::PPU::red
uint8_t red
Definition: PPU.hpp:231
+
ComSquare::PPU::PPU::oamdata
uint8_t oamdata
OAMDATA Register (Data for OAM write)
Definition: PPU.hpp:48
+
ComSquare::PPU::PPU::wobjlog
union ComSquare::PPU::PPU::@101 wobjlog
WOBJLOG Register (Window mask logic for OBJs and Color Window)
+
ComSquare::PPU::PPU::ts
union ComSquare::PPU::PPU::@103 ts
TS Register (Sub Screen Designation)
+
ComSquare::PPU::PPU::enableWindowMaskingBg4
bool enableWindowMaskingBg4
Definition: PPU.hpp:305
+
ComSquare::PPU::PPU::maskLogicBg4
uint8_t maskLogicBg4
Definition: PPU.hpp:263
+
ComSquare::PPU::PPU::enableWindow2ForBg1Bg3Obj
bool enableWindow2ForBg1Bg3Obj
Definition: PPU.hpp:242
+
ComSquare::PPU::PPU::write
void write(uint24_t addr, uint8_t data) override
Write data to this component.
Definition: PPU.cpp:25
+
ComSquare::PPU::PPU::bg3ofs
union ComSquare::PPU::PPU::@90 bg3ofs
BG3HOFS Register (BG3 Horizontal Scroll)
+
ComSquare::PPU::PPU::enableWindow1ForBg1Bg2Obj
bool enableWindow1ForBg1Bg2Obj
Definition: PPU.hpp:244
+
ComSquare::PPU::PPU::bg4ofs
union ComSquare::PPU::PPU::@91 bg4ofs
BG4HOFS Register (BG4 Horizontal Scroll)
+
ComSquare::PPU::PPU::update
void update(int cycles)
Update the PPU of n cycles.
Definition: PPU.cpp:73
+
ComSquare::PPU::PPU::vmdatah
uint8_t vmdatah
Definition: PPU.hpp:190
+
ComSquare::PPU::PPU::enableWindowMaskingBg1
bool enableWindowMaskingBg1
Definition: PPU.hpp:308
+
ComSquare::PPU::PPU::maskLogicBg1
uint8_t maskLogicBg1
Definition: PPU.hpp:260
+
ComSquare::PPU::PPU::screenInterlace
bool screenInterlace
Definition: PPU.hpp:368
+
ComSquare::PPU::PPU::overscanMode
bool overscanMode
Definition: PPU.hpp:366
+
ComSquare::PPU::PPU::affectBg1
bool affectBg1
Definition: PPU.hpp:68
+
ComSquare::PPU::PPU::bg4sc
union ComSquare::PPU::PPU::@84 bg4sc
BG4SC Register (BG4 Tilemap Address and Size)
+
ComSquare::PPU::PPU::tsw
union ComSquare::PPU::PPU::@105 tsw
TSW Register (Window Mask Designation for the Sub Screen)
+
ComSquare::PPU::PPU::maskLogicColor
uint8_t maskLogicColor
Definition: PPU.hpp:272
+
ComSquare::PPU::PPU::baseAddressBg2a4
uint8_t baseAddressBg2a4
Definition: PPU.hpp:111
+
ComSquare::PPU::PPU::affectBg4
bool affectBg4
Definition: PPU.hpp:65
+
ComSquare::PPU::PPU::enableWindowMaskingBg2
bool enableWindowMaskingBg2
Definition: PPU.hpp:307
+
ComSquare::PPU::PPU::baseSelect
uint8_t baseSelect
Definition: PPU.hpp:30
+
ComSquare::PPU::PPU::enableColorMathBg3
bool enableColorMathBg3
Definition: PPU.hpp:343
+
ComSquare::PPU::PPU::_
uint8_t _
Definition: PPU.hpp:38
+
ComSquare::PPU::PPU::value
uint8_t value
Definition: PPU.hpp:211
+
ComSquare::PPU::PPU::setini
union ComSquare::PPU::PPU::@109 setini
SETINI Register (Screen Mode/Video Select)
+
ComSquare::PPU::PPU::mode7ExtBg
bool mode7ExtBg
Definition: PPU.hpp:363
+
ComSquare::PPU::PPU::enableWindowMaskingObj
bool enableWindowMaskingObj
Definition: PPU.hpp:304
+
ComSquare::PPU::PPU::addSubscreen
bool addSubscreen
Definition: PPU.hpp:330
+
ComSquare::PPU::PPU::wh2
uint8_t wh2
WH2 Register (CWindow 2 Left Position)
Definition: PPU.hpp:254
+
ComSquare::PPU::PPU::enableWindow1ForBg2Bg4Color
bool enableWindow1ForBg2Bg4Color
Definition: PPU.hpp:240
+
ComSquare::PPU::PPU::wsel
union ComSquare::PPU::PPU::@99 wsel
W12SEL - W34SEL Registers (Window Mask Settings for BGs) and WOBJSEL Register (Window Mask Settings f...
+
ComSquare::PPU::PPU::addSubtractSelect
bool addSubtractSelect
Definition: PPU.hpp:338
+
ComSquare::PPU::PPU::enableWindow2ForBg2Bg4Color
bool enableWindow2ForBg2Bg4Color
Definition: PPU.hpp:238
+
ComSquare::PPU::PPU::cgdata
union ComSquare::PPU::PPU::@98 cgdata
CGDATA Register (CGRAM Data write)
+
ComSquare::PPU::PPU::characterSizeBg1
bool characterSizeBg1
Definition: PPU.hpp:55
+
ComSquare::PPU::PPU::vmdata
uint32_t vmdata
Definition: PPU.hpp:193
+
ComSquare::PPU::PPU::enableColorMathObj
bool enableColorMathObj
Definition: PPU.hpp:341
+
ComSquare::PPU::PPU::addressRemapping
uint8_t addressRemapping
Definition: PPU.hpp:174
+
ComSquare::PPU::PPU::PPU
PPU()=default
+
ComSquare::PPU::PPU::affectBg2
bool affectBg2
Definition: PPU.hpp:67
+
ComSquare::PPU::PPU::window1InversionForBg2Bg4Color
bool window1InversionForBg2Bg4Color
Definition: PPU.hpp:241
+
ComSquare::PPU::PPU::vmaddl
uint8_t vmaddl
Definition: PPU.hpp:183
+
ComSquare::PPU::PPU::enableWindowMaskingBg3
bool enableWindowMaskingBg3
Definition: PPU.hpp:306
+
ComSquare::PPU::PPU::tilemapHorizontalMirroring
bool tilemapHorizontalMirroring
Definition: PPU.hpp:76
+
ComSquare::PPU::PPU::oamAddress
uint32_t oamAddress
Definition: PPU.hpp:39
+
ComSquare::PPU::PPU::obsel
union ComSquare::PPU::PPU::@77 obsel
OBSEL Register (Object Size and Character Address)
+
ComSquare::PPU::PPU::wh0
uint8_t wh0
WH0 Register (CWindow 1 Left Position)
Definition: PPU.hpp:250
+
ComSquare::PPU::PPU::preventColorMath
uint8_t preventColorMath
Definition: PPU.hpp:328
+
ComSquare::PPU::PPU::characterSizeBg2
bool characterSizeBg2
Definition: PPU.hpp:54
+
ComSquare::PPU
Definition: PPU.cpp:9
+
ComSquare::PPU::PPU::mode1Bg3PriorityBit
bool mode1Bg3PriorityBit
Definition: PPU.hpp:56
+
ComSquare::PPU::PPU::m7x
union ComSquare::PPU::PPU::@96 m7x
M7X Register (Mode 7 Center X)
+
ComSquare::PPU::PPU::oamaddl
uint8_t oamaddl
Definition: PPU.hpp:43
+
ComSquare::PPU::PPU::bg3sc
union ComSquare::PPU::PPU::@83 bg3sc
BG3SC Register (BG3 Tilemap Address and Size)
+
ComSquare::PPU::PPU::enableWindowDisplayObj
bool enableWindowDisplayObj
Definition: PPU.hpp:280
+
ComSquare::PPU::PPU::objPriorityActivationBit
bool objPriorityActivationBit
Definition: PPU.hpp:37
+
ComSquare::PPU::PPU::halfColorMath
bool halfColorMath
Definition: PPU.hpp:339
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::PPU::PPU::tmw
union ComSquare::PPU::PPU::@104 tmw
TMW Register (Window Mask Designation for the Main Screen)
+
ComSquare::PPU::PPU::maskLogicBg2
uint8_t maskLogicBg2
Definition: PPU.hpp:261
+
ComSquare::PPU::PPU::tilemapVerticalMirroring
bool tilemapVerticalMirroring
Definition: PPU.hpp:77
+
ComSquare::Memory::IMemory
Common interface implemented by all components mapping memory.
Definition: IMemory.hpp:16
+
ComSquare::PPU::PPU::mpy
uint32_t mpy
Definition: PPU.hpp:379
+
ComSquare::PPU::PPU::blue
uint8_t blue
Definition: PPU.hpp:229
+
ComSquare::PPU::PPU::raw
uint16_t raw
Definition: PPU.hpp:131
+
ComSquare::PPU::PPU::maskLogicObj
uint8_t maskLogicObj
Definition: PPU.hpp:271
+
ComSquare::PPU::PPU::enableColorMathBackdrop
bool enableColorMathBackdrop
Definition: PPU.hpp:340
+
ComSquare::PPU::PPU::bg1sc
union ComSquare::PPU::PPU::@81 bg1sc
BG1SC Register (BG1 Tilemap Address and Size)
+
ComSquare::PPU::PPU::offsetBg
uint32_t offsetBg
Definition: PPU.hpp:129
+
ComSquare::PPU::PPU::bg1ofs
union ComSquare::PPU::PPU::@87 bg1ofs
BG1HOFS Register (BG1 Horizontal Scroll)
+
ComSquare::PPU::PPU::colorIntensity
uint8_t colorIntensity
Definition: PPU.hpp:355
+
ComSquare::PPU::PPU::green
uint8_t green
Definition: PPU.hpp:230
+
ComSquare::PPU::PPU::horizontalMirroring
bool horizontalMirroring
Definition: PPU.hpp:201
+
ComSquare::PPU::PPU::nameSelect
bool nameSelect
Definition: PPU.hpp:29
+
ComSquare::PPU::PPU::enableWindowDisplayBg2
bool enableWindowDisplayBg2
Definition: PPU.hpp:283
+
ComSquare::PPU::PPU::wh3
uint8_t wh3
WH3 Register (CWindow 2 Right Position)
Definition: PPU.hpp:256
+
ComSquare::PPU::PPU::window2InversionForBg1Bg3Obj
bool window2InversionForBg1Bg3Obj
Definition: PPU.hpp:243
+
ComSquare::PPU::PPU::inidisp
union ComSquare::PPU::PPU::@76 inidisp
INIDISP Register (F-blank and Brightness)
+
ComSquare::PPU::PPU::m7y
union ComSquare::PPU::PPU::@97 m7y
M7Y Register (Mode 7 Center Y)
+
ComSquare::PPU::PPU::characterSizeBg4
bool characterSizeBg4
Definition: PPU.hpp:52
+
ComSquare::PPU::PPU::center
uint32_t center
Definition: PPU.hpp:213
+
ComSquare::PPU::PPU::tilemapAddress
uint8_t tilemapAddress
Definition: PPU.hpp:75
+
ComSquare::PPU::PPU::mpyh
uint8_t mpyh
Definition: PPU.hpp:377
+
ComSquare::PPU::PPU::mpym
uint8_t mpym
Definition: PPU.hpp:376
+
ComSquare::PPU::PPU::emptySpaceFill
bool emptySpaceFill
Definition: PPU.hpp:199
+
ComSquare::PPU::PPU::enableWindowDisplayBg4
bool enableWindowDisplayBg4
Definition: PPU.hpp:281
+
ComSquare::PPU::PPU::enableColorMathBg1
bool enableColorMathBg1
Definition: PPU.hpp:345
+
ComSquare::PPU::PPU::objectSize
uint8_t objectSize
Definition: PPU.hpp:28
+
ComSquare::PPU::PPU::m7ofs
union ComSquare::PPU::PPU::@88 m7ofs
M7HOFS Register (Mode 7 BG Horizontal Scroll)
+
ComSquare::PPU::PPU::pixelSize
uint8_t pixelSize
Definition: PPU.hpp:64
+
ComSquare::PPU::PPU::affectBg3
bool affectBg3
Definition: PPU.hpp:66
+
ComSquare::PPU::PPU::clipColorToBlackBeforeMath
uint8_t clipColorToBlackBeforeMath
Definition: PPU.hpp:327
+
ComSquare::PPU::PPU::red
bool red
Definition: PPU.hpp:354
+
ComSquare::PPU::PPU::cgadd
uint8_t cgadd
CGADD Register (CGRAM Address)
Definition: PPU.hpp:224
+
ComSquare::PPU::PPU::bg34nba
union ComSquare::PPU::PPU::@86 bg34nba
BG34NBA Register (BG3 and 4 Chr Address)
+
ComSquare::PPU::PPU::_
bool _
Definition: PPU.hpp:20
+
ComSquare::PPU::PPU::mosaic
union ComSquare::PPU::PPU::@80 mosaic
MOSAIC Register (Screen Pixelation)
+
ComSquare::PPU::PPU::bg2sc
union ComSquare::PPU::PPU::@82 bg2sc
BG2SC Register (BG2 Tilemap Address and Size)
+
ComSquare::PPU::PPU::blue
bool blue
Definition: PPU.hpp:352
+
ComSquare::PPU::PPU::vmaddh
uint8_t vmaddh
Definition: PPU.hpp:182
+
ComSquare::PPU::PPU::green
bool green
Definition: PPU.hpp:353
+
ComSquare::PPU::PPU::bg2ofs
union ComSquare::PPU::PPU::@89 bg2ofs
BG2HOFS Register (BG2 Horizontal Scroll)
+
ComSquare::PPU::PPU::window2InversionForBg2Bg4Color
bool window2InversionForBg2Bg4Color
Definition: PPU.hpp:239
+
ComSquare::PPU::PPU::raw
uint32_t raw
Definition: PPU.hpp:45
+
ComSquare::PPU::PPU::bgmode
union ComSquare::PPU::PPU::@79 bgmode
BGMODE Register (OAM Address and Obj Priority)
+
ComSquare::PPU::PPU::wh1
uint8_t wh1
WH1 Register (CWindow 1 Right Position)
Definition: PPU.hpp:252
+
ComSquare::PPU::PPU::address
bool address
Definition: PPU.hpp:172
+
ComSquare::PPU::PPU::fblank
bool fblank
Definition: PPU.hpp:19
+
ComSquare::PPU::PPU::bg12nba
union ComSquare::PPU::PPU::@85 bg12nba
BG12NBA Register (BG1 and 2 Chr Address)
+
ComSquare::PPU::PPU::vmadd
uint32_t vmadd
Definition: PPU.hpp:185
+
ComSquare::PPU::PPU::directColorMode
bool directColorMode
Definition: PPU.hpp:331
+
ComSquare::PPU::PPU::tm
union ComSquare::PPU::PPU::@102 tm
TM Register (Main Screen Designation)
+
ComSquare::PPU::PPU::wbglog
union ComSquare::PPU::PPU::@100 wbglog
WBGLOG Register (Window mask logic for BGs)
+
ComSquare::PPU::PPU::cgadsub
union ComSquare::PPU::PPU::@107 cgadsub
CGADSUB Register (Color Math designation)
+
ComSquare::PPU::PPU::oamadd
union ComSquare::PPU::PPU::@78 oamadd
OAMADD Register (OAM Address and Obj Priority)
+
ComSquare::PPU::PPU::playingFieldSize
bool playingFieldSize
Definition: PPU.hpp:198
+
ComSquare::PPU::PPU::window1InversionForBg1Bg2Obj
bool window1InversionForBg1Bg2Obj
Definition: PPU.hpp:245
+
ComSquare::PPU::PPU::vmdatal
uint8_t vmdatal
Definition: PPU.hpp:191
+
ComSquare::PPU::PPU::enableColorMathBg4
bool enableColorMathBg4
Definition: PPU.hpp:342
+
ComSquare::PPU::PPU::vmain
union ComSquare::PPU::PPU::@92 vmain
VMAIN Register (Video Port Control)
+
ComSquare::PPU::PPU::incrementCount
uint8_t incrementCount
Definition: PPU.hpp:175
+
ComSquare::PPU::PPU::cgwsel
union ComSquare::PPU::PPU::@106 cgwsel
CGWSEL Register (Color Addition Select)
+
ComSquare::PPU::PPU::coldata
union ComSquare::PPU::PPU::@108 coldata
COLDATA Register (Fixed Color Data)
+
ComSquare::PPU::PPU::characterSizeBg3
bool characterSizeBg3
Definition: PPU.hpp:53
+
ComSquare::PPU::PPU::oamaddh
uint8_t oamaddh
Definition: PPU.hpp:42
+
ComSquare::PPU::PPU::baseAddressBg1a3
uint8_t baseAddressBg1a3
Definition: PPU.hpp:112
+
ComSquare::PPU::PPU::read
uint8_t read(uint24_t addr) override
Read data from the component.
Definition: PPU.cpp:11
+
ComSquare::PPU::PPU::bgMode
uint8_t bgMode
Definition: PPU.hpp:57
+
ComSquare::PPU::PPU::mpyl
uint8_t mpyl
Definition: PPU.hpp:375
+
ComSquare::PPU::PPU::objInterlace
bool objInterlace
Definition: PPU.hpp:367
+
ComSquare::PPU::PPU::verticalMirroring
bool verticalMirroring
Definition: PPU.hpp:202
+
ComSquare::PPU::PPU::enableWindowDisplayBg3
bool enableWindowDisplayBg3
Definition: PPU.hpp:282
+
ComSquare::PPU::PPU::raw
uint8_t raw
Definition: PPU.hpp:23
+
ComSquare::PPU::PPU::enableWindowDisplayBg1
bool enableWindowDisplayBg1
Definition: PPU.hpp:284
+
ComSquare::PPU::PPU::m7sel
union ComSquare::PPU::PPU::@95 m7sel
M7SEL Register (Mode 7 Settings)
+
ComSquare::PPU::PPU::brightness
uint8_t brightness
Definition: PPU.hpp:21
+
ComSquare::PPU::PPU::enableColorMathBg2
bool enableColorMathBg2
Definition: PPU.hpp:344
+
ComSquare::PPU::PPU::maskLogicBg3
uint8_t maskLogicBg3
Definition: PPU.hpp:262
+
ComSquare::PPU::PPU
The struct containing all the registers the PPU.
Definition: PPU.hpp:14
+ + + + diff --git a/docs/html/README_8md.html b/docs/html/README_8md.html new file mode 100644 index 0000000..2c77cac --- /dev/null +++ b/docs/html/README_8md.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: README.md File Reference + + + + + + + + + +
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+ + + + diff --git a/docs/html/Ram_8hpp__dep__incl.map b/docs/html/Ram_8hpp__dep__incl.map new file mode 100644 index 0000000..4cb4c46 --- /dev/null +++ b/docs/html/Ram_8hpp__dep__incl.map @@ -0,0 +1,8 @@ + + + + + + + + diff --git a/docs/html/Ram_8hpp__dep__incl.md5 b/docs/html/Ram_8hpp__dep__incl.md5 new file mode 100644 index 0000000..35fd656 --- /dev/null +++ b/docs/html/Ram_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +54a17d79c13286e2d67bd68e6abdba3e \ No newline at end of file diff --git a/docs/html/Ram_8hpp__dep__incl.png b/docs/html/Ram_8hpp__dep__incl.png new file mode 100644 index 0000000..797a013 Binary files /dev/null and b/docs/html/Ram_8hpp__dep__incl.png differ diff --git a/docs/html/Ram_8hpp__incl.map b/docs/html/Ram_8hpp__incl.map new file mode 100644 index 0000000..dce103e --- /dev/null +++ b/docs/html/Ram_8hpp__incl.map @@ -0,0 +1,7 @@ + + + + + + + diff --git a/docs/html/Ram_8hpp__incl.md5 b/docs/html/Ram_8hpp__incl.md5 new file mode 100644 index 0000000..e3f779d --- /dev/null +++ b/docs/html/Ram_8hpp__incl.md5 @@ -0,0 +1 @@ +669059a64ea4290031671b1cd7c16d1e \ No newline at end of file diff --git a/docs/html/Ram_8hpp__incl.png b/docs/html/Ram_8hpp__incl.png new file mode 100644 index 0000000..b4f293c Binary files /dev/null and b/docs/html/Ram_8hpp__incl.png differ diff --git a/docs/html/Ram_8hpp_source.html b/docs/html/Ram_8hpp_source.html new file mode 100644 index 0000000..bddd28a --- /dev/null +++ b/docs/html/Ram_8hpp_source.html @@ -0,0 +1,114 @@ + + + + + + + +ComSquare: sources/Ram/Ram.hpp Source File + + + + + + + + + +
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Ram.hpp
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+Go to the documentation of this file.
1 //
+
2 // Created by anonymus-raccoon on 1/28/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_RAM_HPP
+
6 #define COMSQUARE_RAM_HPP
+
7 
+
8 #include "../Memory/IMemory.hpp"
+
9 
+
10 namespace ComSquare::Ram
+
11 {
+
12  class Ram : public Memory::IMemory {
+
13  private:
+
15  uint8_t *_data;
+
17  size_t _size;
+
18  public:
+
20  explicit Ram(size_t size);
+
22  ~Ram();
+
27  uint8_t read(uint24_t addr) override;
+
32  void write(uint24_t addr, uint8_t data) override;
+
33  };
+
34 }
+
35 
+
36 #endif //COMSQUARE_RAM_HPP
+
+
ComSquare::Ram::Ram
Definition: Ram.hpp:12
+
ComSquare::Ram
Definition: Ram.cpp:8
+
ComSquare::Ram::Ram::Ram
Ram(size_t size)
Load a rom from it's path.
Definition: Ram.cpp:10
+
uint24_t
unsigned uint24_t
Definition: Ints.hpp:8
+
ComSquare::Memory::IMemory
Common interface implemented by all components mapping memory.
Definition: IMemory.hpp:16
+
ComSquare::Ram::Ram::_data
uint8_t * _data
The ram. (Can be used for WRam, SRam, VRam etc)
Definition: Ram.hpp:15
+
ComSquare::Ram::Ram::_size
size_t _size
The size of the ram.
Definition: Ram.hpp:17
+
ComSquare::Ram::Ram::write
void write(uint24_t addr, uint8_t data) override
Write data to the ram.
Definition: Ram.cpp:28
+
ComSquare::Ram::Ram::read
uint8_t read(uint24_t addr) override
Read from the ram.
Definition: Ram.cpp:21
+
ComSquare::Ram::Ram::~Ram
~Ram()
Destructor that free the ram.
Definition: Ram.cpp:16
+ + + + diff --git a/docs/html/SFRenderer_8cpp.html b/docs/html/SFRenderer_8cpp.html new file mode 100644 index 0000000..6d5f362 --- /dev/null +++ b/docs/html/SFRenderer_8cpp.html @@ -0,0 +1,107 @@ + + + + + + + +ComSquare: sources/Renderer/SFRenderer.cpp File Reference + + + + + + + + + +
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SFRenderer.hpp File Reference
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#include "IRenderer.hpp"
+#include <SFML/Graphics.hpp>
+#include <SFML/Audio.hpp>
+#include <SFML/System.hpp>
+#include <SFML/Window.hpp>
+#include <SFML/Graphics//RenderWindow.hpp>
+
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1 //
+
2 // Created by cbihan on 1/30/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_SFRENDERER_HPP
+
6 #define COMSQUARE_SFRENDERER_HPP
+
7 
+
8 #include "IRenderer.hpp"
+
9 #include <SFML/Graphics.hpp>
+
10 #include <SFML/Audio.hpp>
+
11 #include <SFML/System.hpp>
+
12 #include <SFML/Window.hpp>
+
13 #include <SFML/Graphics//RenderWindow.hpp>
+
14 
+
15 namespace ComSquare::Renderer
+
16 {
+
17  class SFRenderer : public IRenderer {
+
18  private:
+
20  sf::Window window;
+
22  sf::VideoMode videoMode;
+
23  public:
+
26  void setWindowName(std::string) override;
+
28  void drawScreen() override;
+
33  void putPixel(int x, int y, uint8_t rgba) override ;
+
34  };
+
35 }
+
36 
+
37 #endif //COMSQUARE_SFRENDERER_HPP
+
+
ComSquare::Renderer::SFRenderer::putPixel
void putPixel(int x, int y, uint8_t rgba) override
Add a pixel to the buffer to the coordinates x, y with the color rgba.
Definition: SFRenderer.cpp:19
+
ComSquare::Renderer::SFRenderer::setWindowName
void setWindowName(std::string) override
Set a new name to the window, if there is already a name it will be overwrite.
Definition: SFRenderer.cpp:9
+
ComSquare::Renderer::SFRenderer::window
sf::Window window
The main Window.
Definition: SFRenderer.hpp:20
+
ComSquare::Renderer::SFRenderer::drawScreen
void drawScreen() override
Update the screen by printing the buffer.
Definition: SFRenderer.cpp:14
+
ComSquare::Renderer
Definition: IRenderer.hpp:10
+
ComSquare::Renderer::SFRenderer
Definition: SFRenderer.hpp:17
+
ComSquare::Renderer::SFRenderer::videoMode
sf::VideoMode videoMode
Video Mode containing the height and width of the window.
Definition: SFRenderer.hpp:22
+
ComSquare::Renderer::IRenderer
Definition: IRenderer.hpp:12
+
IRenderer.hpp
+ + + + diff --git a/docs/html/SNES_8cpp.html b/docs/html/SNES_8cpp.html new file mode 100644 index 0000000..6bb571d --- /dev/null +++ b/docs/html/SNES_8cpp.html @@ -0,0 +1,115 @@ + + + + + + + +ComSquare: sources/SNES.cpp File Reference + + + + + + + + + +
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SNES.hpp File Reference
+
+
+
#include "Memory/MemoryBus.hpp"
+#include "CPU/CPU.hpp"
+#include "Cartridge/Cartridge.hpp"
+#include "Ram/Ram.hpp"
+#include "PPU/PPU.hpp"
+#include "APU/APU.hpp"
+
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struct  ComSquare::SNES
 Container of all the components of the SNES. More...
 
+ + + +

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 ComSquare
 
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1 //
+
2 // Created by anonymus-raccoon on 1/27/20.
+
3 //
+
4 
+
5 #ifndef COMSQUARE_SNES_HPP
+
6 #define COMSQUARE_SNES_HPP
+
7 
+
8 #include "Memory/MemoryBus.hpp"
+
9 #include "CPU/CPU.hpp"
+
10 #include "Cartridge/Cartridge.hpp"
+
11 #include "Ram/Ram.hpp"
+
12 #include "PPU/PPU.hpp"
+
13 #include "APU/APU.hpp"
+
14 
+
15 namespace ComSquare
+
16 {
+
18  struct SNES {
+
19  public:
+
20  std::shared_ptr<CPU::CPU> cpu;
+
21  std::shared_ptr<PPU::PPU> ppu;
+
22  std::shared_ptr<APU::APU> apu;
+
23  std::shared_ptr<Cartridge::Cartridge> cartridge;
+
24  std::shared_ptr<Ram::Ram> wram;
+
26  SNES(const std::shared_ptr<Memory::MemoryBus> &bus, const std::string &ramPath);
+
27  };
+
28 }
+
29 
+
30 #endif //COMSQUARE_SNES_HPP
+
+
MemoryBus.hpp
+
CPU.hpp
+
ComSquare::SNES::cpu
std::shared_ptr< CPU::CPU > cpu
Definition: SNES.hpp:20
+
Cartridge.hpp
+
ComSquare::SNES
Container of all the components of the SNES.
Definition: SNES.hpp:18
+
ComSquare::SNES::ppu
std::shared_ptr< PPU::PPU > ppu
Definition: SNES.hpp:21
+
APU.hpp
+
ComSquare::SNES::SNES
SNES(const std::shared_ptr< Memory::MemoryBus > &bus, const std::string &ramPath)
Create all the components using a common memory bus for all of them.
Definition: SNES.cpp:9
+
ComSquare::SNES::apu
std::shared_ptr< APU::APU > apu
Definition: SNES.hpp:22
+
ComSquare::SNES::cartridge
std::shared_ptr< Cartridge::Cartridge > cartridge
Definition: SNES.hpp:23
+
Ram.hpp
+
ComSquare::SNES::wram
std::shared_ptr< Ram::Ram > wram
Definition: SNES.hpp:24
+
ComSquare
Definition: APU.cpp:9
+
PPU.hpp
+ + + + diff --git a/docs/html/TargetDirectories_8txt.html b/docs/html/TargetDirectories_8txt.html new file mode 100644 index 0000000..bc89fa0 --- /dev/null +++ b/docs/html/TargetDirectories_8txt.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: cmake-build-debug/CMakeFiles/TargetDirectories.txt File Reference + + + + + + + + + +
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cmake-build-debug/CMakeFiles/TargetDirectories.txt File Reference
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+ + + + diff --git a/docs/html/annotated.html b/docs/html/annotated.html new file mode 100644 index 0000000..b26d54b --- /dev/null +++ b/docs/html/annotated.html @@ -0,0 +1,115 @@ + + + + + + + +ComSquare: Class List + + + + + + + + + +
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ComSquare +
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+
Class List
+
+
+
Here are the classes, structs, unions and interfaces with brief descriptions:
+
[detail level 1234]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
 NComSquare
 NAPU
 NDSP
 CDSP
 CRegistersAll the registers of the DSP
 CAPU
 CInternalRegisters
 CpswProgram Status Word register
 CRegisters
 NCartridge
 CCartridgeContains the rom's memory/instructions
 CHeader
 CInterruptVectors
 NCPU
 CCPUThe main CPU
 CInternalRegistersStruct containing internal registers of the CPU
 CRegistersStruct containing registers for the main CPU
 CpThe Processor status register;
 NMemory
 CIMemoryCommon interface implemented by all components mapping memory
 CIRectangleMemorySuperset of the IMemory to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at FFFF)
 CMemoryBusThe memory bus is the component responsible of mapping addresses to components address and transmitting the data
 CMemoryShadow
 NPPU
 CPPUThe struct containing all the registers the PPU
 NRam
 CRam
 NRenderer
 CIRenderer
 CSFRenderer
 CInvalidActionException thrown when someone tries to load an invalid rom
 CInvalidAddressException thrown when trying to read/write to an invalid address
 CInvalidRomExceptionException thrown when someone tries to load an invalid rom
 CNotImplementedExceptionWhen this is thrown, it means that we should work more
 CSNESContainer of all the components of the SNES
+
+
+ + + + diff --git a/docs/html/bc_s.png b/docs/html/bc_s.png new file mode 100644 index 0000000..224b29a Binary files /dev/null and b/docs/html/bc_s.png differ diff --git a/docs/html/bdwn.png b/docs/html/bdwn.png new file mode 100644 index 0000000..940a0b9 Binary files /dev/null and b/docs/html/bdwn.png differ diff --git a/docs/html/classComSquare_1_1APU_1_1APU-members.html b/docs/html/classComSquare_1_1APU_1_1APU-members.html new file mode 100644 index 0000000..c5902bc --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1APU-members.html @@ -0,0 +1,95 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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+
ComSquare::APU::APU Member List
+
+
+ +

This is the complete list of members for ComSquare::APU::APU, including all inherited members.

+ + + + + + + + + + + + + +
_dspComSquare::APU::APUprivate
_endComSquare::Memory::IMemoryprivate
_internalRegistersComSquare::APU::APUprivate
_registersComSquare::APU::APUprivate
_startComSquare::Memory::IMemoryprivate
APU()ComSquare::APU::APUexplicit
getStart()ComSquare::Memory::IMemoryvirtual
hasMemoryAt(uint24_t addr)ComSquare::Memory::IMemoryvirtual
read(uint24_t addr) overrideComSquare::APU::APUvirtual
setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemory
update()ComSquare::APU::APU
write(uint24_t addr, uint8_t data) overrideComSquare::APU::APUvirtual
+ + + + diff --git a/docs/html/classComSquare_1_1APU_1_1APU.html b/docs/html/classComSquare_1_1APU_1_1APU.html new file mode 100644 index 0000000..1b593e5 --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1APU.html @@ -0,0 +1,359 @@ + + + + + + + +ComSquare: ComSquare::APU::APU Class Reference + + + + + + + + + +
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+
ComSquare +
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+Public Member Functions | +Private Attributes | +List of all members
+
+
ComSquare::APU::APU Class Reference
+
+
+ +

#include <APU.hpp>

+
+Inheritance diagram for ComSquare::APU::APU:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::APU::APU:
+
+
Collaboration graph
+ + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

 APU ()
 
uint8_t read (uint24_t addr) override
 Read from the internal APU register. More...
 
void write (uint24_t addr, uint8_t data) override
 Write data to the internal APU register. More...
 
bool update ()
 
- Public Member Functions inherited from ComSquare::Memory::IMemory
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
virtual bool hasMemoryAt (uint24_t addr)
 Return true if this component has mapped the address. More...
 
virtual uint24_t getStart ()
 Get the first address mapped to this component. More...
 
+ + + + + + + + + + +

+Private Attributes

Registers _registers {}
 All the registers of the APU CPU. More...
 
InternalRegisters _internalRegisters {}
 Internal registers of the CPU (accessible from the bus via addr $4200 to $421F). More...
 
std::shared_ptr< DSP::DSP_dsp
 The DSP component used to produce sound. More...
 
+

Constructor & Destructor Documentation

+ +

◆ APU()

+ +
+
+ + + + + +
+ + + + + + + +
ComSquare::APU::APU::APU ()
+
+explicit
+
+ +
+
+

Member Function Documentation

+ +

◆ read()

+ +
+
+ + + + + +
+ + + + + + + + +
uint8_t ComSquare::APU::APU::read (uint24_t addr)
+
+overridevirtual
+
+ +

Read from the internal APU register.

+
Parameters
+ + +
addrThe address to read from. The address 0xF0 should refer to the first byte of the register.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than $FF (the number of register).
+
+
+
Returns
Return the value of the register.
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+ +

◆ update()

+ +
+
+ + + + + + + +
bool ComSquare::APU::APU::update ()
+
+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::APU::APU::write (uint24_t addr,
uint8_t data 
)
+
+overridevirtual
+
+ +

Write data to the internal APU register.

+
Parameters
+ + + +
addrThe address to write to. The address 0xF0 should refer to the first byte of register.
dataThe new value of the register.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than $FF (the number of register).
+
+
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+

Member Data Documentation

+ +

◆ _dsp

+ +
+
+ + + + + +
+ + + + +
std::shared_ptr<DSP::DSP> ComSquare::APU::APU::_dsp
+
+private
+
+ +

The DSP component used to produce sound.

+ +
+
+ +

◆ _internalRegisters

+ +
+
+ + + + + +
+ + + + +
InternalRegisters ComSquare::APU::APU::_internalRegisters {}
+
+private
+
+ +

Internal registers of the CPU (accessible from the bus via addr $4200 to $421F).

+ +
+
+ +

◆ _registers

+ +
+
+ + + + + +
+ + + + +
Registers ComSquare::APU::APU::_registers {}
+
+private
+
+ +

All the registers of the APU CPU.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.map b/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.map new file mode 100644 index 0000000..86bba9b --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.map @@ -0,0 +1,6 @@ + + + + + + diff --git a/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.md5 b/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.md5 new file mode 100644 index 0000000..3fd7af9 --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.md5 @@ -0,0 +1 @@ +e150c4145c1c242fb27c90ec5b989825 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.png b/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.png new file mode 100644 index 0000000..52b7d08 Binary files /dev/null and b/docs/html/classComSquare_1_1APU_1_1APU__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.map b/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.map new file mode 100644 index 0000000..f69d881 --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.md5 b/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.md5 new file mode 100644 index 0000000..31acc6e --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.md5 @@ -0,0 +1 @@ +6380c6f689fcb1b44c7aaecfdc5120cb \ No newline at end of file diff --git a/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.png b/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.png new file mode 100644 index 0000000..ec0525c Binary files /dev/null and b/docs/html/classComSquare_1_1APU_1_1APU__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP-members.html b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP-members.html new file mode 100644 index 0000000..6c025d1 --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP-members.html @@ -0,0 +1,94 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::APU::DSP::DSP Member List
+
+
+ +

This is the complete list of members for ComSquare::APU::DSP::DSP, including all inherited members.

+ + + + + + + + + + + + +
_channelsComSquare::APU::DSP::DSPprivate
_endComSquare::Memory::IMemoryprivate
_registersComSquare::APU::DSP::DSPprivate
_soundBufferComSquare::APU::DSP::DSPprivate
_startComSquare::Memory::IMemoryprivate
DSP()ComSquare::APU::DSP::DSPexplicit
getStart()ComSquare::Memory::IMemoryvirtual
hasMemoryAt(uint24_t addr)ComSquare::Memory::IMemoryvirtual
read(uint24_t addr) overrideComSquare::APU::DSP::DSPvirtual
setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemory
write(uint24_t addr, uint8_t data) overrideComSquare::APU::DSP::DSPvirtual
+ + + + diff --git a/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP.html b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP.html new file mode 100644 index 0000000..bfe052f --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP.html @@ -0,0 +1,339 @@ + + + + + + + +ComSquare: ComSquare::APU::DSP::DSP Class Reference + + + + + + + + + +
+
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+Public Member Functions | +Private Attributes | +List of all members
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+
ComSquare::APU::DSP::DSP Class Reference
+
+
+ +

#include <DSP.hpp>

+
+Inheritance diagram for ComSquare::APU::DSP::DSP:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::APU::DSP::DSP:
+
+
Collaboration graph
+ + + + + +
+ + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

 DSP ()
 
uint8_t read (uint24_t addr) override
 Read from the internal DSP register. More...
 
void write (uint24_t addr, uint8_t data) override
 Write data to the internal DSP register. More...
 
- Public Member Functions inherited from ComSquare::Memory::IMemory
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
virtual bool hasMemoryAt (uint24_t addr)
 Return true if this component has mapped the address. More...
 
virtual uint24_t getStart ()
 Get the first address mapped to this component. More...
 
+ + + + + + + + + + +

+Private Attributes

Registers _registers {}
 All registers of the DSP. More...
 
sf::Sound _channels [8]
 8x channels of sample used to make sound More...
 
sf::SoundBuffer _soundBuffer
 A buffer containing current wave. More...
 
+

Constructor & Destructor Documentation

+ +

◆ DSP()

+ +
+
+ + + + + +
+ + + + + + + +
ComSquare::APU::DSP::DSP::DSP ()
+
+explicit
+
+ +
+
+

Member Function Documentation

+ +

◆ read()

+ +
+
+ + + + + +
+ + + + + + + + +
uint8_t ComSquare::APU::DSP::DSP::read (uint24_t addr)
+
+overridevirtual
+
+ +

Read from the internal DSP register.

+
Parameters
+ + +
addrThe address to read from. The address 0x0 should refer to the first byte of the register.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than $7F (the number of register).
+
+
+
Returns
Return the value of the register.
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::APU::DSP::DSP::write (uint24_t addr,
uint8_t data 
)
+
+overridevirtual
+
+ +

Write data to the internal DSP register.

+
Parameters
+ + + +
addrThe address to write to. The address 0x0 should refer to the first byte of register.
dataThe new value of the register.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than $7F (the number of register).
+
+
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+

Member Data Documentation

+ +

◆ _channels

+ +
+
+ + + + + +
+ + + + +
sf::Sound ComSquare::APU::DSP::DSP::_channels[8]
+
+private
+
+ +

8x channels of sample used to make sound

+ +
+
+ +

◆ _registers

+ +
+
+ + + + + +
+ + + + +
Registers ComSquare::APU::DSP::DSP::_registers {}
+
+private
+
+ +

All registers of the DSP.

+ +
+
+ +

◆ _soundBuffer

+ +
+
+ + + + + +
+ + + + +
sf::SoundBuffer ComSquare::APU::DSP::DSP::_soundBuffer
+
+private
+
+ +

A buffer containing current wave.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.map b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.map new file mode 100644 index 0000000..c365667 --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.map @@ -0,0 +1,5 @@ + + + + + diff --git a/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.md5 b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.md5 new file mode 100644 index 0000000..b637622 --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.md5 @@ -0,0 +1 @@ +49ef5af7b506d94280dd22400c4fe5cd \ No newline at end of file diff --git a/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.png b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.png new file mode 100644 index 0000000..5dd0711 Binary files /dev/null and b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.map b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.map new file mode 100644 index 0000000..837aef5 --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.md5 b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.md5 new file mode 100644 index 0000000..0c5a9cf --- /dev/null +++ b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.md5 @@ -0,0 +1 @@ +0c9bb7b57253ab7092780c483fa0a6bf \ No newline at end of file diff --git a/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.png b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.png new file mode 100644 index 0000000..d77d7bb Binary files /dev/null and b/docs/html/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1CPU_1_1CPU-members.html b/docs/html/classComSquare_1_1CPU_1_1CPU-members.html new file mode 100644 index 0000000..74d06ec --- /dev/null +++ b/docs/html/classComSquare_1_1CPU_1_1CPU-members.html @@ -0,0 +1,97 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::CPU::CPU Member List
+
+
+ +

This is the complete list of members for ComSquare::CPU::CPU, including all inherited members.

+ + + + + + + + + + + + + + + +
_busComSquare::CPU::CPUprivate
_endComSquare::Memory::IMemoryprivate
_internalRegistersComSquare::CPU::CPUprivate
_isEmulationModeComSquare::CPU::CPUprivate
_registersComSquare::CPU::CPUprivate
_startComSquare::Memory::IMemoryprivate
CPU(std::shared_ptr< Memory::MemoryBus > bus)ComSquare::CPU::CPUexplicit
executeInstruction()ComSquare::CPU::CPUprivate
getStart()ComSquare::Memory::IMemoryvirtual
hasMemoryAt(uint24_t addr)ComSquare::Memory::IMemoryvirtual
read(uint24_t addr) overrideComSquare::CPU::CPUvirtual
setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemory
update()ComSquare::CPU::CPU
write(uint24_t addr, uint8_t data) overrideComSquare::CPU::CPUvirtual
+ + + + diff --git a/docs/html/classComSquare_1_1CPU_1_1CPU.html b/docs/html/classComSquare_1_1CPU_1_1CPU.html new file mode 100644 index 0000000..8d8af78 --- /dev/null +++ b/docs/html/classComSquare_1_1CPU_1_1CPU.html @@ -0,0 +1,432 @@ + + + + + + + +ComSquare: ComSquare::CPU::CPU Class Reference + + + + + + + + + +
+
+ + + + + + +
+
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+Public Member Functions | +Private Member Functions | +Private Attributes | +List of all members
+
+
ComSquare::CPU::CPU Class Reference
+
+
+ +

The main CPU. + More...

+ +

#include <CPU.hpp>

+
+Inheritance diagram for ComSquare::CPU::CPU:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::CPU::CPU:
+
+
Collaboration graph
+ + + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

 CPU (std::shared_ptr< Memory::MemoryBus > bus)
 
int update ()
 This function continue to execute the Cartridge code. More...
 
uint8_t read (uint24_t addr) override
 Read from the internal CPU register. More...
 
void write (uint24_t addr, uint8_t data) override
 Write data to the internal CPU register. More...
 
- Public Member Functions inherited from ComSquare::Memory::IMemory
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
virtual bool hasMemoryAt (uint24_t addr)
 Return true if this component has mapped the address. More...
 
virtual uint24_t getStart ()
 Get the first address mapped to this component. More...
 
+ + + + +

+Private Member Functions

int executeInstruction ()
 Execute a single instruction. More...
 
+ + + + + + + + + + + + + +

+Private Attributes

Registers _registers {}
 All the registers of the CPU. More...
 
bool _isEmulationMode = true
 Is the CPU running in emulation mode (in 8bits) More...
 
InternalRegisters _internalRegisters {}
 Internal registers of the CPU (accessible from the bus via addr $4200 to $421F). More...
 
std::shared_ptr< Memory::MemoryBus_bus
 The memory bus to use for read/write. More...
 
+

Detailed Description

+

The main CPU.

+

Constructor & Destructor Documentation

+ +

◆ CPU()

+ +
+
+ + + + + +
+ + + + + + + + +
ComSquare::CPU::CPU::CPU (std::shared_ptr< Memory::MemoryBusbus)
+
+explicit
+
+ +
+
+

Member Function Documentation

+ +

◆ executeInstruction()

+ +
+
+ + + + + +
+ + + + + + + +
int ComSquare::CPU::CPU::executeInstruction ()
+
+private
+
+ +

Execute a single instruction.

+
Returns
The number of CPU cycles that the instruction took.
+ +
+
+ +

◆ read()

+ +
+
+ + + + + +
+ + + + + + + + +
uint8_t ComSquare::CPU::CPU::read (uint24_t addr)
+
+overridevirtual
+
+ +

Read from the internal CPU register.

+

@bref The CPU's internal registers starts at $4200 and finish at $421F.

+
Parameters
+ + +
addrThe address to read from. The address 0x0 should refer to the first byte of the register.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than $1F (the number of register).
+
+
+
Returns
Return the value of the register.
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+ +

◆ update()

+ +
+
+ + + + + + + +
int ComSquare::CPU::CPU::update ()
+
+ +

This function continue to execute the Cartridge code.

+
Returns
The number of CPU cycles that elapsed
+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::CPU::CPU::write (uint24_t addr,
uint8_t data 
)
+
+overridevirtual
+
+ +

Write data to the internal CPU register.

+
Parameters
+ + + +
addrThe address to write to. The address 0x0 should refer to the first byte of register.
dataThe new value of the register.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than $1F (the number of register).
+
+
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+

Member Data Documentation

+ +

◆ _bus

+ +
+
+ + + + + +
+ + + + +
std::shared_ptr<Memory::MemoryBus> ComSquare::CPU::CPU::_bus
+
+private
+
+ +

The memory bus to use for read/write.

+ +
+
+ +

◆ _internalRegisters

+ +
+
+ + + + + +
+ + + + +
InternalRegisters ComSquare::CPU::CPU::_internalRegisters {}
+
+private
+
+ +

Internal registers of the CPU (accessible from the bus via addr $4200 to $421F).

+ +
+
+ +

◆ _isEmulationMode

+ +
+
+ + + + + +
+ + + + +
bool ComSquare::CPU::CPU::_isEmulationMode = true
+
+private
+
+ +

Is the CPU running in emulation mode (in 8bits)

+ +
+
+ +

◆ _registers

+ +
+
+ + + + + +
+ + + + +
Registers ComSquare::CPU::CPU::_registers {}
+
+private
+
+ +

All the registers of the CPU.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.map b/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.map new file mode 100644 index 0000000..891e9f1 --- /dev/null +++ b/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.map @@ -0,0 +1,6 @@ + + + + + + diff --git a/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.md5 b/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.md5 new file mode 100644 index 0000000..bc30071 --- /dev/null +++ b/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.md5 @@ -0,0 +1 @@ +4142863e6b7e212035f4e5843e2f03ca \ No newline at end of file diff --git a/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.png b/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.png new file mode 100644 index 0000000..3188420 Binary files /dev/null and b/docs/html/classComSquare_1_1CPU_1_1CPU__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.map b/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.map new file mode 100644 index 0000000..554191c --- /dev/null +++ b/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.md5 b/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.md5 new file mode 100644 index 0000000..c958dac --- /dev/null +++ b/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.md5 @@ -0,0 +1 @@ +ec21e2df156127d31be7ed758a97603f \ No newline at end of file diff --git a/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.png b/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.png new file mode 100644 index 0000000..14e5ed3 Binary files /dev/null and b/docs/html/classComSquare_1_1CPU_1_1CPU__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1Cartridge_1_1Cartridge-members.html b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge-members.html new file mode 100644 index 0000000..2c86885 --- /dev/null +++ b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge-members.html @@ -0,0 +1,106 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+
ComSquare::Cartridge::Cartridge Member List
+
+
+ +

This is the complete list of members for ComSquare::Cartridge::Cartridge, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + +
_dataComSquare::Cartridge::Cartridgeprivate
_endComSquare::Memory::IMemoryprivate
_endBankComSquare::Memory::IRectangleMemoryprivate
_endPageComSquare::Memory::IRectangleMemoryprivate
_getHeaderAddress()ComSquare::Cartridge::Cartridgeprivate
_loadHeader()ComSquare::Cartridge::Cartridgeprivate
_mapHeader(uint32_t headerAddress)ComSquare::Cartridge::Cartridgeprivate
_sizeComSquare::Cartridge::Cartridgeprivate
_startComSquare::Memory::IMemoryprivate
_startBankComSquare::Memory::IRectangleMemoryprivate
_startPageComSquare::Memory::IRectangleMemoryprivate
Cartridge(const std::string &romPath)ComSquare::Cartridge::Cartridgeexplicit
getRomSize(const std::string &romPath)ComSquare::Cartridge::Cartridgeprivatestatic
getStart() overrideComSquare::Memory::IRectangleMemoryprivatevirtual
hasMemoryAt(uint24_t addr) overrideComSquare::Memory::IRectangleMemoryprivatevirtual
headerComSquare::Cartridge::Cartridge
read(uint24_t addr) overrideComSquare::Memory::IRectangleMemoryprivatevirtual
read_internal(uint24_t addr) overrideComSquare::Cartridge::Cartridgevirtual
setMemoryRegion(uint8_t startBank, uint8_t endBank, uint16_t startPage, uint16_t endPage)ComSquare::Memory::IRectangleMemoryprivate
ComSquare::Memory::IMemory::setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemoryprivate
write(uint24_t addr, uint8_t data) overrideComSquare::Memory::IRectangleMemoryprivatevirtual
write_internal(uint24_t addr, uint8_t data) overrideComSquare::Cartridge::Cartridgevirtual
~Cartridge()ComSquare::Cartridge::Cartridge
+ + + + diff --git a/docs/html/classComSquare_1_1Cartridge_1_1Cartridge.html b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge.html new file mode 100644 index 0000000..142780a --- /dev/null +++ b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge.html @@ -0,0 +1,525 @@ + + + + + + + +ComSquare: ComSquare::Cartridge::Cartridge Class Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Public Member Functions | +Public Attributes | +Private Member Functions | +Static Private Member Functions | +Private Attributes | +List of all members
+
+
ComSquare::Cartridge::Cartridge Class Reference
+
+
+ +

Contains the rom's memory/instructions. + More...

+ +

#include <Cartridge.hpp>

+
+Inheritance diagram for ComSquare::Cartridge::Cartridge:
+
+
Inheritance graph
+ + + + + +
+
+Collaboration diagram for ComSquare::Cartridge::Cartridge:
+
+
Collaboration graph
+ + + + + + + +
+ + + + + + + + + + + + + + +

+Public Member Functions

 Cartridge (const std::string &romPath)
 Load a rom from it's path. More...
 
 ~Cartridge ()
 Destructor that free the cartridge data. More...
 
uint8_t read_internal (uint24_t addr) override
 Read from the rom. More...
 
void write_internal (uint24_t addr, uint8_t data) override
 Write data to the rom. More...
 
+ + + + +

+Public Attributes

Header header
 The header of the cartridge. More...
 
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Private Member Functions

bool _loadHeader ()
 Set the public variable header by parsing the header in the ROM. More...
 
uint32_t _getHeaderAddress ()
 Get the address of the header. More...
 
Header _mapHeader (uint32_t headerAddress)
 Parse the memory to get a readable header. More...
 
- Private Member Functions inherited from ComSquare::Memory::IRectangleMemory
uint8_t read (uint24_t addr) override
 Read data from the component using the same method as the basic IMemory. More...
 
void write (uint24_t addr, uint8_t data) override
 Write data to this component using the same method as the basic IMemory. More...
 
bool hasMemoryAt (uint24_t addr) override
 Return true if this component has mapped the address. More...
 
uint24_t getStart () override
 Get the first address mapped to this component. More...
 
void setMemoryRegion (uint8_t startBank, uint8_t endBank, uint16_t startPage, uint16_t endPage)
 Change starting and ending points of this mapped memory. More...
 
- Private Member Functions inherited from ComSquare::Memory::IMemory
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
+ + + + +

+Static Private Member Functions

static size_t getRomSize (const std::string &romPath)
 Get the size of a rom from it's path. More...
 
+ + + + + + + +

+Private Attributes

uint8_t * _data
 The rom data (contains all the instructions). More...
 
size_t _size
 The size of the rom data. More...
 
+

Detailed Description

+

Contains the rom's memory/instructions.

+

Constructor & Destructor Documentation

+ +

◆ Cartridge()

+ +
+
+ + + + + +
+ + + + + + + + +
ComSquare::Cartridge::Cartridge::Cartridge (const std::string & romPath)
+
+explicit
+
+ +

Load a rom from it's path.

+ +
+
+ +

◆ ~Cartridge()

+ +
+
+ + + + + + + +
ComSquare::Cartridge::Cartridge::~Cartridge ()
+
+ +

Destructor that free the cartridge data.

+ +
+
+

Member Function Documentation

+ +

◆ _getHeaderAddress()

+ +
+
+ + + + + +
+ + + + + + + +
uint32_t ComSquare::Cartridge::Cartridge::_getHeaderAddress ()
+
+private
+
+ +

Get the address of the header.

+
Returns
The address of this cartridge header.
+ +
+
+ +

◆ _loadHeader()

+ +
+
+ + + + + +
+ + + + + + + +
bool ComSquare::Cartridge::Cartridge::_loadHeader ()
+
+private
+
+ +

Set the public variable header by parsing the header in the ROM.

+
Returns
True if this cartridge has a SCM header, false otherwise.
+ +
+
+ +

◆ _mapHeader()

+ +
+
+ + + + + +
+ + + + + + + + +
Header ComSquare::Cartridge::Cartridge::_mapHeader (uint32_t headerAddress)
+
+private
+
+ +

Parse the memory to get a readable header.

+
Parameters
+ + +
headerAddressThe address you want to parse.
+
+
+
Returns
A header struct representing the data at the memory address you passed.
+ +
+
+ +

◆ getRomSize()

+ +
+
+ + + + + +
+ + + + + + + + +
size_t ComSquare::Cartridge::Cartridge::getRomSize (const std::string & romPath)
+
+staticprivate
+
+ +

Get the size of a rom from it's path.

+
Parameters
+ + +
romPathThe path of the rom to get info from.
+
+
+
Returns
The size of the rom.
+ +
+
+ +

◆ read_internal()

+ +
+
+ + + + + +
+ + + + + + + + +
uint8_t ComSquare::Cartridge::Cartridge::read_internal (uint24_t addr)
+
+overridevirtual
+
+ +

Read from the rom.

+
Parameters
+ + +
addrThe address to read from. The address 0x0 should refer to the first byte of the rom's memory.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than the size of the rom's memory.
+
+
+
Returns
Return the data at the address.
+ +

Implements ComSquare::Memory::IRectangleMemory.

+ +
+
+ +

◆ write_internal()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::Cartridge::Cartridge::write_internal (uint24_t addr,
uint8_t data 
)
+
+overridevirtual
+
+ +

Write data to the rom.

+
Parameters
+ + + +
addrThe address to write to. The address 0x0 should refer to the first byte of the rom's memory.
dataThe data to write.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than the size of the rom's memory.
+
+
+ +

Implements ComSquare::Memory::IRectangleMemory.

+ +
+
+

Member Data Documentation

+ +

◆ _data

+ +
+
+ + + + + +
+ + + + +
uint8_t* ComSquare::Cartridge::Cartridge::_data
+
+private
+
+ +

The rom data (contains all the instructions).

+ +
+
+ +

◆ _size

+ +
+
+ + + + + +
+ + + + +
size_t ComSquare::Cartridge::Cartridge::_size
+
+private
+
+ +

The size of the rom data.

+ +
+
+ +

◆ header

+ +
+
+ + + + +
Header ComSquare::Cartridge::Cartridge::header
+
+ +

The header of the cartridge.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.map b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.map new file mode 100644 index 0000000..83b00bd --- /dev/null +++ b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.map @@ -0,0 +1,7 @@ + + + + + + + diff --git a/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.md5 b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.md5 new file mode 100644 index 0000000..6cd1d52 --- /dev/null +++ b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.md5 @@ -0,0 +1 @@ +f2266af0a6a2d7f26d3b9e12db33a9c7 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.png b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.png new file mode 100644 index 0000000..efc7b5d Binary files /dev/null and b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.map b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.map new file mode 100644 index 0000000..bd824c8 --- /dev/null +++ b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.map @@ -0,0 +1,5 @@ + + + + + diff --git a/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.md5 b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.md5 new file mode 100644 index 0000000..effb8ef --- /dev/null +++ b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.md5 @@ -0,0 +1 @@ +8c552a94a07c0b31adc30ca3163c43e0 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.png b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.png new file mode 100644 index 0000000..50ae601 Binary files /dev/null and b/docs/html/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1InvalidAction-members.html b/docs/html/classComSquare_1_1InvalidAction-members.html new file mode 100644 index 0000000..d705256 --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAction-members.html @@ -0,0 +1,86 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::InvalidAction Member List
+
+
+ +

This is the complete list of members for ComSquare::InvalidAction, including all inherited members.

+ + + + +
_msgComSquare::InvalidActionprivate
InvalidAction(const std::string &msg)ComSquare::InvalidActioninlineexplicit
what() const noexcept overrideComSquare::InvalidActioninline
+ + + + diff --git a/docs/html/classComSquare_1_1InvalidAction.html b/docs/html/classComSquare_1_1InvalidAction.html new file mode 100644 index 0000000..a3343e9 --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAction.html @@ -0,0 +1,201 @@ + + + + + + + +ComSquare: ComSquare::InvalidAction Class Reference + + + + + + + + + +
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+Public Member Functions | +Private Attributes | +List of all members
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+
ComSquare::InvalidAction Class Reference
+
+
+ +

Exception thrown when someone tries to load an invalid rom. + More...

+ +

#include <InvalidAction.hpp>

+
+Inheritance diagram for ComSquare::InvalidAction:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::InvalidAction:
+
+
Collaboration graph
+ + + + +
+ + + + + + +

+Public Member Functions

 InvalidAction (const std::string &msg)
 
const charwhat () const noexcept override
 
+ + + +

+Private Attributes

std::string _msg
 
+

Detailed Description

+

Exception thrown when someone tries to load an invalid rom.

+

Constructor & Destructor Documentation

+ +

◆ InvalidAction()

+ +
+
+ + + + + +
+ + + + + + + + +
ComSquare::InvalidAction::InvalidAction (const std::string & msg)
+
+inlineexplicit
+
+ +
+
+

Member Function Documentation

+ +

◆ what()

+ +
+
+ + + + + +
+ + + + + + + +
const char* ComSquare::InvalidAction::what () const
+
+inlineoverridenoexcept
+
+ +
+
+

Member Data Documentation

+ +

◆ _msg

+ +
+
+ + + + + +
+ + + + +
std::string ComSquare::InvalidAction::_msg
+
+private
+
+ +
+
+
The documentation for this class was generated from the following file: +
+ + + + diff --git a/docs/html/classComSquare_1_1InvalidAction__coll__graph.map b/docs/html/classComSquare_1_1InvalidAction__coll__graph.map new file mode 100644 index 0000000..817ec9f --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAction__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1InvalidAction__coll__graph.md5 b/docs/html/classComSquare_1_1InvalidAction__coll__graph.md5 new file mode 100644 index 0000000..f17b71b --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAction__coll__graph.md5 @@ -0,0 +1 @@ +3cdedf58b05e6c9d8ade235033a51716 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1InvalidAction__coll__graph.png b/docs/html/classComSquare_1_1InvalidAction__coll__graph.png new file mode 100644 index 0000000..8d2ba92 Binary files /dev/null and b/docs/html/classComSquare_1_1InvalidAction__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1InvalidAction__inherit__graph.map b/docs/html/classComSquare_1_1InvalidAction__inherit__graph.map new file mode 100644 index 0000000..817ec9f --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAction__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1InvalidAction__inherit__graph.md5 b/docs/html/classComSquare_1_1InvalidAction__inherit__graph.md5 new file mode 100644 index 0000000..f17b71b --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAction__inherit__graph.md5 @@ -0,0 +1 @@ +3cdedf58b05e6c9d8ade235033a51716 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1InvalidAction__inherit__graph.png b/docs/html/classComSquare_1_1InvalidAction__inherit__graph.png new file mode 100644 index 0000000..8d2ba92 Binary files /dev/null and b/docs/html/classComSquare_1_1InvalidAction__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1InvalidAddress-members.html b/docs/html/classComSquare_1_1InvalidAddress-members.html new file mode 100644 index 0000000..c219a3a --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAddress-members.html @@ -0,0 +1,86 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::InvalidAddress Member List
+
+
+ +

This is the complete list of members for ComSquare::InvalidAddress, including all inherited members.

+ + + + +
_msgComSquare::InvalidAddressprivate
InvalidAddress(std::string where, int32_t addr)ComSquare::InvalidAddressinline
what() const noexcept overrideComSquare::InvalidAddressinline
+ + + + diff --git a/docs/html/classComSquare_1_1InvalidAddress.html b/docs/html/classComSquare_1_1InvalidAddress.html new file mode 100644 index 0000000..510a176 --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAddress.html @@ -0,0 +1,211 @@ + + + + + + + +ComSquare: ComSquare::InvalidAddress Class Reference + + + + + + + + + +
+
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+
ComSquare +
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+Public Member Functions | +Private Attributes | +List of all members
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+
ComSquare::InvalidAddress Class Reference
+
+
+ +

Exception thrown when trying to read/write to an invalid address. + More...

+ +

#include <InvalidAddress.hpp>

+
+Inheritance diagram for ComSquare::InvalidAddress:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::InvalidAddress:
+
+
Collaboration graph
+ + + + +
+ + + + + + +

+Public Member Functions

 InvalidAddress (std::string where, int32_t addr)
 
const charwhat () const noexcept override
 
+ + + +

+Private Attributes

std::string _msg
 
+

Detailed Description

+

Exception thrown when trying to read/write to an invalid address.

+

Constructor & Destructor Documentation

+ +

◆ InvalidAddress()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
ComSquare::InvalidAddress::InvalidAddress (std::string where,
int32_t addr 
)
+
+inline
+
+ +
+
+

Member Function Documentation

+ +

◆ what()

+ +
+
+ + + + + +
+ + + + + + + +
const char* ComSquare::InvalidAddress::what () const
+
+inlineoverridenoexcept
+
+ +
+
+

Member Data Documentation

+ +

◆ _msg

+ +
+
+ + + + + +
+ + + + +
std::string ComSquare::InvalidAddress::_msg
+
+private
+
+ +
+
+
The documentation for this class was generated from the following file: +
+ + + + diff --git a/docs/html/classComSquare_1_1InvalidAddress__coll__graph.map b/docs/html/classComSquare_1_1InvalidAddress__coll__graph.map new file mode 100644 index 0000000..baec5d6 --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAddress__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1InvalidAddress__coll__graph.md5 b/docs/html/classComSquare_1_1InvalidAddress__coll__graph.md5 new file mode 100644 index 0000000..b28b95e --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAddress__coll__graph.md5 @@ -0,0 +1 @@ +31bf871b17ed43e7e87da9f01af9a237 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1InvalidAddress__coll__graph.png b/docs/html/classComSquare_1_1InvalidAddress__coll__graph.png new file mode 100644 index 0000000..1dfc28a Binary files /dev/null and b/docs/html/classComSquare_1_1InvalidAddress__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.map b/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.map new file mode 100644 index 0000000..baec5d6 --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.md5 b/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.md5 new file mode 100644 index 0000000..b28b95e --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.md5 @@ -0,0 +1 @@ +31bf871b17ed43e7e87da9f01af9a237 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.png b/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.png new file mode 100644 index 0000000..1dfc28a Binary files /dev/null and b/docs/html/classComSquare_1_1InvalidAddress__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1InvalidRomException-members.html b/docs/html/classComSquare_1_1InvalidRomException-members.html new file mode 100644 index 0000000..d75fca9 --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidRomException-members.html @@ -0,0 +1,86 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::InvalidRomException Member List
+
+
+ +

This is the complete list of members for ComSquare::InvalidRomException, including all inherited members.

+ + + + +
_msgComSquare::InvalidRomExceptionprivate
InvalidRomException(const std::string &msg)ComSquare::InvalidRomExceptioninlineexplicit
what() const noexcept overrideComSquare::InvalidRomExceptioninline
+ + + + diff --git a/docs/html/classComSquare_1_1InvalidRomException.html b/docs/html/classComSquare_1_1InvalidRomException.html new file mode 100644 index 0000000..e5fdd2c --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidRomException.html @@ -0,0 +1,201 @@ + + + + + + + +ComSquare: ComSquare::InvalidRomException Class Reference + + + + + + + + + +
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+
ComSquare::InvalidRomException Class Reference
+
+
+ +

Exception thrown when someone tries to load an invalid rom. + More...

+ +

#include <InvalidRom.hpp>

+
+Inheritance diagram for ComSquare::InvalidRomException:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::InvalidRomException:
+
+
Collaboration graph
+ + + + +
+ + + + + + +

+Public Member Functions

 InvalidRomException (const std::string &msg)
 
const charwhat () const noexcept override
 
+ + + +

+Private Attributes

std::string _msg
 
+

Detailed Description

+

Exception thrown when someone tries to load an invalid rom.

+

Constructor & Destructor Documentation

+ +

◆ InvalidRomException()

+ +
+
+ + + + + +
+ + + + + + + + +
ComSquare::InvalidRomException::InvalidRomException (const std::string & msg)
+
+inlineexplicit
+
+ +
+
+

Member Function Documentation

+ +

◆ what()

+ +
+
+ + + + + +
+ + + + + + + +
const char* ComSquare::InvalidRomException::what () const
+
+inlineoverridenoexcept
+
+ +
+
+

Member Data Documentation

+ +

◆ _msg

+ +
+
+ + + + + +
+ + + + +
std::string ComSquare::InvalidRomException::_msg
+
+private
+
+ +
+
+
The documentation for this class was generated from the following file: +
+ + + + diff --git a/docs/html/classComSquare_1_1InvalidRomException__coll__graph.map b/docs/html/classComSquare_1_1InvalidRomException__coll__graph.map new file mode 100644 index 0000000..5bf01f5 --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidRomException__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1InvalidRomException__coll__graph.md5 b/docs/html/classComSquare_1_1InvalidRomException__coll__graph.md5 new file mode 100644 index 0000000..866765f --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidRomException__coll__graph.md5 @@ -0,0 +1 @@ +7deaeafefd8e5cedee2fdf9e7a6d42c6 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1InvalidRomException__coll__graph.png b/docs/html/classComSquare_1_1InvalidRomException__coll__graph.png new file mode 100644 index 0000000..b44187e Binary files /dev/null and b/docs/html/classComSquare_1_1InvalidRomException__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.map b/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.map new file mode 100644 index 0000000..5bf01f5 --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.md5 b/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.md5 new file mode 100644 index 0000000..866765f --- /dev/null +++ b/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.md5 @@ -0,0 +1 @@ +7deaeafefd8e5cedee2fdf9e7a6d42c6 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.png b/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.png new file mode 100644 index 0000000..b44187e Binary files /dev/null and b/docs/html/classComSquare_1_1InvalidRomException__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1Memory_1_1IMemory-members.html b/docs/html/classComSquare_1_1Memory_1_1IMemory-members.html new file mode 100644 index 0000000..6de4322 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IMemory-members.html @@ -0,0 +1,90 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::Memory::IMemory Member List
+
+
+ +

This is the complete list of members for ComSquare::Memory::IMemory, including all inherited members.

+ + + + + + + + +
_endComSquare::Memory::IMemoryprivate
_startComSquare::Memory::IMemoryprivate
getStart()ComSquare::Memory::IMemoryvirtual
hasMemoryAt(uint24_t addr)ComSquare::Memory::IMemoryvirtual
read(uint24_t addr)=0ComSquare::Memory::IMemorypure virtual
setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemory
write(uint24_t addr, uint8_t data)=0ComSquare::Memory::IMemorypure virtual
+ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1IMemory.html b/docs/html/classComSquare_1_1Memory_1_1IMemory.html new file mode 100644 index 0000000..b23bdf9 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IMemory.html @@ -0,0 +1,398 @@ + + + + + + + +ComSquare: ComSquare::Memory::IMemory Class Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
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+Public Member Functions | +Private Attributes | +List of all members
+
+
ComSquare::Memory::IMemory Class Referenceabstract
+
+
+ +

Common interface implemented by all components mapping memory. + More...

+ +

#include <IMemory.hpp>

+
+Inheritance diagram for ComSquare::Memory::IMemory:
+
+
Inheritance graph
+ + + + + + + + + + + +
+
+Collaboration diagram for ComSquare::Memory::IMemory:
+
+
Collaboration graph
+ + + +
+ + + + + + + + + + + + + + + + + +

+Public Member Functions

virtual uint8_t read (uint24_t addr)=0
 Read data from the component. More...
 
virtual void write (uint24_t addr, uint8_t data)=0
 Write data to this component. More...
 
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
virtual bool hasMemoryAt (uint24_t addr)
 Return true if this component has mapped the address. More...
 
virtual uint24_t getStart ()
 Get the first address mapped to this component. More...
 
+ + + + + + + +

+Private Attributes

uint24_t _start = 0
 The starting address mapped to this component. More...
 
uint24_t _end = 0
 The last continuous address mapped to this components. For shadows, see the MemoryShadow class. More...
 
+

Detailed Description

+

Common interface implemented by all components mapping memory.

+

Member Function Documentation

+ +

◆ getStart()

+ +
+
+ + + + + +
+ + + + + + + +
uint32_t ComSquare::Memory::IMemory::getStart ()
+
+virtual
+
+ +

Get the first address mapped to this component.

+
Returns
the _start value.
+ +

Reimplemented in ComSquare::Memory::IRectangleMemory.

+ +
+
+ +

◆ hasMemoryAt()

+ +
+
+ + + + + +
+ + + + + + + + +
bool ComSquare::Memory::IMemory::hasMemoryAt (uint24_t addr)
+
+virtual
+
+ +

Return true if this component has mapped the address.

+
Parameters
+ + +
addrThe address to check.
+
+
+
Returns
True if this address is mapped to the component. False otherwise.
+ +

Reimplemented in ComSquare::Memory::IRectangleMemory.

+ +
+
+ +

◆ read()

+ +
+
+ + + + + +
+ + + + + + + + +
virtual uint8_t ComSquare::Memory::IMemory::read (uint24_t addr)
+
+pure virtual
+
+ +

Read data from the component.

+
Parameters
+ + +
addrThe local address to read from (0x0 should refer to the first byte of this component).
+
+
+
Exceptions
+ + +
Thisfunction should thrown an InvalidAddress for address that are not mapped to the component.
+
+
+
Returns
Return the data at the address given as parameter.
+ +

Implemented in ComSquare::PPU::PPU, ComSquare::CPU::CPU, ComSquare::APU::DSP::DSP, ComSquare::APU::APU, ComSquare::Memory::IRectangleMemory, ComSquare::Ram::Ram, and ComSquare::Memory::MemoryShadow.

+ +
+
+ +

◆ setMemoryRegion()

+ +
+
+ + + + + + + + + + + + + + + + + + +
void ComSquare::Memory::IMemory::setMemoryRegion (uint24_t start,
uint24_t end 
)
+
+ +

Change starting and ending points of this mapped memory.

+
Parameters
+ + + +
startThe first address mapped to this component.
endThe last address mapped to this component.
+
+
+
Warning
The start/end address should be a continuous range. You can't map address 0x0 and 0x2 but not 0x1. To do that, use two IMemory.
+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
virtual void ComSquare::Memory::IMemory::write (uint24_t addr,
uint8_t data 
)
+
+pure virtual
+
+ +

Write data to this component.

+
Parameters
+ + + +
addrThe local address to write data (0x0 should refer to the first byte of this component).
dataThe new data to write.
+
+
+
Exceptions
+ + +
Thisfunction should thrown an InvalidAddress for address that are not mapped to the component.
+
+
+ +

Implemented in ComSquare::PPU::PPU, ComSquare::CPU::CPU, ComSquare::APU::DSP::DSP, ComSquare::APU::APU, ComSquare::Memory::IRectangleMemory, ComSquare::Ram::Ram, and ComSquare::Memory::MemoryShadow.

+ +
+
+

Member Data Documentation

+ +

◆ _end

+ +
+
+ + + + + +
+ + + + +
uint24_t ComSquare::Memory::IMemory::_end = 0
+
+private
+
+ +

The last continuous address mapped to this components. For shadows, see the MemoryShadow class.

+ +
+
+ +

◆ _start

+ +
+
+ + + + + +
+ + + + +
uint24_t ComSquare::Memory::IMemory::_start = 0
+
+private
+
+ +

The starting address mapped to this component.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.map b/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.map new file mode 100644 index 0000000..c47c5a4 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.md5 b/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.md5 new file mode 100644 index 0000000..082b761 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.md5 @@ -0,0 +1 @@ +2b741f468720385ab4dd24dba47cf650 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.png b/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.png new file mode 100644 index 0000000..fab090b Binary files /dev/null and b/docs/html/classComSquare_1_1Memory_1_1IMemory__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.map b/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.map new file mode 100644 index 0000000..3a46787 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.map @@ -0,0 +1,11 @@ + + + + + + + + + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.md5 b/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.md5 new file mode 100644 index 0000000..f0ea1b9 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.md5 @@ -0,0 +1 @@ +037bbc269d962fb7deed9aa521bfeb99 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.png b/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.png new file mode 100644 index 0000000..ef44524 Binary files /dev/null and b/docs/html/classComSquare_1_1Memory_1_1IMemory__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory-members.html b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory-members.html new file mode 100644 index 0000000..40a0a06 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory-members.html @@ -0,0 +1,97 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::Memory::IRectangleMemory Member List
+
+
+ +

This is the complete list of members for ComSquare::Memory::IRectangleMemory, including all inherited members.

+ + + + + + + + + + + + + + + +
_endComSquare::Memory::IMemoryprivate
_endBankComSquare::Memory::IRectangleMemoryprivate
_endPageComSquare::Memory::IRectangleMemoryprivate
_startComSquare::Memory::IMemoryprivate
_startBankComSquare::Memory::IRectangleMemoryprivate
_startPageComSquare::Memory::IRectangleMemoryprivate
getStart() overrideComSquare::Memory::IRectangleMemoryvirtual
hasMemoryAt(uint24_t addr) overrideComSquare::Memory::IRectangleMemoryvirtual
read(uint24_t addr) overrideComSquare::Memory::IRectangleMemoryvirtual
read_internal(uint24_t addr)=0ComSquare::Memory::IRectangleMemorypure virtual
setMemoryRegion(uint8_t startBank, uint8_t endBank, uint16_t startPage, uint16_t endPage)ComSquare::Memory::IRectangleMemory
ComSquare::Memory::IMemory::setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemory
write(uint24_t addr, uint8_t data) overrideComSquare::Memory::IRectangleMemoryvirtual
write_internal(uint24_t addr, uint8_t data)=0ComSquare::Memory::IRectangleMemorypure virtual
+ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory.html b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory.html new file mode 100644 index 0000000..e9cb170 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory.html @@ -0,0 +1,567 @@ + + + + + + + +ComSquare: ComSquare::Memory::IRectangleMemory Class Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
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+ +
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+
+
+Public Member Functions | +Private Attributes | +List of all members
+
+
ComSquare::Memory::IRectangleMemory Class Referenceabstract
+
+
+ +

Superset of the IMemory to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at FFFF). + More...

+ +

#include <IRectangleMemory.hpp>

+
+Inheritance diagram for ComSquare::Memory::IRectangleMemory:
+
+
Inheritance graph
+ + + + + +
+
+Collaboration diagram for ComSquare::Memory::IRectangleMemory:
+
+
Collaboration graph
+ + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

uint8_t read (uint24_t addr) override
 Read data from the component using the same method as the basic IMemory. More...
 
void write (uint24_t addr, uint8_t data) override
 Write data to this component using the same method as the basic IMemory. More...
 
virtual uint8_t read_internal (uint24_t addr)=0
 Internal component read. Implement this as you would implement a basic IMemory's read. More...
 
virtual void write_internal (uint24_t addr, uint8_t data)=0
 Internal component write. Implement this as you would implement a basic IMemory's write. More...
 
bool hasMemoryAt (uint24_t addr) override
 Return true if this component has mapped the address. More...
 
uint24_t getStart () override
 Get the first address mapped to this component. More...
 
void setMemoryRegion (uint8_t startBank, uint8_t endBank, uint16_t startPage, uint16_t endPage)
 Change starting and ending points of this mapped memory. More...
 
- Public Member Functions inherited from ComSquare::Memory::IMemory
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
+ + + + + + + + + + + + + +

+Private Attributes

uint8_t _startBank = 0
 The first bank to map to. More...
 
uint8_t _endBank = 0
 The last bank to map to. More...
 
uint16_t _startPage = 0
 The first address of each bank to map. More...
 
uint16_t _endPage = 0
 The last address of each bank to map. More...
 
+

Detailed Description

+

Superset of the IMemory to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at FFFF).

+

Member Function Documentation

+ +

◆ getStart()

+ +
+
+ + + + + +
+ + + + + + + +
uint24_t ComSquare::Memory::IRectangleMemory::getStart ()
+
+overridevirtual
+
+ +

Get the first address mapped to this component.

+
Returns
the _start value.
+ +

Reimplemented from ComSquare::Memory::IMemory.

+ +
+
+ +

◆ hasMemoryAt()

+ +
+
+ + + + + +
+ + + + + + + + +
bool ComSquare::Memory::IRectangleMemory::hasMemoryAt (uint24_t addr)
+
+overridevirtual
+
+ +

Return true if this component has mapped the address.

+
Parameters
+ + +
addrThe address to check.
+
+
+
Returns
True if this address is mapped to the component. False otherwise.
+ +

Reimplemented from ComSquare::Memory::IMemory.

+ +
+
+ +

◆ read()

+ +
+
+ + + + + +
+ + + + + + + + +
uint8_t ComSquare::Memory::IRectangleMemory::read (uint24_t addr)
+
+overridevirtual
+
+ +

Read data from the component using the same method as the basic IMemory.

+
Parameters
+ + +
addrThe local address to read from. 0x0 should refer to the first byte of this component on the fist bank. This method is responsible of mapping to the component's read.
+
+
+
Exceptions
+ + +
InvalidAddressif the address is not mapped to the component.
+
+
+
Returns
Return the data at the address given as parameter.
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+ +

◆ read_internal()

+ +
+
+ + + + + +
+ + + + + + + + +
virtual uint8_t ComSquare::Memory::IRectangleMemory::read_internal (uint24_t addr)
+
+pure virtual
+
+ +

Internal component read. Implement this as you would implement a basic IMemory's read.

+
Parameters
+ + +
addrThe local address to read from. 0x0 refer to the first byte of your data and the address is in the component's space. That means that you can consider this address as continuous
+
+
+
Exceptions
+ + +
Thisfunction should thrown an InvalidAddress for address that are not mapped to the component.
+
+
+
Returns
Return the data at the address given as parameter.
+ +

Implemented in ComSquare::Cartridge::Cartridge.

+ +
+
+ +

◆ setMemoryRegion()

+ +
+
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
void ComSquare::Memory::IRectangleMemory::setMemoryRegion (uint8_t startBank,
uint8_t endBank,
uint16_t startPage,
uint16_t endPage 
)
+
+ +

Change starting and ending points of this mapped memory.

+
Parameters
+ + + + + +
startBankThe first bank mapped to this component.
endBankThe last bank mapped to this component.
startPageThe first page mapped to this component (every mapped banks will have this page mapped)
endPageThe end page mapped to this component (every mapped banks will have this pages lower than this mapped)
+
+
+
Warning
The start/end address should be a rectangle. To mirror memory, use the MemoryShadow class and not this one.
+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::Memory::IRectangleMemory::write (uint24_t addr,
uint8_t data 
)
+
+overridevirtual
+
+ +

Write data to this component using the same method as the basic IMemory.

+
Parameters
+ + + +
addrThe local address to write data 0x0 should refer to the first byte of this component on the fist bank. This method is responsible of mapping to the component's write.
dataThe new data to write.
+
+
+
Exceptions
+ + +
InvalidAddressif the address is not mapped to the component.
+
+
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+ +

◆ write_internal()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
virtual void ComSquare::Memory::IRectangleMemory::write_internal (uint24_t addr,
uint8_t data 
)
+
+pure virtual
+
+ +

Internal component write. Implement this as you would implement a basic IMemory's write.

+
Parameters
+ + + +
addrThe local address to write to. 0x0 refer to the first byte of your data and the address is in the component's space. That means that you can consider this address as continuous
dataThe new data to write.
+
+
+
Exceptions
+ + +
Thisfunction should thrown an InvalidAddress for address that are not mapped to the component.
+
+
+ +

Implemented in ComSquare::Cartridge::Cartridge.

+ +
+
+

Member Data Documentation

+ +

◆ _endBank

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::Memory::IRectangleMemory::_endBank = 0
+
+private
+
+ +

The last bank to map to.

+ +
+
+ +

◆ _endPage

+ +
+
+ + + + + +
+ + + + +
uint16_t ComSquare::Memory::IRectangleMemory::_endPage = 0
+
+private
+
+ +

The last address of each bank to map.

+ +
+
+ +

◆ _startBank

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::Memory::IRectangleMemory::_startBank = 0
+
+private
+
+ +

The first bank to map to.

+ +
+
+ +

◆ _startPage

+ +
+
+ + + + + +
+ + + + +
uint16_t ComSquare::Memory::IRectangleMemory::_startPage = 0
+
+private
+
+ +

The first address of each bank to map.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.map b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.map new file mode 100644 index 0000000..58e567b --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.md5 b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.md5 new file mode 100644 index 0000000..6854772 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.md5 @@ -0,0 +1 @@ +3b46abd4363dab42d4fe6ab3b8193ea6 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.png b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.png new file mode 100644 index 0000000..10dad95 Binary files /dev/null and b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.map b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.map new file mode 100644 index 0000000..77a97ab --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.map @@ -0,0 +1,5 @@ + + + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.md5 b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.md5 new file mode 100644 index 0000000..586399f --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.md5 @@ -0,0 +1 @@ +c520aa72b0a380c970b7a56f908a88a2 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.png b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.png new file mode 100644 index 0000000..3d43c68 Binary files /dev/null and b/docs/html/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryBus-members.html b/docs/html/classComSquare_1_1Memory_1_1MemoryBus-members.html new file mode 100644 index 0000000..2e75524 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryBus-members.html @@ -0,0 +1,90 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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+
ComSquare::Memory::MemoryBus Member List
+
+
+ +

This is the complete list of members for ComSquare::Memory::MemoryBus, including all inherited members.

+ + + + + + + + +
_memoryAccessorsComSquare::Memory::MemoryBusprivate
_mirrorComponents(SNES &console, int i)ComSquare::Memory::MemoryBusinlineprivate
_openbusComSquare::Memory::MemoryBusprivate
getAccessor(uint24_t addr)ComSquare::Memory::MemoryBusprivate
mapComponents(SNES &console)ComSquare::Memory::MemoryBus
read(uint24_t addr)ComSquare::Memory::MemoryBus
write(uint24_t addr, uint8_t data)ComSquare::Memory::MemoryBus
+ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryBus.html b/docs/html/classComSquare_1_1Memory_1_1MemoryBus.html new file mode 100644 index 0000000..70b3c38 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryBus.html @@ -0,0 +1,355 @@ + + + + + + + +ComSquare: ComSquare::Memory::MemoryBus Class Reference + + + + + + + + + +
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+
+
ComSquare::Memory::MemoryBus Class Reference
+
+
+ +

The memory bus is the component responsible of mapping addresses to components address and transmitting the data. + More...

+ +

#include <MemoryBus.hpp>

+
+Collaboration diagram for ComSquare::Memory::MemoryBus:
+
+
Collaboration graph
+ + + +
+ + + + + + + + + + + +

+Public Member Functions

uint8_t read (uint24_t addr)
 Read data at a global address. More...
 
void write (uint24_t addr, uint8_t data)
 Write a data to a global address. More...
 
void mapComponents (SNES &console)
 Map components to the address space using the currently loaded cartridge to set the right mapping mode. More...
 
+ + + + + + + +

+Private Member Functions

std::shared_ptr< IMemorygetAccessor (uint24_t addr)
 Helper function to get the components that is responsible of read/write at an address. More...
 
void _mirrorComponents (SNES &console, int i)
 WRam, CPU, PPU & ALU registers are mirrored to all banks of Q1 & Q3. This function is used for the mirroring. More...
 
+ + + + + + + +

+Private Attributes

std::vector< std::shared_ptr< IMemory > > _memoryAccessors
 The list of components registered inside the bus. Every components that can read/write to a public address should be in this vector. More...
 
uint8_t _openbus = 0
 The last value read via the memory bus. More...
 
+

Detailed Description

+

The memory bus is the component responsible of mapping addresses to components address and transmitting the data.

+

Member Function Documentation

+ +

◆ _mirrorComponents()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::Memory::MemoryBus::_mirrorComponents (SNESconsole,
int i 
)
+
+inlineprivate
+
+ +

WRam, CPU, PPU & ALU registers are mirrored to all banks of Q1 & Q3. This function is used for the mirroring.

+
Parameters
+ + + +
consoleAll the components.
iBase address for the mirrors.
+
+
+ +
+
+ +

◆ getAccessor()

+ +
+
+ + + + + +
+ + + + + + + + +
std::shared_ptr< IMemory > ComSquare::Memory::MemoryBus::getAccessor (uint24_t addr)
+
+private
+
+ +

Helper function to get the components that is responsible of read/write at an address.

+
Parameters
+ + +
addrThe address you want to look for.
+
+
+
Returns
The components responsible for the address param or nullptr if none was found.
+ +
+
+ +

◆ mapComponents()

+ +
+
+ + + + + + + + +
void ComSquare::Memory::MemoryBus::mapComponents (SNESconsole)
+
+ +

Map components to the address space using the currently loaded cartridge to set the right mapping mode.

+
Parameters
+ + +
consoleAll the components.
+
+
+ +
+
+ +

◆ read()

+ +
+
+ + + + + + + + +
uint8_t ComSquare::Memory::MemoryBus::read (uint24_t addr)
+
+ +

Read data at a global address.

+
Parameters
+ + +
addrThe address to read from.
+
+
+
Returns
The value that the component returned for this address. If the address was mapped to ram, it simply returned the value. If the address was mapped to a register the component returned the register.
+ +
+
+ +

◆ write()

+ +
+
+ + + + + + + + + + + + + + + + + + +
void ComSquare::Memory::MemoryBus::write (uint24_t addr,
uint8_t data 
)
+
+ +

Write a data to a global address.

+
Parameters
+ + + +
addrThe address to write to.
dataThe data to write.
+
+
+ +
+
+

Member Data Documentation

+ +

◆ _memoryAccessors

+ +
+
+ + + + + +
+ + + + +
std::vector<std::shared_ptr<IMemory> > ComSquare::Memory::MemoryBus::_memoryAccessors
+
+private
+
+ +

The list of components registered inside the bus. Every components that can read/write to a public address should be in this vector.

+ +
+
+ +

◆ _openbus

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::Memory::MemoryBus::_openbus = 0
+
+private
+
+ +

The last value read via the memory bus.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.map b/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.map new file mode 100644 index 0000000..09e4e28 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.md5 b/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.md5 new file mode 100644 index 0000000..e9f1f31 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.md5 @@ -0,0 +1 @@ +30651c083850cc19ec19050d9e937ad7 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.png b/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.png new file mode 100644 index 0000000..459c7c4 Binary files /dev/null and b/docs/html/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryShadow-members.html b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow-members.html new file mode 100644 index 0000000..88cf3c0 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow-members.html @@ -0,0 +1,93 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::Memory::MemoryShadow Member List
+
+
+ +

This is the complete list of members for ComSquare::Memory::MemoryShadow, including all inherited members.

+ + + + + + + + + + + +
_endComSquare::Memory::IMemoryprivate
_initialComSquare::Memory::MemoryShadowprivate
_startComSquare::Memory::IMemoryprivate
createShadow(std::shared_ptr< IMemory > initial, uint24_t start, uint24_t end)ComSquare::Memory::MemoryShadowstatic
getStart()ComSquare::Memory::IMemoryvirtual
hasMemoryAt(uint24_t addr)ComSquare::Memory::IMemoryvirtual
MemoryShadow(std::shared_ptr< IMemory > initial, uint24_t start, uint24_t end)ComSquare::Memory::MemoryShadowexplicit
read(uint24_t addr) overrideComSquare::Memory::MemoryShadowvirtual
setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemory
write(uint24_t addr, uint8_t data) overrideComSquare::Memory::MemoryShadowvirtual
+ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryShadow.html b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow.html new file mode 100644 index 0000000..ed647a9 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow.html @@ -0,0 +1,352 @@ + + + + + + + +ComSquare: ComSquare::Memory::MemoryShadow Class Reference + + + + + + + + + +
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+
ComSquare::Memory::MemoryShadow Class Reference
+
+
+ +

#include <MemoryShadow.hpp>

+
+Inheritance diagram for ComSquare::Memory::MemoryShadow:
+
+
Inheritance graph
+ + + + +
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+Collaboration diagram for ComSquare::Memory::MemoryShadow:
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+
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+Public Member Functions

 MemoryShadow (std::shared_ptr< IMemory > initial, uint24_t start, uint24_t end)
 Create a shadow for the memory given as parameter. More...
 
uint8_t read (uint24_t addr) override
 Read from the initial IMemory given. More...
 
void write (uint24_t addr, uint8_t data) override
 Write data to the ram. More...
 
- Public Member Functions inherited from ComSquare::Memory::IMemory
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
virtual bool hasMemoryAt (uint24_t addr)
 Return true if this component has mapped the address. More...
 
virtual uint24_t getStart ()
 Get the first address mapped to this component. More...
 
+ + + +

+Static Public Member Functions

static std::shared_ptr< IMemorycreateShadow (std::shared_ptr< IMemory > initial, uint24_t start, uint24_t end)
 
+ + + + +

+Private Attributes

std::shared_ptr< IMemory_initial
 Memory to shadow from. More...
 
+

Constructor & Destructor Documentation

+ +

◆ MemoryShadow()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + +
ComSquare::Memory::MemoryShadow::MemoryShadow (std::shared_ptr< IMemoryinitial,
uint24_t start,
uint24_t end 
)
+
+explicit
+
+ +

Create a shadow for the memory given as parameter.

+ +
+
+

Member Function Documentation

+ +

◆ createShadow()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + +
std::shared_ptr< IMemory > ComSquare::Memory::MemoryShadow::createShadow (std::shared_ptr< IMemoryinitial,
uint24_t start,
uint24_t end 
)
+
+static
+
+ +
+
+ +

◆ read()

+ +
+
+ + + + + +
+ + + + + + + + +
uint8_t ComSquare::Memory::MemoryShadow::read (uint24_t addr)
+
+overridevirtual
+
+ +

Read from the initial IMemory given.

+
Parameters
+ + +
addrThe address to read from. The address 0x0 should refer to the first byte of the initial IMemory.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than the size of the initial IMemory.
+
+
+
Returns
Return the data at the address.
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::Memory::MemoryShadow::write (uint24_t addr,
uint8_t data 
)
+
+overridevirtual
+
+ +

Write data to the ram.

+
Parameters
+ + + +
addrThe address to write to. The address 0x0 should refer to the first byte of the initial IMemory.
dataThe data to write.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than the size of the initial IMemory.
+
+
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+

Member Data Documentation

+ +

◆ _initial

+ +
+
+ + + + + +
+ + + + +
std::shared_ptr<IMemory> ComSquare::Memory::MemoryShadow::_initial
+
+private
+
+ +

Memory to shadow from.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.map b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.map new file mode 100644 index 0000000..a509396 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.md5 b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.md5 new file mode 100644 index 0000000..4434fd0 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.md5 @@ -0,0 +1 @@ +c8a93dc57543e6080c82e3e125a7b935 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.png b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.png new file mode 100644 index 0000000..9be3cf0 Binary files /dev/null and b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.map b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.map new file mode 100644 index 0000000..a509396 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.md5 b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.md5 new file mode 100644 index 0000000..4434fd0 --- /dev/null +++ b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.md5 @@ -0,0 +1 @@ +c8a93dc57543e6080c82e3e125a7b935 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.png b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.png new file mode 100644 index 0000000..9be3cf0 Binary files /dev/null and b/docs/html/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1NotImplementedException-members.html b/docs/html/classComSquare_1_1NotImplementedException-members.html new file mode 100644 index 0000000..c998a71 --- /dev/null +++ b/docs/html/classComSquare_1_1NotImplementedException-members.html @@ -0,0 +1,85 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::NotImplementedException Member List
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This is the complete list of members for ComSquare::NotImplementedException, including all inherited members.

+ + + +
NotImplementedException()=defaultComSquare::NotImplementedExceptionexplicit
what() const noexcept overrideComSquare::NotImplementedExceptioninline
+ + + + diff --git a/docs/html/classComSquare_1_1NotImplementedException.html b/docs/html/classComSquare_1_1NotImplementedException.html new file mode 100644 index 0000000..6117986 --- /dev/null +++ b/docs/html/classComSquare_1_1NotImplementedException.html @@ -0,0 +1,171 @@ + + + + + + + +ComSquare: ComSquare::NotImplementedException Class Reference + + + + + + + + + +
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ComSquare::NotImplementedException Class Reference
+
+
+ +

When this is thrown, it means that we should work more. + More...

+ +

#include <NotImplementedException.hpp>

+
+Inheritance diagram for ComSquare::NotImplementedException:
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+Collaboration diagram for ComSquare::NotImplementedException:
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+Public Member Functions

 NotImplementedException ()=default
 
const charwhat () const noexcept override
 
+

Detailed Description

+

When this is thrown, it means that we should work more.

+

Constructor & Destructor Documentation

+ +

◆ NotImplementedException()

+ +
+
+ + + + + +
+ + + + + + + +
ComSquare::NotImplementedException::NotImplementedException ()
+
+explicitdefault
+
+ +
+
+

Member Function Documentation

+ +

◆ what()

+ +
+
+ + + + + +
+ + + + + + + +
const char* ComSquare::NotImplementedException::what () const
+
+inlineoverridenoexcept
+
+ +
+
+
The documentation for this class was generated from the following file: +
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ComSquare::PPU::PPU Member List
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This is the complete list of members for ComSquare::PPU::PPU, including all inherited members.

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
_ComSquare::PPU::PPU
_ComSquare::PPU::PPU
_endComSquare::Memory::IMemoryprivate
_startComSquare::Memory::IMemoryprivate
addressComSquare::PPU::PPU
addressRemappingComSquare::PPU::PPU
addSubscreenComSquare::PPU::PPU
addSubtractSelectComSquare::PPU::PPU
affectBg1ComSquare::PPU::PPU
affectBg2ComSquare::PPU::PPU
affectBg3ComSquare::PPU::PPU
affectBg4ComSquare::PPU::PPU
baseAddressBg1a3ComSquare::PPU::PPU
baseAddressBg2a4ComSquare::PPU::PPU
baseSelectComSquare::PPU::PPU
bg12nbaComSquare::PPU::PPUprivate
bg1ofsComSquare::PPU::PPUprivate
bg1scComSquare::PPU::PPUprivate
bg2ofsComSquare::PPU::PPUprivate
bg2scComSquare::PPU::PPUprivate
bg34nbaComSquare::PPU::PPUprivate
bg3ofsComSquare::PPU::PPUprivate
bg3scComSquare::PPU::PPUprivate
bg4ofsComSquare::PPU::PPUprivate
bg4scComSquare::PPU::PPUprivate
bgModeComSquare::PPU::PPU
bgmodeComSquare::PPU::PPUprivate
blueComSquare::PPU::PPU
blueComSquare::PPU::PPU
brightnessComSquare::PPU::PPU
centerComSquare::PPU::PPU
cgaddComSquare::PPU::PPUprivate
cgadsubComSquare::PPU::PPUprivate
cgdataComSquare::PPU::PPUprivate
cgwselComSquare::PPU::PPUprivate
characterSizeBg1ComSquare::PPU::PPU
characterSizeBg2ComSquare::PPU::PPU
characterSizeBg3ComSquare::PPU::PPU
characterSizeBg4ComSquare::PPU::PPU
clipColorToBlackBeforeMathComSquare::PPU::PPU
coldataComSquare::PPU::PPUprivate
colorIntensityComSquare::PPU::PPU
directColorModeComSquare::PPU::PPU
emptySpaceFillComSquare::PPU::PPU
enableColorMathBackdropComSquare::PPU::PPU
enableColorMathBg1ComSquare::PPU::PPU
enableColorMathBg2ComSquare::PPU::PPU
enableColorMathBg3ComSquare::PPU::PPU
enableColorMathBg4ComSquare::PPU::PPU
enableColorMathObjComSquare::PPU::PPU
enablePseudoHiresModeComSquare::PPU::PPU
enableWindow1ForBg1Bg2ObjComSquare::PPU::PPU
enableWindow1ForBg2Bg4ColorComSquare::PPU::PPU
enableWindow2ForBg1Bg3ObjComSquare::PPU::PPU
enableWindow2ForBg2Bg4ColorComSquare::PPU::PPU
enableWindowDisplayBg1ComSquare::PPU::PPU
enableWindowDisplayBg2ComSquare::PPU::PPU
enableWindowDisplayBg3ComSquare::PPU::PPU
enableWindowDisplayBg4ComSquare::PPU::PPU
enableWindowDisplayObjComSquare::PPU::PPU
enableWindowMaskingBg1ComSquare::PPU::PPU
enableWindowMaskingBg2ComSquare::PPU::PPU
enableWindowMaskingBg3ComSquare::PPU::PPU
enableWindowMaskingBg4ComSquare::PPU::PPU
enableWindowMaskingObjComSquare::PPU::PPU
externalSyncComSquare::PPU::PPU
fblankComSquare::PPU::PPU
getStart()ComSquare::Memory::IMemoryvirtual
greenComSquare::PPU::PPU
greenComSquare::PPU::PPU
halfColorMathComSquare::PPU::PPU
hasMemoryAt(uint24_t addr)ComSquare::Memory::IMemoryvirtual
horizontalMirroringComSquare::PPU::PPU
incrementCountComSquare::PPU::PPU
inidispComSquare::PPU::PPUprivate
m7ofsComSquare::PPU::PPUprivate
m7selComSquare::PPU::PPUprivate
m7xComSquare::PPU::PPUprivate
m7yComSquare::PPU::PPUprivate
maskLogicBg1ComSquare::PPU::PPU
maskLogicBg2ComSquare::PPU::PPU
maskLogicBg3ComSquare::PPU::PPU
maskLogicBg4ComSquare::PPU::PPU
maskLogicColorComSquare::PPU::PPU
maskLogicObjComSquare::PPU::PPU
mode1Bg3PriorityBitComSquare::PPU::PPU
mode7ExtBgComSquare::PPU::PPU
mosaicComSquare::PPU::PPUprivate
mpyComSquare::PPU::PPU
mpyComSquare::PPU::PPUprivate
mpyhComSquare::PPU::PPU
mpylComSquare::PPU::PPU
mpymComSquare::PPU::PPU
nameSelectComSquare::PPU::PPU
oamaddComSquare::PPU::PPUprivate
oamaddhComSquare::PPU::PPU
oamaddlComSquare::PPU::PPU
oamAddressComSquare::PPU::PPU
oamdataComSquare::PPU::PPUprivate
objectSizeComSquare::PPU::PPU
objInterlaceComSquare::PPU::PPU
objPriorityActivationBitComSquare::PPU::PPU
obselComSquare::PPU::PPUprivate
offsetBgComSquare::PPU::PPU
overscanModeComSquare::PPU::PPU
pixelSizeComSquare::PPU::PPU
playingFieldSizeComSquare::PPU::PPU
PPU()=defaultComSquare::PPU::PPUexplicit
preventColorMathComSquare::PPU::PPU
rawComSquare::PPU::PPU
rawComSquare::PPU::PPU
rawComSquare::PPU::PPU
read(uint24_t addr) overrideComSquare::PPU::PPUvirtual
redComSquare::PPU::PPU
redComSquare::PPU::PPU
screenInterlaceComSquare::PPU::PPU
setiniComSquare::PPU::PPUprivate
setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemory
tilemapAddressComSquare::PPU::PPU
tilemapHorizontalMirroringComSquare::PPU::PPU
tilemapVerticalMirroringComSquare::PPU::PPU
tmComSquare::PPU::PPUprivate
tmwComSquare::PPU::PPUprivate
tsComSquare::PPU::PPUprivate
tswComSquare::PPU::PPUprivate
update(int cycles)ComSquare::PPU::PPU
valueComSquare::PPU::PPU
verticalMirroringComSquare::PPU::PPU
vmaddComSquare::PPU::PPU
vmaddComSquare::PPU::PPUprivate
vmaddhComSquare::PPU::PPU
vmaddlComSquare::PPU::PPU
vmainComSquare::PPU::PPUprivate
vmdataComSquare::PPU::PPU
vmdataComSquare::PPU::PPUprivate
vmdatahComSquare::PPU::PPU
vmdatalComSquare::PPU::PPU
wbglogComSquare::PPU::PPUprivate
wh0ComSquare::PPU::PPUprivate
wh1ComSquare::PPU::PPUprivate
wh2ComSquare::PPU::PPUprivate
wh3ComSquare::PPU::PPUprivate
window1InversionForBg1Bg2ObjComSquare::PPU::PPU
window1InversionForBg2Bg4ColorComSquare::PPU::PPU
window2InversionForBg1Bg3ObjComSquare::PPU::PPU
window2InversionForBg2Bg4ColorComSquare::PPU::PPU
wobjlogComSquare::PPU::PPUprivate
write(uint24_t addr, uint8_t data) overrideComSquare::PPU::PPUvirtual
wselComSquare::PPU::PPUprivate
+ + + + diff --git a/docs/html/classComSquare_1_1PPU_1_1PPU.html b/docs/html/classComSquare_1_1PPU_1_1PPU.html new file mode 100644 index 0000000..b80dfdd --- /dev/null +++ b/docs/html/classComSquare_1_1PPU_1_1PPU.html @@ -0,0 +1,2993 @@ + + + + + + + +ComSquare: ComSquare::PPU::PPU Class Reference + + + + + + + + + +
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ComSquare +
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+Public Member Functions | +Private Attributes | +List of all members
+
+
ComSquare::PPU::PPU Class Reference
+
+
+ +

The struct containing all the registers the PPU. + More...

+ +

#include <PPU.hpp>

+
+Inheritance diagram for ComSquare::PPU::PPU:
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Inheritance graph
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+Collaboration diagram for ComSquare::PPU::PPU:
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Collaboration graph
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+Public Member Functions

 PPU ()=default
 
uint8_t read (uint24_t addr) override
 Read data from the component. More...
 
void write (uint24_t addr, uint8_t data) override
 Write data to this component. More...
 
void update (int cycles)
 Update the PPU of n cycles. More...
 
- Public Member Functions inherited from ComSquare::Memory::IMemory
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
virtual bool hasMemoryAt (uint24_t addr)
 Return true if this component has mapped the address. More...
 
virtual uint24_t getStart ()
 Get the first address mapped to this component. More...
 
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+Private Attributes

union {
   struct {
      bool   fblank: 1
 
      bool   _: 3
 
      uint8_t   brightness: 4
 
   } 
 
   uint8_t   raw
 
inidisp
 INIDISP Register (F-blank and Brightness) More...
 
union {
   struct {
      uint8_t   objectSize: 3
 
      bool   nameSelect: 2
 
      uint8_t   baseSelect: 3
 
   } 
 
   uint8_t   raw
 
obsel
 OBSEL Register (Object Size and Character Address) More...
 
union {
   struct {
      bool   objPriorityActivationBit: 1
 
      uint8_t   _: 6
 
      uint32_t   oamAddress: 9
 
   } 
 
   struct {
      uint8_t   oamaddh
 
      uint8_t   oamaddl
 
   } 
 
   uint32_t   raw
 
oamadd
 OAMADD Register (OAM Address and Obj Priority) More...
 
uint8_t oamdata
 OAMDATA Register (Data for OAM write) More...
 
union {
   struct {
      bool   characterSizeBg4: 1
 
      bool   characterSizeBg3: 1
 
      bool   characterSizeBg2: 1
 
      bool   characterSizeBg1: 1
 
      bool   mode1Bg3PriorityBit: 1
 
      uint8_t   bgMode: 3
 
   } 
 
   uint8_t   raw
 
bgmode
 BGMODE Register (OAM Address and Obj Priority) More...
 
union {
   struct {
      uint8_t   pixelSize: 4
 
      bool   affectBg4: 1
 
      bool   affectBg3: 1
 
      bool   affectBg2: 1
 
      bool   affectBg1: 1
 
   } 
 
   uint8_t   raw
 
mosaic
 MOSAIC Register (Screen Pixelation) More...
 
union {
   struct {
      uint8_t   tilemapAddress: 6
 
      bool   tilemapHorizontalMirroring: 1
 
      bool   tilemapVerticalMirroring: 1
 
   } 
 
   uint8_t   raw
 
bg1sc
 BG1SC Register (BG1 Tilemap Address and Size) More...
 
union {
   struct {
      uint8_t   tilemapAddress: 6
 
      bool   tilemapHorizontalMirroring: 1
 
      bool   tilemapVerticalMirroring: 1
 
   } 
 
   uint8_t   raw
 
bg2sc
 BG2SC Register (BG2 Tilemap Address and Size) More...
 
union {
   struct {
      uint8_t   tilemapAddress: 6
 
      bool   tilemapHorizontalMirroring: 1
 
      bool   tilemapVerticalMirroring: 1
 
   } 
 
   uint8_t   raw
 
bg3sc
 BG3SC Register (BG3 Tilemap Address and Size) More...
 
union {
   struct {
      uint8_t   tilemapAddress: 6
 
      bool   tilemapHorizontalMirroring: 1
 
      bool   tilemapVerticalMirroring: 1
 
   } 
 
   uint8_t   raw
 
bg4sc
 BG4SC Register (BG4 Tilemap Address and Size) More...
 
union {
   struct {
      uint8_t   baseAddressBg2a4: 4
 
      uint8_t   baseAddressBg1a3: 4
 
   } 
 
   uint8_t   raw
 
bg12nba
 BG12NBA Register (BG1 and 2 Chr Address) More...
 
union {
   struct {
      uint8_t   baseAddressBg2a4: 4
 
      uint8_t   baseAddressBg1a3: 4
 
   } 
 
   uint8_t   raw
 
bg34nba
 BG34NBA Register (BG3 and 4 Chr Address) More...
 
union {
   struct {
      uint8_t   _: 6
 
      uint32_t   offsetBg: 10
 
   } 
 
   uint16_t   raw
 
bg1ofs
 BG1HOFS Register (BG1 Horizontal Scroll) More...
 
union {
   struct {
      uint8_t   _: 3
 
      uint32_t   offsetBg: 13
 
   } 
 
   uint8_t   raw
 
m7ofs
 M7HOFS Register (Mode 7 BG Horizontal Scroll) More...
 
union {
   struct {
      uint8_t   _: 6
 
      uint32_t   offsetBg: 10
 
   } 
 
   uint8_t   raw
 
bg2ofs
 BG2HOFS Register (BG2 Horizontal Scroll) More...
 
union {
   struct {
      uint8_t   _: 6
 
      uint32_t   offsetBg: 10
 
   } 
 
   uint8_t   raw
 
bg3ofs
 BG3HOFS Register (BG3 Horizontal Scroll) More...
 
union {
   struct {
      uint8_t   _: 3
 
      uint32_t   offsetBg: 10
 
   } 
 
   uint8_t   raw
 
bg4ofs
 BG4HOFS Register (BG4 Horizontal Scroll) More...
 
union {
   struct {
      bool   address: 1
 
      uint8_t   _: 3
 
      uint8_t   addressRemapping: 2
 
      uint8_t   incrementCount: 2
 
   } 
 
   uint8_t   raw
 
vmain
 VMAIN Register (Video Port Control) More...
 
union {
   struct {
      uint8_t   vmaddh
 
      uint8_t   vmaddl
 
   } 
 
   uint32_t   vmadd
 
vmadd
 VMADD Register (VRAM Address) More...
 
union {
   struct {
      uint8_t   vmdatah
 
      uint8_t   vmdatal
 
   } 
 
   uint32_t   vmdata
 
vmdata
 VMDATA Register (VRAM Data Write) More...
 
union {
   struct {
      bool   playingFieldSize: 1
 
      bool   emptySpaceFill: 1
 
      uint8_t   _: 4
 
      bool   horizontalMirroring: 1
 
      bool   verticalMirroring: 1
 
   } 
 
   uint8_t   raw
 
m7sel
 M7SEL Register (Mode 7 Settings) More...
 
union {
   struct {
      uint8_t   _: 3
 
      uint8_t   value
 
   } 
 
   uint32_t   center
 
m7x
 M7X Register (Mode 7 Center X) More...
 
union {
   struct {
      uint8_t   _: 3
 
      uint8_t   value
 
   } 
 
   uint32_t   center
 
m7y
 M7Y Register (Mode 7 Center Y) More...
 
uint8_t cgadd
 CGADD Register (CGRAM Address) More...
 
union {
   struct {
      bool   _: 1
 
      uint8_t   blue: 5
 
      uint8_t   green: 5
 
      uint8_t   red: 5
 
   } 
 
   uint16_t   raw
 
cgdata
 CGDATA Register (CGRAM Data write) More...
 
union {
   struct {
      bool   enableWindow2ForBg2Bg4Color: 1
 
      bool   window2InversionForBg2Bg4Color: 1
 
      bool   enableWindow1ForBg2Bg4Color: 1
 
      bool   window1InversionForBg2Bg4Color: 1
 
      bool   enableWindow2ForBg1Bg3Obj: 1
 
      bool   window2InversionForBg1Bg3Obj: 1
 
      bool   enableWindow1ForBg1Bg2Obj: 1
 
      bool   window1InversionForBg1Bg2Obj: 1
 
   } 
 
   uint8_t   raw
 
wsel
 W12SEL - W34SEL Registers (Window Mask Settings for BGs) and WOBJSEL Register (Window Mask Settings for OBJ and Color Window) More...
 
uint8_t wh0
 WH0 Register (CWindow 1 Left Position) More...
 
uint8_t wh1
 WH1 Register (CWindow 1 Right Position) More...
 
uint8_t wh2
 WH2 Register (CWindow 2 Left Position) More...
 
uint8_t wh3
 WH3 Register (CWindow 2 Right Position) More...
 
union {
   struct {
      uint8_t   maskLogicBg1: 2
 
      uint8_t   maskLogicBg2: 2
 
      uint8_t   maskLogicBg3: 2
 
      uint8_t   maskLogicBg4: 2
 
   } 
 
   uint8_t   raw
 
wbglog
 WBGLOG Register (Window mask logic for BGs) More...
 
union {
   struct {
      uint8_t   _: 4
 
      uint8_t   maskLogicObj: 2
 
      uint8_t   maskLogicColor: 2
 
   } 
 
   uint8_t   raw
 
wobjlog
 WOBJLOG Register (Window mask logic for OBJs and Color Window) More...
 
union {
   struct {
      uint8_t   _: 3
 
      bool   enableWindowDisplayObj: 1
 
      bool   enableWindowDisplayBg4: 1
 
      bool   enableWindowDisplayBg3: 1
 
      bool   enableWindowDisplayBg2: 1
 
      bool   enableWindowDisplayBg1: 1
 
   } 
 
   uint8_t   raw
 
tm
 TM Register (Main Screen Designation) More...
 
union {
   struct {
      uint8_t   _: 3
 
      bool   enableWindowDisplayObj: 1
 
      bool   enableWindowDisplayBg4: 1
 
      bool   enableWindowDisplayBg3: 1
 
      bool   enableWindowDisplayBg2: 1
 
      bool   enableWindowDisplayBg1: 1
 
   } 
 
   uint8_t   raw
 
ts
 TS Register (Sub Screen Designation) More...
 
union {
   struct {
      uint8_t   _: 3
 
      bool   enableWindowMaskingObj: 1
 
      bool   enableWindowMaskingBg4: 1
 
      bool   enableWindowMaskingBg3: 1
 
      bool   enableWindowMaskingBg2: 1
 
      bool   enableWindowMaskingBg1: 1
 
   } 
 
   uint8_t   raw
 
tmw
 TMW Register (Window Mask Designation for the Main Screen) More...
 
union {
   struct {
      uint8_t   _: 3
 
      bool   enableWindowMaskingObj: 1
 
      bool   enableWindowMaskingBg4: 1
 
      bool   enableWindowMaskingBg3: 1
 
      bool   enableWindowMaskingBg2: 1
 
      bool   enableWindowMaskingBg1: 1
 
   } 
 
   uint8_t   raw
 
tsw
 TSW Register (Window Mask Designation for the Sub Screen) More...
 
union {
   struct {
      uint8_t   clipColorToBlackBeforeMath: 2
 
      uint8_t   preventColorMath: 2
 
      uint8_t   _: 2
 
      bool   addSubscreen: 1
 
      bool   directColorMode: 1
 
   } 
 
   uint8_t   raw
 
cgwsel
 CGWSEL Register (Color Addition Select) More...
 
union {
   struct {
      bool   addSubtractSelect: 1
 
      bool   halfColorMath: 1
 
      bool   enableColorMathBackdrop: 1
 
      bool   enableColorMathObj: 1
 
      bool   enableColorMathBg4: 1
 
      bool   enableColorMathBg3: 1
 
      bool   enableColorMathBg2: 1
 
      bool   enableColorMathBg1: 1
 
   } 
 
   uint8_t   raw
 
cgadsub
 CGADSUB Register (Color Math designation) More...
 
union {
   struct {
      bool   blue: 1
 
      bool   green: 1
 
      bool   red: 1
 
      uint8_t   colorIntensity: 5
 
   } 
 
   uint8_t   raw
 
coldata
 COLDATA Register (Fixed Color Data) More...
 
union {
   struct {
      bool   externalSync: 1
 
      bool   mode7ExtBg: 1
 
      uint8_t   _: 2
 
      bool   enablePseudoHiresMode: 1
 
      bool   overscanMode: 1
 
      bool   objInterlace: 1
 
      bool   screenInterlace: 1
 
   } 
 
   uint8_t   raw
 
setini
 SETINI Register (Screen Mode/Video Select) More...
 
union {
   struct {
      uint8_t   mpyl
 
      uint8_t   mpym
 
      uint8_t   mpyh
 
   } 
 
   uint32_t   mpy
 
mpy
 MPYL - MPYM - MPYH Registers (Multiplication Result) More...
 
+

Detailed Description

+

The struct containing all the registers the PPU.

+

Constructor & Destructor Documentation

+ +

◆ PPU()

+ +
+
+ + + + + +
+ + + + + + + +
ComSquare::PPU::PPU::PPU ()
+
+explicitdefault
+
+ +
+
+

Member Function Documentation

+ +

◆ read()

+ +
+
+ + + + + +
+ + + + + + + + +
uint8_t ComSquare::PPU::PPU::read (uint24_t addr)
+
+overridevirtual
+
+ +

Read data from the component.

+
Parameters
+ + +
addrThe local address to read from (0x0 should refer to the first byte of this component).
+
+
+
Exceptions
+ + +
Thisfunction should thrown an InvalidAddress for address that are not mapped to the component.
+
+
+
Returns
Return the data at the address given as parameter.
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+ +

◆ update()

+ +
+
+ + + + + + + + +
void ComSquare::PPU::PPU::update (int cycles)
+
+ +

Update the PPU of n cycles.

+
Parameters
+ + +
Thenumber of cycles to update.
+
+
+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::PPU::PPU::write (uint24_t addr,
uint8_t data 
)
+
+overridevirtual
+
+ +

Write data to this component.

+
Parameters
+ + + +
addrThe local address to write data (0x0 should refer to the first byte of this component).
dataThe new data to write.
+
+
+
Exceptions
+ + +
Thisfunction should thrown an InvalidAddress for address that are not mapped to the component.
+
+
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+

Member Data Documentation

+ +

◆ _ [1/2]

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::_
+
+ +
+
+ +

◆ _ [2/2]

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::_
+
+ +
+
+ +

◆ address

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::address
+
+ +
+
+ +

◆ addressRemapping

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::addressRemapping
+
+ +
+
+ +

◆ addSubscreen

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::addSubscreen
+
+ +
+
+ +

◆ addSubtractSelect

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::addSubtractSelect
+
+ +
+
+ +

◆ affectBg1

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::affectBg1
+
+ +
+
+ +

◆ affectBg2

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::affectBg2
+
+ +
+
+ +

◆ affectBg3

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::affectBg3
+
+ +
+
+ +

◆ affectBg4

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::affectBg4
+
+ +
+
+ +

◆ baseAddressBg1a3

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::baseAddressBg1a3
+
+ +
+
+ +

◆ baseAddressBg2a4

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::baseAddressBg2a4
+
+ +
+
+ +

◆ baseSelect

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::baseSelect
+
+ +
+
+ +

◆ bg12nba

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg12nba
+
+ +

BG12NBA Register (BG1 and 2 Chr Address)

+ +
+
+ +

◆ bg1ofs

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg1ofs
+
+ +

BG1HOFS Register (BG1 Horizontal Scroll)

+

BG1VOFS Register (BG1 Vertical Scroll)

+ +
+
+ +

◆ bg1sc

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg1sc
+
+ +

BG1SC Register (BG1 Tilemap Address and Size)

+ +
+
+ +

◆ bg2ofs

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg2ofs
+
+ +

BG2HOFS Register (BG2 Horizontal Scroll)

+

BG2VOFS Register (BG2 Vertical Scroll)

+ +
+
+ +

◆ bg2sc

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg2sc
+
+ +

BG2SC Register (BG2 Tilemap Address and Size)

+ +
+
+ +

◆ bg34nba

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg34nba
+
+ +

BG34NBA Register (BG3 and 4 Chr Address)

+ +
+
+ +

◆ bg3ofs

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg3ofs
+
+ +

BG3HOFS Register (BG3 Horizontal Scroll)

+

BG3VOFS Register (BG3 Vertical Scroll)

+ +
+
+ +

◆ bg3sc

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg3sc
+
+ +

BG3SC Register (BG3 Tilemap Address and Size)

+ +
+
+ +

◆ bg4ofs

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg4ofs
+
+ +

BG4HOFS Register (BG4 Horizontal Scroll)

+

BG4VOFS Register (BG4 Vertical Scroll)

+ +
+
+ +

◆ bg4sc

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bg4sc
+
+ +

BG4SC Register (BG4 Tilemap Address and Size)

+ +
+
+ +

◆ bgMode

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::bgMode
+
+ +
+
+ +

◆ bgmode

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::bgmode
+
+ +

BGMODE Register (OAM Address and Obj Priority)

+ +
+
+ +

◆ blue [1/2]

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::blue
+
+ +
+
+ +

◆ blue [2/2]

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::blue
+
+ +
+
+ +

◆ brightness

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::brightness
+
+ +
+
+ +

◆ center

+ +
+
+ + + + +
uint32_t ComSquare::PPU::PPU::center
+
+ +
+
+ +

◆ cgadd

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::PPU::PPU::cgadd
+
+private
+
+ +

CGADD Register (CGRAM Address)

+ +
+
+ +

◆ cgadsub

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::cgadsub
+
+ +

CGADSUB Register (Color Math designation)

+ +
+
+ +

◆ cgdata

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::cgdata
+
+ +

CGDATA Register (CGRAM Data write)

+ +
+
+ +

◆ cgwsel

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::cgwsel
+
+ +

CGWSEL Register (Color Addition Select)

+ +
+
+ +

◆ characterSizeBg1

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::characterSizeBg1
+
+ +
+
+ +

◆ characterSizeBg2

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::characterSizeBg2
+
+ +
+
+ +

◆ characterSizeBg3

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::characterSizeBg3
+
+ +
+
+ +

◆ characterSizeBg4

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::characterSizeBg4
+
+ +
+
+ +

◆ clipColorToBlackBeforeMath

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::clipColorToBlackBeforeMath
+
+ +
+
+ +

◆ coldata

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::coldata
+
+ +

COLDATA Register (Fixed Color Data)

+ +
+
+ +

◆ colorIntensity

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::colorIntensity
+
+ +
+
+ +

◆ directColorMode

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::directColorMode
+
+ +
+
+ +

◆ emptySpaceFill

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::emptySpaceFill
+
+ +
+
+ +

◆ enableColorMathBackdrop

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableColorMathBackdrop
+
+ +
+
+ +

◆ enableColorMathBg1

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableColorMathBg1
+
+ +
+
+ +

◆ enableColorMathBg2

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableColorMathBg2
+
+ +
+
+ +

◆ enableColorMathBg3

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableColorMathBg3
+
+ +
+
+ +

◆ enableColorMathBg4

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableColorMathBg4
+
+ +
+
+ +

◆ enableColorMathObj

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableColorMathObj
+
+ +
+
+ +

◆ enablePseudoHiresMode

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enablePseudoHiresMode
+
+ +
+
+ +

◆ enableWindow1ForBg1Bg2Obj

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindow1ForBg1Bg2Obj
+
+ +
+
+ +

◆ enableWindow1ForBg2Bg4Color

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindow1ForBg2Bg4Color
+
+ +
+
+ +

◆ enableWindow2ForBg1Bg3Obj

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindow2ForBg1Bg3Obj
+
+ +
+
+ +

◆ enableWindow2ForBg2Bg4Color

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindow2ForBg2Bg4Color
+
+ +
+
+ +

◆ enableWindowDisplayBg1

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowDisplayBg1
+
+ +
+
+ +

◆ enableWindowDisplayBg2

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowDisplayBg2
+
+ +
+
+ +

◆ enableWindowDisplayBg3

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowDisplayBg3
+
+ +
+
+ +

◆ enableWindowDisplayBg4

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowDisplayBg4
+
+ +
+
+ +

◆ enableWindowDisplayObj

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowDisplayObj
+
+ +
+
+ +

◆ enableWindowMaskingBg1

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowMaskingBg1
+
+ +
+
+ +

◆ enableWindowMaskingBg2

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowMaskingBg2
+
+ +
+
+ +

◆ enableWindowMaskingBg3

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowMaskingBg3
+
+ +
+
+ +

◆ enableWindowMaskingBg4

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowMaskingBg4
+
+ +
+
+ +

◆ enableWindowMaskingObj

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::enableWindowMaskingObj
+
+ +
+
+ +

◆ externalSync

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::externalSync
+
+ +
+
+ +

◆ fblank

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::fblank
+
+ +
+
+ +

◆ green [1/2]

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::green
+
+ +
+
+ +

◆ green [2/2]

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::green
+
+ +
+
+ +

◆ halfColorMath

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::halfColorMath
+
+ +
+
+ +

◆ horizontalMirroring

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::horizontalMirroring
+
+ +
+
+ +

◆ incrementCount

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::incrementCount
+
+ +
+
+ +

◆ inidisp

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::inidisp
+
+ +

INIDISP Register (F-blank and Brightness)

+ +
+
+ +

◆ m7ofs

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::m7ofs
+
+ +

M7HOFS Register (Mode 7 BG Horizontal Scroll)

+

M7VOFS Register (Mode 7 BG Vertical Scroll)

+ +
+
+ +

◆ m7sel

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::m7sel
+
+ +

M7SEL Register (Mode 7 Settings)

+ +
+
+ +

◆ m7x

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::m7x
+
+ +

M7X Register (Mode 7 Center X)

+

M7A M7B M7C M7D i didn't understand how they works so they will be added later.

+ +
+
+ +

◆ m7y

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::m7y
+
+ +

M7Y Register (Mode 7 Center Y)

+ +
+
+ +

◆ maskLogicBg1

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::maskLogicBg1
+
+ +
+
+ +

◆ maskLogicBg2

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::maskLogicBg2
+
+ +
+
+ +

◆ maskLogicBg3

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::maskLogicBg3
+
+ +
+
+ +

◆ maskLogicBg4

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::maskLogicBg4
+
+ +
+
+ +

◆ maskLogicColor

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::maskLogicColor
+
+ +
+
+ +

◆ maskLogicObj

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::maskLogicObj
+
+ +
+
+ +

◆ mode1Bg3PriorityBit

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::mode1Bg3PriorityBit
+
+ +
+
+ +

◆ mode7ExtBg

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::mode7ExtBg
+
+ +
+
+ +

◆ mosaic

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::mosaic
+
+ +

MOSAIC Register (Screen Pixelation)

+ +
+
+ +

◆ mpy [1/2]

+ +
+
+ + + + +
uint32_t ComSquare::PPU::PPU::mpy
+
+ +
+
+ +

◆ mpy [2/2]

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::mpy
+
+ +

MPYL - MPYM - MPYH Registers (Multiplication Result)

+ +
+
+ +

◆ mpyh

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::mpyh
+
+ +
+
+ +

◆ mpyl

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::mpyl
+
+ +
+
+ +

◆ mpym

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::mpym
+
+ +
+
+ +

◆ nameSelect

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::nameSelect
+
+ +
+
+ +

◆ oamadd

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::oamadd
+
+ +

OAMADD Register (OAM Address and Obj Priority)

+ +
+
+ +

◆ oamaddh

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::oamaddh
+
+ +
+
+ +

◆ oamaddl

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::oamaddl
+
+ +
+
+ +

◆ oamAddress

+ +
+
+ + + + +
uint32_t ComSquare::PPU::PPU::oamAddress
+
+ +
+
+ +

◆ oamdata

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::PPU::PPU::oamdata
+
+private
+
+ +

OAMDATA Register (Data for OAM write)

+ +
+
+ +

◆ objectSize

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::objectSize
+
+ +
+
+ +

◆ objInterlace

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::objInterlace
+
+ +
+
+ +

◆ objPriorityActivationBit

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::objPriorityActivationBit
+
+ +
+
+ +

◆ obsel

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::obsel
+
+ +

OBSEL Register (Object Size and Character Address)

+ +
+
+ +

◆ offsetBg

+ +
+
+ + + + +
uint32_t ComSquare::PPU::PPU::offsetBg
+
+ +
+
+ +

◆ overscanMode

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::overscanMode
+
+ +
+
+ +

◆ pixelSize

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::pixelSize
+
+ +
+
+ +

◆ playingFieldSize

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::playingFieldSize
+
+ +
+
+ +

◆ preventColorMath

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::preventColorMath
+
+ +
+
+ +

◆ raw [1/3]

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::raw
+
+ +
+
+ +

◆ raw [2/3]

+ +
+
+ + + + +
uint32_t ComSquare::PPU::PPU::raw
+
+ +
+
+ +

◆ raw [3/3]

+ +
+
+ + + + +
uint16_t ComSquare::PPU::PPU::raw
+
+ +
+
+ +

◆ red [1/2]

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::red
+
+ +
+
+ +

◆ red [2/2]

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::red
+
+ +
+
+ +

◆ screenInterlace

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::screenInterlace
+
+ +
+
+ +

◆ setini

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::setini
+
+ +

SETINI Register (Screen Mode/Video Select)

+ +
+
+ +

◆ tilemapAddress

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::tilemapAddress
+
+ +
+
+ +

◆ tilemapHorizontalMirroring

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::tilemapHorizontalMirroring
+
+ +
+
+ +

◆ tilemapVerticalMirroring

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::tilemapVerticalMirroring
+
+ +
+
+ +

◆ tm

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::tm
+
+ +

TM Register (Main Screen Designation)

+ +
+
+ +

◆ tmw

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::tmw
+
+ +

TMW Register (Window Mask Designation for the Main Screen)

+ +
+
+ +

◆ ts

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::ts
+
+ +

TS Register (Sub Screen Designation)

+ +
+
+ +

◆ tsw

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::tsw
+
+ +

TSW Register (Window Mask Designation for the Sub Screen)

+ +
+
+ +

◆ value

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::value
+
+ +
+
+ +

◆ verticalMirroring

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::verticalMirroring
+
+ +
+
+ +

◆ vmadd [1/2]

+ +
+
+ + + + +
uint32_t ComSquare::PPU::PPU::vmadd
+
+ +
+
+ +

◆ vmadd [2/2]

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::vmadd
+
+ +

VMADD Register (VRAM Address)

+ +
+
+ +

◆ vmaddh

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::vmaddh
+
+ +
+
+ +

◆ vmaddl

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::vmaddl
+
+ +
+
+ +

◆ vmain

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::vmain
+
+ +

VMAIN Register (Video Port Control)

+ +
+
+ +

◆ vmdata [1/2]

+ +
+
+ + + + +
uint32_t ComSquare::PPU::PPU::vmdata
+
+ +
+
+ +

◆ vmdata [2/2]

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::vmdata
+
+ +

VMDATA Register (VRAM Data Write)

+ +
+
+ +

◆ vmdatah

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::vmdatah
+
+ +
+
+ +

◆ vmdatal

+ +
+
+ + + + +
uint8_t ComSquare::PPU::PPU::vmdatal
+
+ +
+
+ +

◆ wbglog

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::wbglog
+
+ +

WBGLOG Register (Window mask logic for BGs)

+ +
+
+ +

◆ wh0

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::PPU::PPU::wh0
+
+private
+
+ +

WH0 Register (CWindow 1 Left Position)

+ +
+
+ +

◆ wh1

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::PPU::PPU::wh1
+
+private
+
+ +

WH1 Register (CWindow 1 Right Position)

+ +
+
+ +

◆ wh2

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::PPU::PPU::wh2
+
+private
+
+ +

WH2 Register (CWindow 2 Left Position)

+ +
+
+ +

◆ wh3

+ +
+
+ + + + + +
+ + + + +
uint8_t ComSquare::PPU::PPU::wh3
+
+private
+
+ +

WH3 Register (CWindow 2 Right Position)

+ +
+
+ +

◆ window1InversionForBg1Bg2Obj

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::window1InversionForBg1Bg2Obj
+
+ +
+
+ +

◆ window1InversionForBg2Bg4Color

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::window1InversionForBg2Bg4Color
+
+ +
+
+ +

◆ window2InversionForBg1Bg3Obj

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::window2InversionForBg1Bg3Obj
+
+ +
+
+ +

◆ window2InversionForBg2Bg4Color

+ +
+
+ + + + +
bool ComSquare::PPU::PPU::window2InversionForBg2Bg4Color
+
+ +
+
+ +

◆ wobjlog

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::wobjlog
+
+ +

WOBJLOG Register (Window mask logic for OBJs and Color Window)

+ +
+
+ +

◆ wsel

+ +
+
+ + + + +
union { ... } ComSquare::PPU::PPU::wsel
+
+ +

W12SEL - W34SEL Registers (Window Mask Settings for BGs) and WOBJSEL Register (Window Mask Settings for OBJ and Color Window)

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.map b/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.map new file mode 100644 index 0000000..aee1961 --- /dev/null +++ b/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.md5 b/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.md5 new file mode 100644 index 0000000..f9b4635 --- /dev/null +++ b/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.md5 @@ -0,0 +1 @@ +10568a59ed5c91a77e181c115fead736 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.png b/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.png new file mode 100644 index 0000000..961d2d1 Binary files /dev/null and b/docs/html/classComSquare_1_1PPU_1_1PPU__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.map b/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.map new file mode 100644 index 0000000..aee1961 --- /dev/null +++ b/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.md5 b/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.md5 new file mode 100644 index 0000000..f9b4635 --- /dev/null +++ b/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.md5 @@ -0,0 +1 @@ +10568a59ed5c91a77e181c115fead736 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.png b/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.png new file mode 100644 index 0000000..961d2d1 Binary files /dev/null and b/docs/html/classComSquare_1_1PPU_1_1PPU__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1Ram_1_1Ram-members.html b/docs/html/classComSquare_1_1Ram_1_1Ram-members.html new file mode 100644 index 0000000..5170944 --- /dev/null +++ b/docs/html/classComSquare_1_1Ram_1_1Ram-members.html @@ -0,0 +1,94 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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+
ComSquare::Ram::Ram Member List
+
+
+ +

This is the complete list of members for ComSquare::Ram::Ram, including all inherited members.

+ + + + + + + + + + + + +
_dataComSquare::Ram::Ramprivate
_endComSquare::Memory::IMemoryprivate
_sizeComSquare::Ram::Ramprivate
_startComSquare::Memory::IMemoryprivate
getStart()ComSquare::Memory::IMemoryvirtual
hasMemoryAt(uint24_t addr)ComSquare::Memory::IMemoryvirtual
Ram(size_t size)ComSquare::Ram::Ramexplicit
read(uint24_t addr) overrideComSquare::Ram::Ramvirtual
setMemoryRegion(uint24_t start, uint24_t end)ComSquare::Memory::IMemory
write(uint24_t addr, uint8_t data) overrideComSquare::Ram::Ramvirtual
~Ram()ComSquare::Ram::Ram
+ + + + diff --git a/docs/html/classComSquare_1_1Ram_1_1Ram.html b/docs/html/classComSquare_1_1Ram_1_1Ram.html new file mode 100644 index 0000000..d750ba9 --- /dev/null +++ b/docs/html/classComSquare_1_1Ram_1_1Ram.html @@ -0,0 +1,337 @@ + + + + + + + +ComSquare: ComSquare::Ram::Ram Class Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+
+Public Member Functions | +Private Attributes | +List of all members
+
+
ComSquare::Ram::Ram Class Reference
+
+
+ +

#include <Ram.hpp>

+
+Inheritance diagram for ComSquare::Ram::Ram:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::Ram::Ram:
+
+
Collaboration graph
+ + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

 Ram (size_t size)
 Load a rom from it's path. More...
 
 ~Ram ()
 Destructor that free the ram. More...
 
uint8_t read (uint24_t addr) override
 Read from the ram. More...
 
void write (uint24_t addr, uint8_t data) override
 Write data to the ram. More...
 
- Public Member Functions inherited from ComSquare::Memory::IMemory
void setMemoryRegion (uint24_t start, uint24_t end)
 Change starting and ending points of this mapped memory. More...
 
virtual bool hasMemoryAt (uint24_t addr)
 Return true if this component has mapped the address. More...
 
virtual uint24_t getStart ()
 Get the first address mapped to this component. More...
 
+ + + + + + + +

+Private Attributes

uint8_t * _data
 The ram. (Can be used for WRam, SRam, VRam etc) More...
 
size_t _size
 The size of the ram. More...
 
+

Constructor & Destructor Documentation

+ +

◆ Ram()

+ +
+
+ + + + + +
+ + + + + + + + +
ComSquare::Ram::Ram::Ram (size_t size)
+
+explicit
+
+ +

Load a rom from it's path.

+ +
+
+ +

◆ ~Ram()

+ +
+
+ + + + + + + +
ComSquare::Ram::Ram::~Ram ()
+
+ +

Destructor that free the ram.

+ +
+
+

Member Function Documentation

+ +

◆ read()

+ +
+
+ + + + + +
+ + + + + + + + +
uint8_t ComSquare::Ram::Ram::read (uint24_t addr)
+
+overridevirtual
+
+ +

Read from the ram.

+
Parameters
+ + +
addrThe address to read from. The address 0x0 should refer to the first byte of this ram.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than the size of the ram.
+
+
+
Returns
Return the data at the address.
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+ +

◆ write()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + +
void ComSquare::Ram::Ram::write (uint24_t addr,
uint8_t data 
)
+
+overridevirtual
+
+ +

Write data to the ram.

+
Parameters
+ + + +
addrThe address to write to. The address 0x0 should refer to the first byte of this ram.
dataThe data to write.
+
+
+
Exceptions
+ + +
InvalidAddresswill be thrown if the address is more than the size of the ram.
+
+
+ +

Implements ComSquare::Memory::IMemory.

+ +
+
+

Member Data Documentation

+ +

◆ _data

+ +
+
+ + + + + +
+ + + + +
uint8_t* ComSquare::Ram::Ram::_data
+
+private
+
+ +

The ram. (Can be used for WRam, SRam, VRam etc)

+ +
+
+ +

◆ _size

+ +
+
+ + + + + +
+ + + + +
size_t ComSquare::Ram::Ram::_size
+
+private
+
+ +

The size of the ram.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.map b/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.map new file mode 100644 index 0000000..2260e71 --- /dev/null +++ b/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.md5 b/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.md5 new file mode 100644 index 0000000..87e5ec2 --- /dev/null +++ b/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.md5 @@ -0,0 +1 @@ +2b48145a2ea8d89183b01a5b62b53785 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.png b/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.png new file mode 100644 index 0000000..ccac860 Binary files /dev/null and b/docs/html/classComSquare_1_1Ram_1_1Ram__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.map b/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.map new file mode 100644 index 0000000..2260e71 --- /dev/null +++ b/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.md5 b/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.md5 new file mode 100644 index 0000000..87e5ec2 --- /dev/null +++ b/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.md5 @@ -0,0 +1 @@ +2b48145a2ea8d89183b01a5b62b53785 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.png b/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.png new file mode 100644 index 0000000..ccac860 Binary files /dev/null and b/docs/html/classComSquare_1_1Ram_1_1Ram__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1Renderer_1_1IRenderer-members.html b/docs/html/classComSquare_1_1Renderer_1_1IRenderer-members.html new file mode 100644 index 0000000..095325d --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1IRenderer-members.html @@ -0,0 +1,87 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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+
+
+
ComSquare::Renderer::IRenderer Member List
+
+
+ +

This is the complete list of members for ComSquare::Renderer::IRenderer, including all inherited members.

+ + + + + +
drawScreen()=0ComSquare::Renderer::IRendererpure virtual
putPixel(int x, int y, uint8_t rgba)=0ComSquare::Renderer::IRendererpure virtual
setWindowName(std::string)=0ComSquare::Renderer::IRendererpure virtual
shouldExitComSquare::Renderer::IRenderer
+ + + + diff --git a/docs/html/classComSquare_1_1Renderer_1_1IRenderer.html b/docs/html/classComSquare_1_1Renderer_1_1IRenderer.html new file mode 100644 index 0000000..a5fbe83 --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1IRenderer.html @@ -0,0 +1,248 @@ + + + + + + + +ComSquare: ComSquare::Renderer::IRenderer Class Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
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+Public Member Functions | +Public Attributes | +List of all members
+
+
ComSquare::Renderer::IRenderer Class Referenceabstract
+
+
+ +

#include <IRenderer.hpp>

+
+Inheritance diagram for ComSquare::Renderer::IRenderer:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::Renderer::IRenderer:
+
+
Collaboration graph
+ + + +
+ + + + + + + + + + + +

+Public Member Functions

virtual void setWindowName (std::string)=0
 Set a new name to the window, if there is already a name it will be overwrite. More...
 
virtual void drawScreen ()=0
 Render the buffer to the window. More...
 
virtual void putPixel (int x, int y, uint8_t rgba)=0
 Set a pixel to the coordinates x, y with the color rgba. More...
 
+ + + + +

+Public Attributes

bool shouldExit
 Tells to the program if the window has been closed, and therefore if he should stop. More...
 
+

Member Function Documentation

+ +

◆ drawScreen()

+ +
+
+ + + + + +
+ + + + + + + +
virtual void ComSquare::Renderer::IRenderer::drawScreen ()
+
+pure virtual
+
+ +

Render the buffer to the window.

+ +

Implemented in ComSquare::Renderer::SFRenderer.

+ +
+
+ +

◆ putPixel()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + +
virtual void ComSquare::Renderer::IRenderer::putPixel (int x,
int y,
uint8_t rgba 
)
+
+pure virtual
+
+ +

Set a pixel to the coordinates x, y with the color rgba.

+ +

Implemented in ComSquare::Renderer::SFRenderer.

+ +
+
+ +

◆ setWindowName()

+ +
+
+ + + + + +
+ + + + + + + + +
virtual void ComSquare::Renderer::IRenderer::setWindowName (std::string )
+
+pure virtual
+
+ +

Set a new name to the window, if there is already a name it will be overwrite.

+ +

Implemented in ComSquare::Renderer::SFRenderer.

+ +
+
+

Member Data Documentation

+ +

◆ shouldExit

+ +
+
+ + + + +
bool ComSquare::Renderer::IRenderer::shouldExit
+
+ +

Tells to the program if the window has been closed, and therefore if he should stop.

+ +
+
+
The documentation for this class was generated from the following file: +
+ + + + diff --git a/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.map b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.map new file mode 100644 index 0000000..090a63d --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.md5 b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.md5 new file mode 100644 index 0000000..98eaa90 --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.md5 @@ -0,0 +1 @@ +2d93bbc8da7823f02076cda65766454f \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.png b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.png new file mode 100644 index 0000000..176381c Binary files /dev/null and b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.map b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.map new file mode 100644 index 0000000..028abc4 --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.md5 b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.md5 new file mode 100644 index 0000000..67698ac --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.md5 @@ -0,0 +1 @@ +d36f82116490b754b9e54976977c89ad \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.png b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.png new file mode 100644 index 0000000..1f6afd6 Binary files /dev/null and b/docs/html/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.png differ diff --git a/docs/html/classComSquare_1_1Renderer_1_1SFRenderer-members.html b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer-members.html new file mode 100644 index 0000000..384f8d1 --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer-members.html @@ -0,0 +1,89 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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ComSquare::Renderer::SFRenderer Member List
+
+
+ +

This is the complete list of members for ComSquare::Renderer::SFRenderer, including all inherited members.

+ + + + + + + +
drawScreen() overrideComSquare::Renderer::SFRenderervirtual
putPixel(int x, int y, uint8_t rgba) overrideComSquare::Renderer::SFRenderervirtual
setWindowName(std::string) overrideComSquare::Renderer::SFRenderervirtual
shouldExitComSquare::Renderer::IRenderer
videoModeComSquare::Renderer::SFRendererprivate
windowComSquare::Renderer::SFRendererprivate
+ + + + diff --git a/docs/html/classComSquare_1_1Renderer_1_1SFRenderer.html b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer.html new file mode 100644 index 0000000..e8332aa --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer.html @@ -0,0 +1,306 @@ + + + + + + + +ComSquare: ComSquare::Renderer::SFRenderer Class Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
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+
+
+Public Member Functions | +Private Attributes | +List of all members
+
+
ComSquare::Renderer::SFRenderer Class Reference
+
+
+ +

#include <SFRenderer.hpp>

+
+Inheritance diagram for ComSquare::Renderer::SFRenderer:
+
+
Inheritance graph
+ + + + +
+
+Collaboration diagram for ComSquare::Renderer::SFRenderer:
+
+
Collaboration graph
+ + + + +
+ + + + + + + + + + + +

+Public Member Functions

void setWindowName (std::string) override
 Set a new name to the window, if there is already a name it will be overwrite. More...
 
void drawScreen () override
 Update the screen by printing the buffer. More...
 
void putPixel (int x, int y, uint8_t rgba) override
 Add a pixel to the buffer to the coordinates x, y with the color rgba. More...
 
+ + + + + + + +

+Private Attributes

sf::Window window
 The main Window. More...
 
sf::VideoMode videoMode
 Video Mode containing the height and width of the window. More...
 
+ + + + + +

+Additional Inherited Members

- Public Attributes inherited from ComSquare::Renderer::IRenderer
bool shouldExit
 Tells to the program if the window has been closed, and therefore if he should stop. More...
 
+

Member Function Documentation

+ +

◆ drawScreen()

+ +
+
+ + + + + +
+ + + + + + + +
void ComSquare::Renderer::SFRenderer::drawScreen ()
+
+overridevirtual
+
+ +

Update the screen by printing the buffer.

+ +

Implements ComSquare::Renderer::IRenderer.

+ +
+
+ +

◆ putPixel()

+ +
+
+ + + + + +
+ + + + + + + + + + + + + + + + + + + + + + + + +
void ComSquare::Renderer::SFRenderer::putPixel (int x,
int y,
uint8_t rgba 
)
+
+overridevirtual
+
+ +

Add a pixel to the buffer to the coordinates x, y with the color rgba.

+
Parameters
+ + + + +
Xhorizontal index.
Yvertical index.
rgba: The color of the pixel.
+
+
+ +

Implements ComSquare::Renderer::IRenderer.

+ +
+
+ +

◆ setWindowName()

+ +
+
+ + + + + +
+ + + + + + + + +
void ComSquare::Renderer::SFRenderer::setWindowName (std::string )
+
+overridevirtual
+
+ +

Set a new name to the window, if there is already a name it will be overwrite.

+
Parameters
+ + +
Anew title for the window.
+
+
+ +

Implements ComSquare::Renderer::IRenderer.

+ +
+
+

Member Data Documentation

+ +

◆ videoMode

+ +
+
+ + + + + +
+ + + + +
sf::VideoMode ComSquare::Renderer::SFRenderer::videoMode
+
+private
+
+ +

Video Mode containing the height and width of the window.

+ +
+
+ +

◆ window

+ +
+
+ + + + + +
+ + + + +
sf::Window ComSquare::Renderer::SFRenderer::window
+
+private
+
+ +

The main Window.

+ +
+
+
The documentation for this class was generated from the following files: +
+ + + + diff --git a/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.map b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.map new file mode 100644 index 0000000..6698085 --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.md5 b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.md5 new file mode 100644 index 0000000..6a27efc --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.md5 @@ -0,0 +1 @@ +294360e7f73c98875ae554a754cd5d43 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.png b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.png new file mode 100644 index 0000000..a0edd0b Binary files /dev/null and b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.png differ diff --git a/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.map b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.map new file mode 100644 index 0000000..6698085 --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.md5 b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.md5 new file mode 100644 index 0000000..6a27efc --- /dev/null +++ b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.md5 @@ -0,0 +1 @@ +294360e7f73c98875ae554a754cd5d43 \ No newline at end of file diff --git a/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.png b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.png new file mode 100644 index 0000000..a0edd0b Binary files /dev/null and b/docs/html/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.png differ diff --git a/docs/html/classes.html b/docs/html/classes.html new file mode 100644 index 0000000..7b9fb5e --- /dev/null +++ b/docs/html/classes.html @@ -0,0 +1,138 @@ + + + + + + + +ComSquare: Class Index + + + + + + + + + +
+
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Class Index
+
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+
InvalidAddress (ComSquare)   
  p  
+
Registers (ComSquare::CPU)   
InvalidRomException (ComSquare)   
  s  
+
APU (ComSquare::APU)   Header (ComSquare::Cartridge)   IRectangleMemory (ComSquare::Memory)   Registers::p (ComSquare::CPU)   
  c  
+
  i  
+
IRenderer (ComSquare::Renderer)   PPU (ComSquare::PPU)   SFRenderer (ComSquare::Renderer)   
  m  
+
InternalRegisters::psw (ComSquare::APU)   SNES (ComSquare)   
Cartridge (ComSquare::Cartridge)   IMemory (ComSquare::Memory)   
  r  
+
CPU (ComSquare::CPU)   InternalRegisters (ComSquare::APU)   MemoryBus (ComSquare::Memory)   
  d  
+
InternalRegisters (ComSquare::CPU)   MemoryShadow (ComSquare::Memory)   Ram (ComSquare::Ram)   
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  n  
+
Registers (ComSquare::APU::DSP)   
DSP (ComSquare::APU::DSP)   InvalidAction (ComSquare)   Registers (ComSquare::APU)   
NotImplementedException (ComSquare)   
+
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+ + + + diff --git a/docs/html/clion-environment_8txt.html b/docs/html/clion-environment_8txt.html new file mode 100644 index 0000000..0388143 --- /dev/null +++ b/docs/html/clion-environment_8txt.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: cmake-build-debug/CMakeFiles/clion-environment.txt File Reference + + + + + + + + + +
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ComSquare +
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cmake-build-debug/CMakeFiles/clion-environment.txt File Reference
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ComSquare +
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+

sources → APU Relation

File in sourcesIncludes file in sources/APU
SNES.hppAPU.hpp
+ + + + diff --git a/docs/html/dir_000007_000009.html b/docs/html/dir_000007_000009.html new file mode 100644 index 0000000..e332a31 --- /dev/null +++ b/docs/html/dir_000007_000009.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources -> Cartridge Relation + + + + + + + + + +
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ComSquare +
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+

sources → Cartridge Relation

File in sourcesIncludes file in sources/Cartridge
SNES.hppCartridge.hpp
+ + + + diff --git a/docs/html/dir_000007_000010.html b/docs/html/dir_000007_000010.html new file mode 100644 index 0000000..749c5ff --- /dev/null +++ b/docs/html/dir_000007_000010.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources -> CPU Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

sources → CPU Relation

File in sourcesIncludes file in sources/CPU
SNES.hppCPU.hpp
+ + + + diff --git a/docs/html/dir_000007_000015.html b/docs/html/dir_000007_000015.html new file mode 100644 index 0000000..57b2cb1 --- /dev/null +++ b/docs/html/dir_000007_000015.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources -> PPU Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

sources → PPU Relation

File in sourcesIncludes file in sources/PPU
SNES.hppPPU.hpp
+ + + + diff --git a/docs/html/dir_000007_000016.html b/docs/html/dir_000007_000016.html new file mode 100644 index 0000000..94986f9 --- /dev/null +++ b/docs/html/dir_000007_000016.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources -> Ram Relation + + + + + + + + + +
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ComSquare +
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sources → Ram Relation

File in sourcesIncludes file in sources/Ram
SNES.hppRam.hpp
+ + + + diff --git a/docs/html/dir_000008_000011.html b/docs/html/dir_000008_000011.html new file mode 100644 index 0000000..bd0eb5e --- /dev/null +++ b/docs/html/dir_000008_000011.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/APU -> DSP Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
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+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

APU → DSP Relation

File in sources/APUIncludes file in sources/DSP
APU.hppDSP.hpp
+ + + + diff --git a/docs/html/dir_000008_000012.html b/docs/html/dir_000008_000012.html new file mode 100644 index 0000000..d39b3dc --- /dev/null +++ b/docs/html/dir_000008_000012.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/APU -> Exceptions Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

APU → Exceptions Relation

File in sources/APUIncludes file in sources/Exceptions
APU.cppInvalidAddress.hpp
APU.cppNotImplementedException.hpp
+ + + + diff --git a/docs/html/dir_000008_000013.html b/docs/html/dir_000008_000013.html new file mode 100644 index 0000000..a127e7c --- /dev/null +++ b/docs/html/dir_000008_000013.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/APU -> Memory Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

APU → Memory Relation

File in sources/APUIncludes file in sources/Memory
APU.hppIMemory.hpp
+ + + + diff --git a/docs/html/dir_000009_000012.html b/docs/html/dir_000009_000012.html new file mode 100644 index 0000000..a1b9178 --- /dev/null +++ b/docs/html/dir_000009_000012.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/Cartridge -> Exceptions Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

Cartridge → Exceptions Relation

File in sources/CartridgeIncludes file in sources/Exceptions
Cartridge.cppInvalidAction.hpp
Cartridge.cppInvalidAddress.hpp
Cartridge.cppInvalidRom.hpp
+ + + + diff --git a/docs/html/dir_000009_000013.html b/docs/html/dir_000009_000013.html new file mode 100644 index 0000000..7fdb3c1 --- /dev/null +++ b/docs/html/dir_000009_000013.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/Cartridge -> Memory Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

Cartridge → Memory Relation

File in sources/CartridgeIncludes file in sources/Memory
Cartridge.hppIMemory.hpp
Cartridge.hppIRectangleMemory.hpp
+ + + + diff --git a/docs/html/dir_000009_000014.html b/docs/html/dir_000009_000014.html new file mode 100644 index 0000000..2fd1868 --- /dev/null +++ b/docs/html/dir_000009_000014.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/Cartridge -> Models Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

Cartridge → Models Relation

File in sources/CartridgeIncludes file in sources/Models
Cartridge.hppInts.hpp
+ + + + diff --git a/docs/html/dir_000010_000012.html b/docs/html/dir_000010_000012.html new file mode 100644 index 0000000..5cc10fd --- /dev/null +++ b/docs/html/dir_000010_000012.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/CPU -> Exceptions Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

CPU → Exceptions Relation

File in sources/CPUIncludes file in sources/Exceptions
CPU.cppInvalidAddress.hpp
CPU.cppNotImplementedException.hpp
+ + + + diff --git a/docs/html/dir_000010_000013.html b/docs/html/dir_000010_000013.html new file mode 100644 index 0000000..657f5ed --- /dev/null +++ b/docs/html/dir_000010_000013.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/CPU -> Memory Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

CPU → Memory Relation

File in sources/CPUIncludes file in sources/Memory
CPU.hppIMemory.hpp
CPU.hppMemoryBus.hpp
+ + + + diff --git a/docs/html/dir_000010_000014.html b/docs/html/dir_000010_000014.html new file mode 100644 index 0000000..7ed2dde --- /dev/null +++ b/docs/html/dir_000010_000014.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/CPU -> Models Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

CPU → Models Relation

File in sources/CPUIncludes file in sources/Models
CPU.hppInts.hpp
+ + + + diff --git a/docs/html/dir_000011_000012.html b/docs/html/dir_000011_000012.html new file mode 100644 index 0000000..c29fc0e --- /dev/null +++ b/docs/html/dir_000011_000012.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/DSP -> Exceptions Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

DSP → Exceptions Relation

File in sources/DSPIncludes file in sources/Exceptions
DSP.cppInvalidAddress.hpp
+ + + + diff --git a/docs/html/dir_000011_000013.html b/docs/html/dir_000011_000013.html new file mode 100644 index 0000000..7179e1e --- /dev/null +++ b/docs/html/dir_000011_000013.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/DSP -> Memory Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

DSP → Memory Relation

File in sources/DSPIncludes file in sources/Memory
DSP.hppIMemory.hpp
+ + + + diff --git a/docs/html/dir_000013_000012.html b/docs/html/dir_000013_000012.html new file mode 100644 index 0000000..bf9f193 --- /dev/null +++ b/docs/html/dir_000013_000012.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/Memory -> Exceptions Relation + + + + + + + + + +
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ComSquare +
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Memory → Exceptions Relation

File in sources/MemoryIncludes file in sources/Exceptions
IRectangleMemory.cppInvalidAddress.hpp
+ + + + diff --git a/docs/html/dir_000013_000014.html b/docs/html/dir_000013_000014.html new file mode 100644 index 0000000..3dff93f --- /dev/null +++ b/docs/html/dir_000013_000014.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/Memory -> Models Relation + + + + + + + + + +
+
+ + + + + + +
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ComSquare +
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+
+ + + + + + + + +
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+ + +
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+
+

Memory → Models Relation

File in sources/MemoryIncludes file in sources/Models
IMemory.hppInts.hpp
+ + + + diff --git a/docs/html/dir_000015_000012.html b/docs/html/dir_000015_000012.html new file mode 100644 index 0000000..12745ed --- /dev/null +++ b/docs/html/dir_000015_000012.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/PPU -> Exceptions Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

PPU → Exceptions Relation

File in sources/PPUIncludes file in sources/Exceptions
PPU.cppInvalidAddress.hpp
PPU.cppNotImplementedException.hpp
+ + + + diff --git a/docs/html/dir_000015_000013.html b/docs/html/dir_000015_000013.html new file mode 100644 index 0000000..d002aa2 --- /dev/null +++ b/docs/html/dir_000015_000013.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/PPU -> Memory Relation + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

PPU → Memory Relation

File in sources/PPUIncludes file in sources/Memory
PPU.hppIMemory.hpp
+ + + + diff --git a/docs/html/dir_000016_000012.html b/docs/html/dir_000016_000012.html new file mode 100644 index 0000000..94bd07b --- /dev/null +++ b/docs/html/dir_000016_000012.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/Ram -> Exceptions Relation + + + + + + + + + +
+
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+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ + +
+
+

Ram → Exceptions Relation

File in sources/RamIncludes file in sources/Exceptions
Ram.cppInvalidAddress.hpp
+ + + + diff --git a/docs/html/dir_000016_000013.html b/docs/html/dir_000016_000013.html new file mode 100644 index 0000000..23fdc76 --- /dev/null +++ b/docs/html/dir_000016_000013.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: sources/Ram -> Memory Relation + + + + + + + + + +
+
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ComSquare +
+
+
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+
+ + +
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+
+

Ram → Memory Relation

File in sources/RamIncludes file in sources/Memory
Ram.hppIMemory.hpp
+ + + + diff --git a/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1.html b/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1.html new file mode 100644 index 0000000..160e2bd --- /dev/null +++ b/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1.html @@ -0,0 +1,102 @@ + + + + + + + +ComSquare: sources/DSP Directory Reference + + + + + + + + + +
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ComSquare +
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DSP Directory Reference
+
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+Directory dependency graph for DSP:
+
+
sources/DSP
+ + + + + + + + + +
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+Files

file  DSP.cpp
 
file  DSP.hpp [code]
 
+
+ + + + diff --git a/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.map b/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.map new file mode 100644 index 0000000..1a7cee4 --- /dev/null +++ b/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.map @@ -0,0 +1,9 @@ + + + + + + + + + diff --git a/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.md5 b/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.md5 new file mode 100644 index 0000000..ef0857f --- /dev/null +++ b/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.md5 @@ -0,0 +1 @@ +46b0329c343d4e2f996d3c9665a961e2 \ No newline at end of file diff --git a/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.png b/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.png new file mode 100644 index 0000000..191a786 Binary files /dev/null and b/docs/html/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.png differ diff --git a/docs/html/dir_08d237fc27d4ecd563f71c5d52f2fecc.html b/docs/html/dir_08d237fc27d4ecd563f71c5d52f2fecc.html new file mode 100644 index 0000000..005ef0f --- /dev/null +++ b/docs/html/dir_08d237fc27d4ecd563f71c5d52f2fecc.html @@ -0,0 +1,151 @@ + + + + + + + +ComSquare: sources Directory Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
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sources Directory Reference
+
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+Directory dependency graph for sources:
+
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sources
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
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+Directories

directory  APU
 
directory  Cartridge
 
directory  CPU
 
directory  DSP
 
directory  Exceptions
 
directory  Memory
 
directory  Models
 
directory  PPU
 
directory  Ram
 
directory  Renderer
 
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file  MemoryShadow.hpp [code]
 
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directory  CompilerIdCXX
 
+
+ + + + diff --git a/docs/html/doc.png b/docs/html/doc.png new file mode 100644 index 0000000..17edabf Binary files /dev/null and b/docs/html/doc.png differ diff --git a/docs/html/doxygen.css b/docs/html/doxygen.css new file mode 100644 index 0000000..73ecbb2 --- /dev/null +++ b/docs/html/doxygen.css @@ -0,0 +1,1771 @@ +/* The standard CSS for doxygen 1.8.17 */ + +body, table, div, p, dl { + font: 400 14px/22px Roboto,sans-serif; +} + +p.reference, p.definition { + font: 400 14px/22px Roboto,sans-serif; +} + +/* @group Heading Levels */ + +h1.groupheader { + font-size: 150%; +} + +.title { + font: 400 14px/28px Roboto,sans-serif; + font-size: 150%; + font-weight: bold; + margin: 10px 2px; +} + +h2.groupheader { + border-bottom: 1px solid #879ECB; + color: #354C7B; + font-size: 150%; + font-weight: normal; + margin-top: 1.75em; + padding-top: 8px; + padding-bottom: 4px; + width: 100%; +} + +h3.groupheader { + font-size: 100%; +} + +h1, h2, h3, h4, h5, h6 { + -webkit-transition: text-shadow 0.5s linear; + -moz-transition: text-shadow 0.5s linear; + -ms-transition: text-shadow 0.5s linear; + -o-transition: text-shadow 0.5s linear; + transition: text-shadow 0.5s linear; + margin-right: 15px; +} + +h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow { + text-shadow: 0 0 15px cyan; +} + +dt { + font-weight: bold; +} + +ul.multicol { + -moz-column-gap: 1em; + -webkit-column-gap: 1em; + column-gap: 1em; + -moz-column-count: 3; + -webkit-column-count: 3; + column-count: 3; +} + +p.startli, p.startdd { + margin-top: 2px; +} + +th p.starttd, p.intertd, p.endtd { + font-size: 100%; + font-weight: 700; +} + +p.starttd { + margin-top: 0px; +} + +p.endli { + margin-bottom: 0px; +} + +p.enddd { + margin-bottom: 4px; +} + +p.endtd { + margin-bottom: 2px; +} + +p.interli { +} + +p.interdd { +} + +p.intertd { +} + +/* @end */ + +caption { + font-weight: bold; +} + +span.legend { + font-size: 70%; + text-align: center; +} + +h3.version { + font-size: 90%; + text-align: center; +} + +div.qindex, div.navtab{ + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; +} + +div.qindex, div.navpath { + width: 100%; + line-height: 140%; +} + +div.navtab { + margin-right: 15px; +} + +/* @group Link Styling */ + +a { + color: #3D578C; + font-weight: normal; + text-decoration: none; +} + +.contents a:visited { + color: #4665A2; +} + +a:hover { + text-decoration: underline; +} + +a.qindex { + font-weight: bold; +} + +a.qindexHL { + font-weight: bold; + background-color: #9CAFD4; + color: #FFFFFF; + border: 1px double #869DCA; +} + +.contents a.qindexHL:visited { + color: #FFFFFF; +} + +a.el { + font-weight: bold; +} + +a.elRef { +} + +a.code, a.code:visited, a.line, a.line:visited { + color: #4665A2; +} + +a.codeRef, a.codeRef:visited, a.lineRef, a.lineRef:visited { + color: #4665A2; +} + +/* @end */ + +dl.el { + margin-left: -1cm; +} + +ul { + overflow: hidden; /*Fixed: list item bullets overlap floating elements*/ +} + +#side-nav ul { + overflow: visible; /* reset ul rule for scroll bar in GENERATE_TREEVIEW window */ +} + +#main-nav ul { + overflow: visible; /* reset ul rule for the navigation bar drop down lists */ +} + +.fragment { + text-align: left; + direction: ltr; + overflow-x: auto; /*Fixed: fragment lines overlap floating elements*/ + overflow-y: hidden; +} + +pre.fragment { + border: 1px solid #C4CFE5; + background-color: #FBFCFD; + padding: 4px 6px; + margin: 4px 8px 4px 2px; + overflow: auto; + word-wrap: break-word; + font-size: 9pt; + line-height: 125%; + font-family: monospace, fixed; + font-size: 105%; +} + +div.fragment { + padding: 0 0 1px 0; /*Fixed: last line underline overlap border*/ + margin: 4px 8px 4px 2px; + background-color: #FBFCFD; + border: 1px solid #C4CFE5; +} + +div.line { + font-family: monospace, fixed; + font-size: 13px; + min-height: 13px; + line-height: 1.0; + text-wrap: unrestricted; + white-space: -moz-pre-wrap; /* Moz */ + white-space: -pre-wrap; /* Opera 4-6 */ + white-space: -o-pre-wrap; /* Opera 7 */ + white-space: pre-wrap; /* CSS3 */ + word-wrap: break-word; /* IE 5.5+ */ + text-indent: -53px; + padding-left: 53px; + padding-bottom: 0px; + margin: 0px; + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +div.line:after { + content:"\000A"; + white-space: pre; +} + +div.line.glow { + background-color: cyan; + box-shadow: 0 0 10px cyan; +} + + +span.lineno { + padding-right: 4px; + text-align: right; + border-right: 2px solid #0F0; + background-color: #E8E8E8; + white-space: pre; +} +span.lineno a { + background-color: #D8D8D8; +} + +span.lineno a:hover { + background-color: #C8C8C8; +} + +.lineno { + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +div.ah, span.ah { + background-color: black; + font-weight: bold; + color: #FFFFFF; + margin-bottom: 3px; + margin-top: 3px; + padding: 0.2em; + border: solid thin #333; + border-radius: 0.5em; + -webkit-border-radius: .5em; + -moz-border-radius: .5em; + box-shadow: 2px 2px 3px #999; + -webkit-box-shadow: 2px 2px 3px #999; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444)); + background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000 110%); +} + +div.classindex ul { + list-style: none; + padding-left: 0; +} + +div.classindex span.ai { + display: inline-block; +} + +div.groupHeader { + margin-left: 16px; + margin-top: 12px; + font-weight: bold; +} + +div.groupText { + margin-left: 16px; + font-style: italic; +} + +body { + background-color: white; + color: black; + margin: 0; +} + +div.contents { + margin-top: 10px; + margin-left: 12px; + margin-right: 8px; +} + +td.indexkey { + background-color: #EBEFF6; + font-weight: bold; + border: 1px solid #C4CFE5; + margin: 2px 0px 2px 0; + padding: 2px 10px; + white-space: nowrap; + vertical-align: top; +} + +td.indexvalue { + background-color: #EBEFF6; + border: 1px solid #C4CFE5; + padding: 2px 10px; + margin: 2px 0px; +} + +tr.memlist { + background-color: #EEF1F7; +} + +p.formulaDsp { + text-align: center; +} + +img.formulaDsp { + +} + +img.formulaInl, img.inline { + vertical-align: middle; +} + +div.center { + text-align: center; + margin-top: 0px; + margin-bottom: 0px; + padding: 0px; +} + +div.center img { + border: 0px; +} + +address.footer { + text-align: right; + padding-right: 12px; +} + +img.footer { + border: 0px; + vertical-align: middle; +} + +/* @group Code Colorization */ + +span.keyword { + color: #008000 +} + +span.keywordtype { + color: #604020 +} + +span.keywordflow { + color: #e08000 +} + +span.comment { + color: #800000 +} + +span.preprocessor { + color: #806020 +} + +span.stringliteral { + color: #002080 +} + +span.charliteral { + color: #008080 +} + +span.vhdldigit { + color: #ff00ff +} + +span.vhdlchar { + color: #000000 +} + +span.vhdlkeyword { + color: #700070 +} + +span.vhdllogic { + color: #ff0000 +} + +blockquote { + background-color: #F7F8FB; + border-left: 2px solid #9CAFD4; + margin: 0 24px 0 4px; + padding: 0 12px 0 16px; +} + +blockquote.DocNodeRTL { + border-left: 0; + border-right: 2px solid #9CAFD4; + margin: 0 4px 0 24px; + padding: 0 16px 0 12px; +} + +/* @end */ + +/* +.search { + color: #003399; + font-weight: bold; +} + +form.search { + margin-bottom: 0px; + margin-top: 0px; +} + +input.search { + font-size: 75%; + color: #000080; + font-weight: normal; + background-color: #e8eef2; +} +*/ + +td.tiny { + font-size: 75%; +} + +.dirtab { + padding: 4px; + border-collapse: collapse; + border: 1px solid #A3B4D7; +} + +th.dirtab { + background: #EBEFF6; + font-weight: bold; +} + +hr { + height: 0px; + border: none; + border-top: 1px solid #4A6AAA; +} + +hr.footer { + height: 1px; +} + +/* @group Member Descriptions */ + +table.memberdecls { + border-spacing: 0px; + padding: 0px; +} + +.memberdecls td, .fieldtable tr { + -webkit-transition-property: background-color, box-shadow; + -webkit-transition-duration: 0.5s; + -moz-transition-property: background-color, box-shadow; + -moz-transition-duration: 0.5s; + -ms-transition-property: background-color, box-shadow; + -ms-transition-duration: 0.5s; + -o-transition-property: background-color, box-shadow; + -o-transition-duration: 0.5s; + transition-property: background-color, box-shadow; + transition-duration: 0.5s; +} + +.memberdecls td.glow, .fieldtable tr.glow { + background-color: cyan; + box-shadow: 0 0 15px cyan; +} + +.mdescLeft, .mdescRight, +.memItemLeft, .memItemRight, +.memTemplItemLeft, .memTemplItemRight, .memTemplParams { + background-color: #F9FAFC; + border: none; + margin: 4px; + padding: 1px 0 0 8px; +} + +.mdescLeft, .mdescRight { + padding: 0px 8px 4px 8px; + color: #555; +} + +.memSeparator { + border-bottom: 1px solid #DEE4F0; + line-height: 1px; + margin: 0px; + padding: 0px; +} + +.memItemLeft, .memTemplItemLeft { + white-space: nowrap; +} + +.memItemRight, .memTemplItemRight { + width: 100%; +} + +.memTemplParams { + color: #4665A2; + white-space: nowrap; + font-size: 80%; +} + +/* @end */ + +/* @group Member Details */ + +/* Styles for detailed member documentation */ + +.memtitle { + padding: 8px; + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + border-top-right-radius: 4px; + border-top-left-radius: 4px; + margin-bottom: -1px; + background-image: url('nav_f.png'); + background-repeat: repeat-x; + background-color: #E2E8F2; + line-height: 1.25; + font-weight: 300; + float:left; +} + +.permalink +{ + font-size: 65%; + display: inline-block; + vertical-align: middle; +} + +.memtemplate { + font-size: 80%; + color: #4665A2; + font-weight: normal; + margin-left: 9px; +} + +.memnav { + background-color: #EBEFF6; + border: 1px solid #A3B4D7; + text-align: center; + margin: 2px; + margin-right: 15px; + padding: 2px; +} + +.mempage { + width: 100%; +} + +.memitem { + padding: 0; + margin-bottom: 10px; + margin-right: 5px; + -webkit-transition: box-shadow 0.5s linear; + -moz-transition: box-shadow 0.5s linear; + -ms-transition: box-shadow 0.5s linear; + -o-transition: box-shadow 0.5s linear; + transition: box-shadow 0.5s linear; + display: table !important; + width: 100%; +} + +.memitem.glow { + box-shadow: 0 0 15px cyan; +} + +.memname { + font-weight: 400; + margin-left: 6px; +} + +.memname td { + vertical-align: bottom; +} + +.memproto, dl.reflist dt { + border-top: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 0px 6px 0px; + color: #253555; + font-weight: bold; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + background-color: #DFE5F1; + /* opera specific markup */ + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + border-top-right-radius: 4px; + /* firefox specific markup */ + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + -moz-border-radius-topright: 4px; + /* webkit specific markup */ + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + -webkit-border-top-right-radius: 4px; + +} + +.overload { + font-family: "courier new",courier,monospace; + font-size: 65%; +} + +.memdoc, dl.reflist dd { + border-bottom: 1px solid #A8B8D9; + border-left: 1px solid #A8B8D9; + border-right: 1px solid #A8B8D9; + padding: 6px 10px 2px 10px; + background-color: #FBFCFD; + border-top-width: 0; + background-image:url('nav_g.png'); + background-repeat:repeat-x; + background-color: #FFFFFF; + /* opera specific markup */ + border-bottom-left-radius: 4px; + border-bottom-right-radius: 4px; + box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); + /* firefox specific markup */ + -moz-border-radius-bottomleft: 4px; + -moz-border-radius-bottomright: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px; + /* webkit specific markup */ + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +dl.reflist dt { + padding: 5px; +} + +dl.reflist dd { + margin: 0px 0px 10px 0px; + padding: 5px; +} + +.paramkey { + text-align: right; +} + +.paramtype { + white-space: nowrap; +} + +.paramname { + color: #602020; + white-space: nowrap; +} +.paramname em { + font-style: normal; +} +.paramname code { + line-height: 14px; +} + +.params, .retval, .exception, .tparams { + margin-left: 0px; + padding-left: 0px; +} + +.params .paramname, .retval .paramname, .tparams .paramname, .exception .paramname { + font-weight: bold; + vertical-align: top; +} + +.params .paramtype, .tparams .paramtype { + font-style: italic; + vertical-align: top; +} + +.params .paramdir, .tparams .paramdir { + font-family: "courier new",courier,monospace; + vertical-align: top; +} + +table.mlabels { + border-spacing: 0px; +} + +td.mlabels-left { + width: 100%; + padding: 0px; +} + +td.mlabels-right { + vertical-align: bottom; + padding: 0px; + white-space: nowrap; +} + +span.mlabels { + margin-left: 8px; +} + +span.mlabel { + background-color: #728DC1; + border-top:1px solid #5373B4; + border-left:1px solid #5373B4; + border-right:1px solid #C4CFE5; + border-bottom:1px solid #C4CFE5; + text-shadow: none; + color: white; + margin-right: 4px; + padding: 2px 3px; + border-radius: 3px; + font-size: 7pt; + white-space: nowrap; + vertical-align: middle; +} + + + +/* @end */ + +/* these are for tree view inside a (index) page */ + +div.directory { + margin: 10px 0px; + border-top: 1px solid #9CAFD4; + border-bottom: 1px solid #9CAFD4; + width: 100%; +} + +.directory table { + border-collapse:collapse; +} + +.directory td { + margin: 0px; + padding: 0px; + vertical-align: top; +} + +.directory td.entry { + white-space: nowrap; + padding-right: 6px; + padding-top: 3px; +} + +.directory td.entry a { + outline:none; +} + +.directory td.entry a img { + border: none; +} + +.directory td.desc { + width: 100%; + padding-left: 6px; + padding-right: 6px; + padding-top: 3px; + border-left: 1px solid rgba(0,0,0,0.05); +} + +.directory tr.even { + padding-left: 6px; + background-color: #F7F8FB; +} + +.directory img { + vertical-align: -30%; +} + +.directory .levels { + white-space: nowrap; + width: 100%; + text-align: right; + font-size: 9pt; +} + +.directory .levels span { + cursor: pointer; + padding-left: 2px; + padding-right: 2px; + color: #3D578C; +} + +.arrow { + color: #9CAFD4; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; + cursor: pointer; + font-size: 80%; + display: inline-block; + width: 16px; + height: 22px; +} + +.icon { + font-family: Arial, Helvetica; + font-weight: bold; + font-size: 12px; + height: 14px; + width: 16px; + display: inline-block; + background-color: #728DC1; + color: white; + text-align: center; + border-radius: 4px; + margin-left: 2px; + margin-right: 2px; +} + +.icona { + width: 24px; + height: 22px; + display: inline-block; +} + +.iconfopen { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('folderopen.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +.iconfclosed { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('folderclosed.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +.icondoc { + width: 24px; + height: 18px; + margin-bottom: 4px; + background-image:url('doc.png'); + background-position: 0px -4px; + background-repeat: repeat-y; + vertical-align:top; + display: inline-block; +} + +table.directory { + font: 400 14px Roboto,sans-serif; +} + +/* @end */ + +div.dynheader { + margin-top: 8px; + -webkit-touch-callout: none; + -webkit-user-select: none; + -khtml-user-select: none; + -moz-user-select: none; + -ms-user-select: none; + user-select: none; +} + +address { + font-style: normal; + color: #2A3D61; +} + +table.doxtable caption { + caption-side: top; +} + +table.doxtable { + border-collapse:collapse; + margin-top: 4px; + margin-bottom: 4px; +} + +table.doxtable td, table.doxtable th { + border: 1px solid #2D4068; + padding: 3px 7px 2px; +} + +table.doxtable th { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +table.fieldtable { + /*width: 100%;*/ + margin-bottom: 10px; + border: 1px solid #A8B8D9; + border-spacing: 0px; + -moz-border-radius: 4px; + -webkit-border-radius: 4px; + border-radius: 4px; + -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px; + -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); + box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15); +} + +.fieldtable td, .fieldtable th { + padding: 3px 7px 2px; +} + +.fieldtable td.fieldtype, .fieldtable td.fieldname { + white-space: nowrap; + border-right: 1px solid #A8B8D9; + border-bottom: 1px solid #A8B8D9; + vertical-align: top; +} + +.fieldtable td.fieldname { + padding-top: 3px; +} + +.fieldtable td.fielddoc { + border-bottom: 1px solid #A8B8D9; + /*width: 100%;*/ +} + +.fieldtable td.fielddoc p:first-child { + margin-top: 0px; +} + +.fieldtable td.fielddoc p:last-child { + margin-bottom: 2px; +} + +.fieldtable tr:last-child td { + border-bottom: none; +} + +.fieldtable th { + background-image:url('nav_f.png'); + background-repeat:repeat-x; + background-color: #E2E8F2; + font-size: 90%; + color: #253555; + padding-bottom: 4px; + padding-top: 5px; + text-align:left; + font-weight: 400; + -moz-border-radius-topleft: 4px; + -moz-border-radius-topright: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + border-top-left-radius: 4px; + border-top-right-radius: 4px; + border-bottom: 1px solid #A8B8D9; +} + + +.tabsearch { + top: 0px; + left: 10px; + height: 36px; + background-image: url('tab_b.png'); + z-index: 101; + overflow: hidden; + font-size: 13px; +} + +.navpath ul +{ + font-size: 11px; + background-image:url('tab_b.png'); + background-repeat:repeat-x; + background-position: 0 -5px; + height:30px; + line-height:30px; + color:#8AA0CC; + border:solid 1px #C2CDE4; + overflow:hidden; + margin:0px; + padding:0px; +} + +.navpath li +{ + list-style-type:none; + float:left; + padding-left:10px; + padding-right:15px; + background-image:url('bc_s.png'); + background-repeat:no-repeat; + background-position:right; + color:#364D7C; +} + +.navpath li.navelem a +{ + height:32px; + display:block; + text-decoration: none; + outline: none; + color: #283A5D; + font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif; + text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9); + text-decoration: none; +} + +.navpath li.navelem a:hover +{ + color:#6884BD; +} + +.navpath li.footer +{ + list-style-type:none; + float:right; + padding-left:10px; + padding-right:15px; + background-image:none; + background-repeat:no-repeat; + background-position:right; + color:#364D7C; + font-size: 8pt; +} + + +div.summary +{ + float: right; + font-size: 8pt; + padding-right: 5px; + width: 50%; + text-align: right; +} + +div.summary a +{ + white-space: nowrap; +} + +table.classindex +{ + margin: 10px; + white-space: nowrap; + margin-left: 3%; + margin-right: 3%; + width: 94%; + border: 0; + border-spacing: 0; + padding: 0; +} + +div.ingroups +{ + font-size: 8pt; + width: 50%; + text-align: left; +} + +div.ingroups a +{ + white-space: nowrap; +} + +div.header +{ + background-image:url('nav_h.png'); + background-repeat:repeat-x; + background-color: #F9FAFC; + margin: 0px; + border-bottom: 1px solid #C4CFE5; +} + +div.headertitle +{ + padding: 5px 5px 5px 10px; +} + +.PageDocRTL-title div.headertitle { + text-align: right; + direction: rtl; +} + +dl { + padding: 0 0 0 0; +} + +/* dl.note, dl.warning, dl.attention, dl.pre, dl.post, dl.invariant, dl.deprecated, dl.todo, dl.test, dl.bug, dl.examples */ +dl.section { + margin-left: 0px; + padding-left: 0px; +} + +dl.section.DocNodeRTL { + margin-right: 0px; + padding-right: 0px; +} + +dl.note { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #D0C000; +} + +dl.note.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; + padding-right: 3px; + border-right: 4px solid; + border-color: #D0C000; +} + +dl.warning, dl.attention { + margin-left: -7px; + padding-left: 3px; + border-left: 4px solid; + border-color: #FF0000; +} + +dl.warning.DocNodeRTL, dl.attention.DocNodeRTL { + margin-left: 0; + padding-left: 0; + border-left: 0; + margin-right: -7px; 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+ padding: 3px 7px 2px; +} + +table.markdownTable tr { +} + +th.markdownTableHeadLeft, th.markdownTableHeadRight, th.markdownTableHeadCenter, th.markdownTableHeadNone { + background-color: #374F7F; + color: #FFFFFF; + font-size: 110%; + padding-bottom: 4px; + padding-top: 5px; +} + +th.markdownTableHeadLeft, td.markdownTableBodyLeft { + text-align: left +} + +th.markdownTableHeadRight, td.markdownTableBodyRight { + text-align: right +} + +th.markdownTableHeadCenter, td.markdownTableBodyCenter { + text-align: center +} + +.DocNodeRTL { + text-align: right; + direction: rtl; +} + +.DocNodeLTR { + text-align: left; + direction: ltr; +} + +table.DocNodeRTL { + width: auto; + margin-right: 0; + margin-left: auto; +} + +table.DocNodeLTR { + width: auto; + margin-right: auto; + margin-left: 0; +} + +tt, code, kbd, samp +{ + display: inline-block; + direction:ltr; +} +/* @end */ + +u { + text-decoration: underline; +} + diff --git a/docs/html/doxygen.png b/docs/html/doxygen.png new file mode 100644 index 0000000..3ff17d8 Binary files /dev/null and b/docs/html/doxygen.png differ diff --git a/docs/html/dynsections.js b/docs/html/dynsections.js new file mode 100644 index 0000000..ea0a7b3 --- /dev/null +++ b/docs/html/dynsections.js @@ -0,0 +1,120 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; 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Graph Legend
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This page explains how to interpret the graphs that are generated by doxygen.

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Consider the following example:

/*! Invisible class because of truncation */
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class Invisible { };
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/*! Truncated class, inheritance relation is hidden */
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class Truncated : public Invisible { };
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/* Class not documented with doxygen comments */
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class Undocumented { };
+
+
/*! Class that is inherited using public inheritance */
+
class PublicBase : public Truncated { };
+
+
/*! A template class */
+
template<class T> class Templ { };
+
+
/*! Class that is inherited using protected inheritance */
+
class ProtectedBase { };
+
+
/*! Class that is inherited using private inheritance */
+
class PrivateBase { };
+
+
/*! Class that is used by the Inherited class */
+
class Used { };
+
+
/*! Super class that inherits a number of other classes */
+
class Inherited : public PublicBase,
+
protected ProtectedBase,
+
private PrivateBase,
+
public Undocumented,
+
public Templ<int>
+
{
+
private:
+
Used *m_usedClass;
+
};
+

This will result in the following graph:

+

The boxes in the above graph have the following meaning:

+ +

The arrows have the following meaning:

+ +
+ + + + diff --git a/docs/html/graph_legend.md5 b/docs/html/graph_legend.md5 new file mode 100644 index 0000000..8fcdccd --- /dev/null +++ b/docs/html/graph_legend.md5 @@ -0,0 +1 @@ +f51bf6e9a10430aafef59831b08dcbfe \ No newline at end of file diff --git a/docs/html/graph_legend.png b/docs/html/graph_legend.png new file mode 100644 index 0000000..c3cac43 Binary files /dev/null and b/docs/html/graph_legend.png differ diff --git a/docs/html/hierarchy.html b/docs/html/hierarchy.html new file mode 100644 index 0000000..4c412c8 --- /dev/null +++ b/docs/html/hierarchy.html @@ -0,0 +1,109 @@ + + + + + + + +ComSquare: Class Hierarchy + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
Class Hierarchy
+
+
+
+

Go to the graphical class hierarchy

+This inheritance list is sorted roughly, but not completely, alphabetically:
+
[detail level 123]
+ + + + + + + + + + + + + + + + + + + + + + + + + + + +
 Cexception
 CComSquare::InvalidActionException thrown when someone tries to load an invalid rom
 CComSquare::InvalidAddressException thrown when trying to read/write to an invalid address
 CComSquare::InvalidRomExceptionException thrown when someone tries to load an invalid rom
 CComSquare::NotImplementedExceptionWhen this is thrown, it means that we should work more
 CComSquare::Cartridge::Header
 CComSquare::Memory::IMemoryCommon interface implemented by all components mapping memory
 CComSquare::APU::APU
 CComSquare::APU::DSP::DSP
 CComSquare::CPU::CPUThe main CPU
 CComSquare::Memory::IRectangleMemorySuperset of the IMemory to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at FFFF)
 CComSquare::Cartridge::CartridgeContains the rom's memory/instructions
 CComSquare::Memory::MemoryShadow
 CComSquare::PPU::PPUThe struct containing all the registers the PPU
 CComSquare::Ram::Ram
 CComSquare::APU::InternalRegisters
 CComSquare::CPU::InternalRegistersStruct containing internal registers of the CPU
 CComSquare::Cartridge::InterruptVectors
 CComSquare::Renderer::IRenderer
 CComSquare::Renderer::SFRenderer
 CComSquare::Memory::MemoryBusThe memory bus is the component responsible of mapping addresses to components address and transmitting the data
 CComSquare::CPU::Registers::pThe Processor status register;
 CComSquare::APU::InternalRegisters::pswProgram Status Word register
 CComSquare::APU::DSP::RegistersAll the registers of the DSP
 CComSquare::APU::Registers
 CComSquare::CPU::RegistersStruct containing registers for the main CPU
 CComSquare::SNESContainer of all the components of the SNES
+
+
+ + + + diff --git a/docs/html/index.html b/docs/html/index.html new file mode 100644 index 0000000..4f86560 --- /dev/null +++ b/docs/html/index.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: Main Page + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
ComSquare Documentation
+
+
+
+ + + + diff --git a/docs/html/inherit_graph_0.map b/docs/html/inherit_graph_0.map new file mode 100644 index 0000000..ee71525 --- /dev/null +++ b/docs/html/inherit_graph_0.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/inherit_graph_0.md5 b/docs/html/inherit_graph_0.md5 new file mode 100644 index 0000000..6015c4c --- /dev/null +++ b/docs/html/inherit_graph_0.md5 @@ -0,0 +1 @@ +50c725d19e37bcf491319ed4a6dd9780 \ No newline at end of file diff --git a/docs/html/inherit_graph_0.png b/docs/html/inherit_graph_0.png new file mode 100644 index 0000000..8a78af4 Binary files /dev/null and b/docs/html/inherit_graph_0.png differ diff --git a/docs/html/inherit_graph_1.map b/docs/html/inherit_graph_1.map new file mode 100644 index 0000000..4db1319 --- /dev/null +++ b/docs/html/inherit_graph_1.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/inherit_graph_1.md5 b/docs/html/inherit_graph_1.md5 new file mode 100644 index 0000000..638849f --- /dev/null +++ b/docs/html/inherit_graph_1.md5 @@ -0,0 +1 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Class Hierarchy + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + +
+ +
+
+ + +
+ +
+ +
+
+
Class Hierarchy
+
+
+ + + + + + + + + + + + + + + +
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+ + + + diff --git a/docs/html/jquery.js b/docs/html/jquery.js new file mode 100644 index 0000000..103c32d --- /dev/null +++ b/docs/html/jquery.js @@ -0,0 +1,35 @@ +/*! jQuery v3.4.1 | (c) JS Foundation and other contributors | jquery.org/license */ +!function(e,t){"use strict";"object"==typeof module&&"object"==typeof module.exports?module.exports=e.document?t(e,!0):function(e){if(!e.document)throw new Error("jQuery requires a window with a document");return t(e)}:t(e)}("undefined"!=typeof window?window:this,function(C,e){"use strict";var t=[],E=C.document,r=Object.getPrototypeOf,s=t.slice,g=t.concat,u=t.push,i=t.indexOf,n={},o=n.toString,v=n.hasOwnProperty,a=v.toString,l=a.call(Object),y={},m=function(e){return"function"==typeof e&&"number"!=typeof e.nodeType},x=function(e){return null!=e&&e===e.window},c={type:!0,src:!0,nonce:!0,noModule:!0};function b(e,t,n){var r,i,o=(n=n||E).createElement("script");if(o.text=e,t)for(r in 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i=e.data("ui-form-reset-instances");t.each(i,function(){this.refresh()})})},_bindFormResetHandler:function(){if(this.form=this.element.form(),this.form.length){var t=this.form.data("ui-form-reset-instances")||[];t.length||this.form.on("reset.ui-form-reset",this._formResetHandler),t.push(this),this.form.data("ui-form-reset-instances",t)}},_unbindFormResetHandler:function(){if(this.form.length){var e=this.form.data("ui-form-reset-instances");e.splice(t.inArray(this,e),1),e.length?this.form.data("ui-form-reset-instances",e):this.form.removeData("ui-form-reset-instances").off("reset.ui-form-reset")}}},"1.7"===t.fn.jquery.substring(0,3)&&(t.each(["Width","Height"],function(e,i){function s(e,i,s,o){return t.each(n,function(){i-=parseFloat(t.css(e,"padding"+this))||0,s&&(i-=parseFloat(t.css(e,"border"+this+"Width"))||0),o&&(i-=parseFloat(t.css(e,"margin"+this))||0)}),i}var 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$.SmartMenus(this,$.extend({},$.fn.smartmenus.defaults,options,dataOpts))})},$.fn.smartmenus.defaults={isPopup:!1,mainMenuSubOffsetX:0,mainMenuSubOffsetY:0,subMenusSubOffsetX:0,subMenusSubOffsetY:0,subMenusMinWidth:"10em",subMenusMaxWidth:"20em",subIndicators:!0,subIndicatorsPos:"append",subIndicatorsText:"",scrollStep:30,scrollAccelerate:!0,showTimeout:250,hideTimeout:500,showDuration:0,showFunction:null,hideDuration:0,hideFunction:function(t,e){t.fadeOut(200,e)},collapsibleShowDuration:0,collapsibleShowFunction:function(t,e){t.slideDown(200,e)},collapsibleHideDuration:0,collapsibleHideFunction:function(t,e){t.slideUp(200,e)},showOnClick:!1,hideOnClick:!0,noMouseOver:!1,keepInViewport:!0,keepHighlighted:!0,markCurrentItem:!1,markCurrentTree:!0,rightToLeftSubMenus:!1,bottomToTopSubMenus:!1,collapsibleBehavior:"default"},$}); \ No newline at end of file diff --git a/docs/html/main_8cpp.html b/docs/html/main_8cpp.html new file mode 100644 index 0000000..941b084 --- /dev/null +++ b/docs/html/main_8cpp.html @@ -0,0 +1,143 @@ + + + + + + + +ComSquare: main.cpp File Reference + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ +
+
+ +
+
main.cpp File Reference
+
+
+
#include <iostream>
+#include <string>
+#include "sources/SNES.hpp"
+
+Include dependency graph for main.cpp:
+
+
+ + + + + + + + + + + + + + + + + + + + + + +
+
+ + + +

+Functions

int main (int argc, char **argv)
 
+

Function Documentation

+ +

◆ main()

+ +
+
+ + + + + + + + + + + + + + + + + + +
int main (int argc,
char ** argv 
)
+
+ +
+
+
+ + + + diff --git a/docs/html/main_8cpp__incl.map b/docs/html/main_8cpp__incl.map new file mode 100644 index 0000000..ba3b89a --- /dev/null +++ b/docs/html/main_8cpp__incl.map @@ -0,0 +1,22 @@ + + + + + + + + + + + + + + + + + + + + + + diff --git a/docs/html/main_8cpp__incl.md5 b/docs/html/main_8cpp__incl.md5 new file mode 100644 index 0000000..308026e --- /dev/null +++ b/docs/html/main_8cpp__incl.md5 @@ -0,0 +1 @@ +d51ad234341b42bc7b938d881ebe2fa5 \ No newline at end of file diff --git a/docs/html/main_8cpp__incl.png b/docs/html/main_8cpp__incl.png new file mode 100644 index 0000000..b88228b Binary files /dev/null and b/docs/html/main_8cpp__incl.png differ diff --git a/docs/html/md_README.html b/docs/html/md_README.html new file mode 100644 index 0000000..d10fad2 --- /dev/null +++ b/docs/html/md_README.html @@ -0,0 +1,95 @@ + + + + + + + +ComSquare: README + + + + + + + + + +
+
+ + + + + + +
+
ComSquare +
+
+
+ + + + + + + + +
+
+ + +
+ +
+ +
+
+
+
README
+
+
+

+

+

+

License Issues Artifact Testing CodeCov

+

Com² is a SNES emulator for Linux built in C++ by 3 friends.

+
+

+Installation

+

You can use an artifact from latest commit by selecting ✔️ and Build commit artifact. You will have an option, if the commit is correct, to download the artifact which you have to unzip.

+

Overwhise, you can build yourself the program by cloning the repository : git clone https://github.com/AnonymusRaccoon/ComSquare.git

+

You need the SFML library.

+

After going inside the repository directory, create a build folder mkdir build, go inside and make cmake .. to finally make make. If you've done nothing wrong, you should have the program compiled!

+

+Informations

+

During the development we will update and create documentations about the SNES and the emulator, we will use GitHub Projects page and GitHub Wiki to inform you about "everything".

+

+Licence

+

As seen on the badge, we use GPLv3 license, so you're free to use, fork and modify our program freely, we are 100% Open Source!

+
+
+ + + + diff --git a/docs/html/menu.js b/docs/html/menu.js new file mode 100644 index 0000000..433c15b --- /dev/null +++ b/docs/html/menu.js @@ -0,0 +1,50 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function initMenu(relPath,searchEnabled,serverSide,searchPage,search) { + function makeTree(data,relPath) { + var result=''; + if ('children' in data) { + result+=''; + } + return result; + } + + $('#main-nav').append(makeTree(menudata,relPath)); + $('#main-nav').children(':first').addClass('sm sm-dox').attr('id','main-menu'); + if (searchEnabled) { + if (serverSide) { + $('#main-menu').append('
  • '); + } else { + $('#main-menu').append('
  • '); + } + } + $('#main-menu').smartmenus(); +} +/* @license-end */ diff --git a/docs/html/menudata.js b/docs/html/menudata.js new file mode 100644 index 0000000..5bff207 --- /dev/null +++ b/docs/html/menudata.js @@ -0,0 +1,133 @@ +/* +@licstart The following is the entire license notice for the +JavaScript code in this file. + +Copyright (C) 1997-2019 by Dimitri van Heesch + +This program is free software; you can redistribute it and/or modify +it under the terms of version 2 of the GNU General Public License as published by +the Free Software Foundation + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + +@licend The above is the entire license notice +for the JavaScript code in this file +*/ +var menudata={children:[ +{text:"Main Page",url:"index.html"}, +{text:"Related Pages",url:"pages.html"}, +{text:"Namespaces",url:"namespaces.html",children:[ +{text:"Namespace List",url:"namespaces.html"}, +{text:"Namespace Members",url:"namespacemembers.html",children:[ +{text:"All",url:"namespacemembers.html"}, +{text:"Enumerations",url:"namespacemembers_enum.html"}, +{text:"Enumerator",url:"namespacemembers_eval.html"}]}]}, +{text:"Classes",url:"annotated.html",children:[ +{text:"Class List",url:"annotated.html"}, +{text:"Class Index",url:"classes.html"}, +{text:"Class Hierarchy",url:"inherits.html"}, +{text:"Class Members",url:"functions.html",children:[ +{text:"All",url:"functions.html",children:[ +{text:"_",url:"functions.html#index__5F"}, +{text:"a",url:"functions_a.html#index_a"}, +{text:"b",url:"functions_b.html#index_b"}, +{text:"c",url:"functions_c.html#index_c"}, +{text:"d",url:"functions_d.html#index_d"}, +{text:"e",url:"functions_e.html#index_e"}, +{text:"f",url:"functions_f.html#index_f"}, +{text:"g",url:"functions_g.html#index_g"}, +{text:"h",url:"functions_h.html#index_h"}, +{text:"i",url:"functions_i.html#index_i"}, +{text:"j",url:"functions_j.html#index_j"}, +{text:"k",url:"functions_k.html#index_k"}, +{text:"m",url:"functions_m.html#index_m"}, +{text:"n",url:"functions_n.html#index_n"}, +{text:"o",url:"functions_o.html#index_o"}, +{text:"p",url:"functions_p.html#index_p"}, +{text:"r",url:"functions_r.html#index_r"}, +{text:"s",url:"functions_s.html#index_s"}, +{text:"t",url:"functions_t.html#index_t"}, +{text:"u",url:"functions_u.html#index_u"}, +{text:"v",url:"functions_v.html#index_v"}, +{text:"w",url:"functions_w.html#index_w"}, +{text:"x",url:"functions_x.html#index_x"}, +{text:"y",url:"functions_y.html#index_y"}, +{text:"z",url:"functions_z.html#index_z"}, +{text:"~",url:"functions_~.html#index__7E"}]}, +{text:"Functions",url:"functions_func.html",children:[ +{text:"_",url:"functions_func.html#index__5F"}, +{text:"a",url:"functions_func.html#index_a"}, +{text:"c",url:"functions_func.html#index_c"}, +{text:"d",url:"functions_func.html#index_d"}, +{text:"e",url:"functions_func.html#index_e"}, +{text:"g",url:"functions_func.html#index_g"}, +{text:"h",url:"functions_func.html#index_h"}, +{text:"i",url:"functions_func.html#index_i"}, +{text:"m",url:"functions_func.html#index_m"}, +{text:"n",url:"functions_func.html#index_n"}, +{text:"p",url:"functions_func.html#index_p"}, +{text:"r",url:"functions_func.html#index_r"}, +{text:"s",url:"functions_func.html#index_s"}, +{text:"u",url:"functions_func.html#index_u"}, +{text:"w",url:"functions_func.html#index_w"}, +{text:"~",url:"functions_func.html#index__7E"}]}, +{text:"Variables",url:"functions_vars.html",children:[ +{text:"_",url:"functions_vars.html#index__5F"}, +{text:"a",url:"functions_vars_a.html#index_a"}, +{text:"b",url:"functions_vars_b.html#index_b"}, +{text:"c",url:"functions_vars_c.html#index_c"}, +{text:"d",url:"functions_vars_d.html#index_d"}, +{text:"e",url:"functions_vars_e.html#index_e"}, +{text:"f",url:"functions_vars_f.html#index_f"}, +{text:"g",url:"functions_vars_g.html#index_g"}, +{text:"h",url:"functions_vars_h.html#index_h"}, +{text:"i",url:"functions_vars_i.html#index_i"}, +{text:"j",url:"functions_vars_j.html#index_j"}, +{text:"k",url:"functions_vars_k.html#index_k"}, +{text:"m",url:"functions_vars_m.html#index_m"}, +{text:"n",url:"functions_vars_n.html#index_n"}, +{text:"o",url:"functions_vars_o.html#index_o"}, +{text:"p",url:"functions_vars_p.html#index_p"}, +{text:"r",url:"functions_vars_r.html#index_r"}, +{text:"s",url:"functions_vars_s.html#index_s"}, +{text:"t",url:"functions_vars_t.html#index_t"}, +{text:"u",url:"functions_vars_u.html#index_u"}, +{text:"v",url:"functions_vars_v.html#index_v"}, +{text:"w",url:"functions_vars_w.html#index_w"}, +{text:"x",url:"functions_vars_x.html#index_x"}, +{text:"y",url:"functions_vars_y.html#index_y"}, +{text:"z",url:"functions_vars_z.html#index_z"}]}]}]}, +{text:"Files",url:"files.html",children:[ +{text:"File List",url:"files.html"}, +{text:"File Members",url:"globals.html",children:[ +{text:"All",url:"globals.html",children:[ +{text:"_",url:"globals.html#index__5F"}, +{text:"a",url:"globals.html#index_a"}, +{text:"b",url:"globals.html#index_b"}, +{text:"c",url:"globals.html#index_c"}, +{text:"d",url:"globals.html#index_d"}, +{text:"f",url:"globals.html#index_f"}, +{text:"g",url:"globals.html#index_g"}, +{text:"h",url:"globals.html#index_h"}, +{text:"i",url:"globals.html#index_i"}, +{text:"m",url:"globals.html#index_m"}, +{text:"p",url:"globals.html#index_p"}, +{text:"s",url:"globals.html#index_s"}, +{text:"u",url:"globals.html#index_u"}]}, +{text:"Functions",url:"globals_func.html"}, +{text:"Variables",url:"globals_vars.html",children:[ +{text:"_",url:"globals_vars.html#index__5F"}, +{text:"b",url:"globals_vars.html#index_b"}, +{text:"c",url:"globals_vars.html#index_c"}, +{text:"f",url:"globals_vars.html#index_f"}, +{text:"g",url:"globals_vars.html#index_g"}, +{text:"i",url:"globals_vars.html#index_i"}]}, +{text:"Typedefs",url:"globals_type.html"}, +{text:"Macros",url:"globals_defs.html"}]}]}]} diff --git a/docs/html/namespaceComSquare.html b/docs/html/namespaceComSquare.html new file mode 100644 index 0000000..66f2a32 --- /dev/null +++ b/docs/html/namespaceComSquare.html @@ -0,0 +1,115 @@ + + + + + + + +ComSquare: ComSquare Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + +
    +
    + +
    +
    ComSquare Namespace Reference
    +
    +
    + + + + + + + + + + + + + + + + +

    +Namespaces

     APU
     
     Cartridge
     
     CPU
     
     Memory
     
     PPU
     
     Ram
     
     Renderer
     
    + + + + + + + + + + + + + + + + +

    +Classes

    class  InvalidAction
     Exception thrown when someone tries to load an invalid rom. More...
     
    class  InvalidAddress
     Exception thrown when trying to read/write to an invalid address. More...
     
    class  InvalidRomException
     Exception thrown when someone tries to load an invalid rom. More...
     
    class  NotImplementedException
     When this is thrown, it means that we should work more. More...
     
    struct  SNES
     Container of all the components of the SNES. More...
     
    +
    + + + + diff --git a/docs/html/namespaceComSquare_1_1APU.html b/docs/html/namespaceComSquare_1_1APU.html new file mode 100644 index 0000000..ec2d63c --- /dev/null +++ b/docs/html/namespaceComSquare_1_1APU.html @@ -0,0 +1,98 @@ + + + + + + + +ComSquare: ComSquare::APU Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    + +
    +
    ComSquare::APU Namespace Reference
    +
    +
    + + + + +

    +Namespaces

     DSP
     
    + + + + + + + +

    +Classes

    class  APU
     
    struct  InternalRegisters
     
    struct  Registers
     
    +
    + + + + diff --git a/docs/html/namespaceComSquare_1_1APU_1_1DSP.html b/docs/html/namespaceComSquare_1_1APU_1_1DSP.html new file mode 100644 index 0000000..4b94048 --- /dev/null +++ b/docs/html/namespaceComSquare_1_1APU_1_1DSP.html @@ -0,0 +1,91 @@ + + + + + + + +ComSquare: ComSquare::APU::DSP Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    + +
    +
    ComSquare::APU::DSP Namespace Reference
    +
    +
    + + + + + + + +

    +Classes

    class  DSP
     
    struct  Registers
     All the registers of the DSP. More...
     
    +
    + + + + diff --git a/docs/html/namespaceComSquare_1_1CPU.html b/docs/html/namespaceComSquare_1_1CPU.html new file mode 100644 index 0000000..aef29f3 --- /dev/null +++ b/docs/html/namespaceComSquare_1_1CPU.html @@ -0,0 +1,95 @@ + + + + + + + +ComSquare: ComSquare::CPU Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    + +
    +
    ComSquare::CPU Namespace Reference
    +
    +
    + + + + + + + + + + + +

    +Classes

    class  CPU
     The main CPU. More...
     
    struct  InternalRegisters
     Struct containing internal registers of the CPU. More...
     
    struct  Registers
     Struct containing registers for the main CPU. More...
     
    +
    + + + + diff --git a/docs/html/namespaceComSquare_1_1Cartridge.html b/docs/html/namespaceComSquare_1_1Cartridge.html new file mode 100644 index 0000000..d48908e --- /dev/null +++ b/docs/html/namespaceComSquare_1_1Cartridge.html @@ -0,0 +1,129 @@ + + + + + + + +ComSquare: ComSquare::Cartridge Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    + +
    +
    ComSquare::Cartridge Namespace Reference
    +
    +
    + + + + + + + + + +

    +Classes

    class  Cartridge
     Contains the rom's memory/instructions. More...
     
    struct  Header
     
    struct  InterruptVectors
     
    + + + +

    +Enumerations

    enum  MappingMode {
    +  LoRom = 1u << 0u, +HiRom = 1u << 1u, +SlowRom = 1u << 2u, +FastRom = 1u << 3u, +
    +  ExRom = 1u << 4u +
    + }
     
    +

    Enumeration Type Documentation

    + +

    ◆ MappingMode

    + +
    +
    + + + + + + +
    Enumerator
    LoRom 
    HiRom 
    SlowRom 
    FastRom 
    ExRom 
    + +
    +
    +
    + + + + diff --git a/docs/html/namespaceComSquare_1_1Memory.html b/docs/html/namespaceComSquare_1_1Memory.html new file mode 100644 index 0000000..41177ee --- /dev/null +++ b/docs/html/namespaceComSquare_1_1Memory.html @@ -0,0 +1,97 @@ + + + + + + + +ComSquare: ComSquare::Memory Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    + +
    +
    ComSquare::Memory Namespace Reference
    +
    +
    + + + + + + + + + + + + + +

    +Classes

    class  IMemory
     Common interface implemented by all components mapping memory. More...
     
    class  IRectangleMemory
     Superset of the IMemory to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at FFFF). More...
     
    class  MemoryBus
     The memory bus is the component responsible of mapping addresses to components address and transmitting the data. More...
     
    class  MemoryShadow
     
    +
    + + + + diff --git a/docs/html/namespaceComSquare_1_1PPU.html b/docs/html/namespaceComSquare_1_1PPU.html new file mode 100644 index 0000000..e5a2d47 --- /dev/null +++ b/docs/html/namespaceComSquare_1_1PPU.html @@ -0,0 +1,89 @@ + + + + + + + +ComSquare: ComSquare::PPU Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    + +
    +
    ComSquare::PPU Namespace Reference
    +
    +
    + + + + + +

    +Classes

    class  PPU
     The struct containing all the registers the PPU. More...
     
    +
    + + + + diff --git a/docs/html/namespaceComSquare_1_1Ram.html b/docs/html/namespaceComSquare_1_1Ram.html new file mode 100644 index 0000000..e6f4e5b --- /dev/null +++ b/docs/html/namespaceComSquare_1_1Ram.html @@ -0,0 +1,88 @@ + + + + + + + +ComSquare: ComSquare::Ram Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    + +
    +
    ComSquare::Ram Namespace Reference
    +
    +
    + + + + +

    +Classes

    class  Ram
     
    +
    + + + + diff --git a/docs/html/namespaceComSquare_1_1Renderer.html b/docs/html/namespaceComSquare_1_1Renderer.html new file mode 100644 index 0000000..fbf3c9d --- /dev/null +++ b/docs/html/namespaceComSquare_1_1Renderer.html @@ -0,0 +1,90 @@ + + + + + + + +ComSquare: ComSquare::Renderer Namespace Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    + +
    +
    ComSquare::Renderer Namespace Reference
    +
    +
    + + + + + + +

    +Classes

    class  IRenderer
     
    class  SFRenderer
     
    +
    + + + + diff --git a/docs/html/namespacemembers.html b/docs/html/namespacemembers.html new file mode 100644 index 0000000..21aad6f --- /dev/null +++ b/docs/html/namespacemembers.html @@ -0,0 +1,92 @@ + + + + + + + +ComSquare: Namespace Members + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    Here is a list of all namespace members with links to the namespace documentation for each member:
    +
    + + + + diff --git a/docs/html/namespacemembers_enum.html b/docs/html/namespacemembers_enum.html new file mode 100644 index 0000000..ce8737c --- /dev/null +++ b/docs/html/namespacemembers_enum.html @@ -0,0 +1,77 @@ + + + + + + + +ComSquare: Namespace Members + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    + + + + diff --git a/docs/html/namespacemembers_eval.html b/docs/html/namespacemembers_eval.html new file mode 100644 index 0000000..cb87bf3 --- /dev/null +++ b/docs/html/namespacemembers_eval.html @@ -0,0 +1,89 @@ + + + + + + + +ComSquare: Namespace Members + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    + + + + diff --git a/docs/html/namespaces.html b/docs/html/namespaces.html new file mode 100644 index 0000000..f8b4e0f --- /dev/null +++ b/docs/html/namespaces.html @@ -0,0 +1,89 @@ + + + + + + + +ComSquare: Namespace List + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Namespace List
    +
    +
    +
    Here is a list of all namespaces with brief descriptions:
    +
    [detail level 123]
    + + + + + + + + + +
     NComSquare
     NAPU
     NDSP
     NCartridge
     NCPU
     NMemory
     NPPU
     NRam
     NRenderer
    +
    +
    + + + + diff --git a/docs/html/nav_f.png b/docs/html/nav_f.png new file mode 100644 index 0000000..72a58a5 Binary files /dev/null and b/docs/html/nav_f.png differ diff --git a/docs/html/nav_g.png b/docs/html/nav_g.png new file mode 100644 index 0000000..2093a23 Binary files /dev/null and b/docs/html/nav_g.png differ diff --git a/docs/html/nav_h.png b/docs/html/nav_h.png new file mode 100644 index 0000000..33389b1 Binary files /dev/null and b/docs/html/nav_h.png differ diff --git a/docs/html/open.png b/docs/html/open.png new file mode 100644 index 0000000..30f75c7 Binary files /dev/null and b/docs/html/open.png differ diff --git a/docs/html/pages.html b/docs/html/pages.html new file mode 100644 index 0000000..bf33720 --- /dev/null +++ b/docs/html/pages.html @@ -0,0 +1,81 @@ + + + + + + + +ComSquare: Related Pages + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + +
    + +
    +
    + + +
    + +
    + +
    +
    +
    Related Pages
    +
    +
    +
    Here is a list of all related documentation pages:
    + + +
     README
    +
    +
    + + + + diff --git a/docs/html/search/all_0.html b/docs/html/search/all_0.html new file mode 100644 index 0000000..26dd244 --- /dev/null +++ b/docs/html/search/all_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
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    + + diff --git a/docs/html/search/namespaces_0.js b/docs/html/search/namespaces_0.js new file mode 100644 index 0000000..63da4f5 --- /dev/null +++ b/docs/html/search/namespaces_0.js @@ -0,0 +1,12 @@ +var searchData= +[ + ['apu_577',['APU',['../namespaceComSquare_1_1APU.html',1,'ComSquare']]], + ['cartridge_578',['Cartridge',['../namespaceComSquare_1_1Cartridge.html',1,'ComSquare']]], + ['comsquare_579',['ComSquare',['../namespaceComSquare.html',1,'']]], + ['cpu_580',['CPU',['../namespaceComSquare_1_1CPU.html',1,'ComSquare']]], + ['dsp_581',['DSP',['../namespaceComSquare_1_1APU_1_1DSP.html',1,'ComSquare::APU']]], + ['memory_582',['Memory',['../namespaceComSquare_1_1Memory.html',1,'ComSquare']]], + ['ppu_583',['PPU',['../namespaceComSquare_1_1PPU.html',1,'ComSquare']]], + ['ram_584',['Ram',['../namespaceComSquare_1_1Ram.html',1,'ComSquare']]], + ['renderer_585',['Renderer',['../namespaceComSquare_1_1Renderer.html',1,'ComSquare']]] +]; diff --git a/docs/html/search/nomatches.html b/docs/html/search/nomatches.html new file mode 100644 index 0000000..4377320 --- /dev/null +++ b/docs/html/search/nomatches.html @@ -0,0 +1,12 @@ + + + + + + + +
    +
    No Matches
    +
    + + diff --git a/docs/html/search/pages_0.html b/docs/html/search/pages_0.html new file mode 100644 index 0000000..9a6a29a --- /dev/null +++ b/docs/html/search/pages_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/search/pages_0.js b/docs/html/search/pages_0.js new file mode 100644 index 0000000..d19d1c4 --- /dev/null +++ b/docs/html/search/pages_0.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['readme_1128',['README',['../md_README.html',1,'']]] +]; diff --git a/docs/html/search/search.css b/docs/html/search/search.css new file mode 100644 index 0000000..3cf9df9 --- /dev/null +++ b/docs/html/search/search.css @@ -0,0 +1,271 @@ +/*---------------- Search Box */ + +#FSearchBox { + float: left; +} + +#MSearchBox { + white-space : nowrap; + float: none; + margin-top: 8px; + right: 0px; + width: 170px; + height: 24px; + z-index: 102; +} + +#MSearchBox .left +{ + display:block; + position:absolute; + left:10px; + width:20px; + height:19px; + background:url('search_l.png') no-repeat; + background-position:right; +} + +#MSearchSelect { + display:block; + position:absolute; + width:20px; + height:19px; +} + +.left #MSearchSelect { + left:4px; +} + +.right #MSearchSelect { + right:5px; +} + +#MSearchField { + display:block; + position:absolute; + height:19px; + background:url('search_m.png') repeat-x; + border:none; + width:115px; + margin-left:20px; + padding-left:4px; + color: #909090; + outline: none; + font: 9pt Arial, Verdana, sans-serif; + -webkit-border-radius: 0px; +} + +#FSearchBox #MSearchField { + margin-left:15px; +} + +#MSearchBox .right { + display:block; + position:absolute; + right:10px; + top:8px; + width:20px; + height:19px; + background:url('search_r.png') no-repeat; + background-position:left; +} + +#MSearchClose { + display: none; + position: absolute; + top: 4px; + background : none; + border: none; + margin: 0px 4px 0px 0px; + padding: 0px 0px; + outline: none; +} + +.left #MSearchClose { + left: 6px; +} + +.right #MSearchClose { + right: 2px; +} + +.MSearchBoxActive #MSearchField { + color: #000000; +} + +/*---------------- Search filter selection */ + +#MSearchSelectWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #90A5CE; + background-color: #F9FAFC; + z-index: 10001; + padding-top: 4px; + padding-bottom: 4px; + -moz-border-radius: 4px; + -webkit-border-top-left-radius: 4px; + -webkit-border-top-right-radius: 4px; + -webkit-border-bottom-left-radius: 4px; + -webkit-border-bottom-right-radius: 4px; + -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15); +} + +.SelectItem { + font: 8pt Arial, Verdana, sans-serif; + padding-left: 2px; + padding-right: 12px; + border: 0px; +} + +span.SelectionMark { + margin-right: 4px; + font-family: monospace; + outline-style: none; + text-decoration: none; +} + +a.SelectItem { + display: block; + outline-style: none; + color: #000000; + text-decoration: none; + padding-left: 6px; + padding-right: 12px; +} + +a.SelectItem:focus, +a.SelectItem:active { + color: #000000; + outline-style: none; + text-decoration: none; +} + +a.SelectItem:hover { + color: #FFFFFF; + background-color: #3D578C; + outline-style: none; + text-decoration: none; + cursor: pointer; + display: block; +} + +/*---------------- Search results window */ + +iframe#MSearchResults { + width: 60ex; + height: 15em; +} + +#MSearchResultsWindow { + display: none; + position: absolute; + left: 0; top: 0; + border: 1px solid #000; + background-color: #EEF1F7; + z-index:10000; +} + +/* ----------------------------------- */ + + +#SRIndex { + clear:both; + padding-bottom: 15px; +} + +.SREntry { + font-size: 10pt; + padding-left: 1ex; +} + +.SRPage .SREntry { + font-size: 8pt; + padding: 1px 5px; +} + +body.SRPage { + margin: 5px 2px; +} + +.SRChildren { + padding-left: 3ex; padding-bottom: .5em +} + +.SRPage .SRChildren { + display: none; +} + +.SRSymbol { + font-weight: bold; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRScope { + display: block; + color: #425E97; + font-family: Arial, Verdana, sans-serif; + text-decoration: none; + outline: none; +} + +a.SRSymbol:focus, a.SRSymbol:active, +a.SRScope:focus, a.SRScope:active { + text-decoration: underline; +} + +span.SRScope { + padding-left: 4px; +} + +.SRPage .SRStatus { + padding: 2px 5px; + font-size: 8pt; + font-style: italic; +} + +.SRResult { + display: none; +} + +DIV.searchresults { + margin-left: 10px; + margin-right: 10px; +} + +/*---------------- External search page results */ + +.searchresult { + background-color: #F0F3F8; +} + +.pages b { + color: white; + padding: 5px 5px 3px 5px; + background-image: url("../tab_a.png"); + background-repeat: repeat-x; + text-shadow: 0 1px 1px #000000; +} + +.pages { + line-height: 17px; + margin-left: 4px; + text-decoration: none; +} + +.hl { + font-weight: bold; +} + +#searchresults { + margin-bottom: 20px; +} + +.searchpages { + margin-top: 10px; +} + diff --git a/docs/html/search/search.js b/docs/html/search/search.js new file mode 100644 index 0000000..a554ab9 --- /dev/null +++ b/docs/html/search/search.js @@ -0,0 +1,814 @@ +/* + @licstart The following is the entire license notice for the + JavaScript code in this file. + + Copyright (C) 1997-2017 by Dimitri van Heesch + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License along + with this program; if not, write to the Free Software Foundation, Inc., + 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + + @licend The above is the entire license notice + for the JavaScript code in this file + */ +function convertToId(search) +{ + var result = ''; + for (i=0;i do a search + { + this.Search(); + } + } + + this.OnSearchSelectKey = function(evt) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==40 && this.searchIndex0) // Up + { + this.searchIndex--; + this.OnSelectItem(this.searchIndex); + } + else if (e.keyCode==13 || e.keyCode==27) + { + this.OnSelectItem(this.searchIndex); + this.CloseSelectionWindow(); + this.DOMSearchField().focus(); + } + return false; + } + + // --------- Actions + + // Closes the results window. + this.CloseResultsWindow = function() + { + this.DOMPopupSearchResultsWindow().style.display = 'none'; + this.DOMSearchClose().style.display = 'none'; + this.Activate(false); + } + + this.CloseSelectionWindow = function() + { + this.DOMSearchSelectWindow().style.display = 'none'; + } + + // Performs a search. + this.Search = function() + { + this.keyTimeout = 0; + + // strip leading whitespace + var searchValue = this.DOMSearchField().value.replace(/^ +/, ""); + + var code = searchValue.toLowerCase().charCodeAt(0); + var idxChar = searchValue.substr(0, 1).toLowerCase(); + if ( 0xD800 <= code && code <= 0xDBFF && searchValue > 1) // surrogate pair + { + idxChar = searchValue.substr(0, 2); + } + + var resultsPage; + var resultsPageWithSearch; + var hasResultsPage; + + var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar); + if (idx!=-1) + { + var hexCode=idx.toString(16); + resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html'; + resultsPageWithSearch = resultsPage+'?'+escape(searchValue); + hasResultsPage = true; + } + else // nothing available for this search term + { + resultsPage = this.resultsPath + '/nomatches.html'; + resultsPageWithSearch = resultsPage; + hasResultsPage = false; + } + + window.frames.MSearchResults.location = resultsPageWithSearch; + var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow(); + + if (domPopupSearchResultsWindow.style.display!='block') + { + var domSearchBox = this.DOMSearchBox(); + this.DOMSearchClose().style.display = 'inline'; + if (this.insideFrame) + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + domPopupSearchResultsWindow.style.position = 'relative'; + domPopupSearchResultsWindow.style.display = 'block'; + var width = document.body.clientWidth - 8; // the -8 is for IE :-( + domPopupSearchResultsWindow.style.width = width + 'px'; + domPopupSearchResults.style.width = width + 'px'; + } + else + { + var domPopupSearchResults = this.DOMPopupSearchResults(); + var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth; + var top = getYPos(domSearchBox) + 20; // domSearchBox.offsetHeight + 1; + domPopupSearchResultsWindow.style.display = 'block'; + left -= domPopupSearchResults.offsetWidth; + domPopupSearchResultsWindow.style.top = top + 'px'; + domPopupSearchResultsWindow.style.left = left + 'px'; + } + } + + this.lastSearchValue = searchValue; + this.lastResultsPage = resultsPage; + } + + // -------- Activation Functions + + // Activates or deactivates the search panel, resetting things to + // their default values if necessary. + this.Activate = function(isActive) + { + if (isActive || // open it + this.DOMPopupSearchResultsWindow().style.display == 'block' + ) + { + this.DOMSearchBox().className = 'MSearchBoxActive'; + + var searchField = this.DOMSearchField(); + + if (searchField.value == this.searchLabel) // clear "Search" term upon entry + { + searchField.value = ''; + this.searchActive = true; + } + } + else if (!isActive) // directly remove the panel + { + this.DOMSearchBox().className = 'MSearchBoxInactive'; + this.DOMSearchField().value = this.searchLabel; + this.searchActive = false; + this.lastSearchValue = '' + this.lastResultsPage = ''; + } + } +} + +// ----------------------------------------------------------------------- + +// The class that handles everything on the search results page. +function SearchResults(name) +{ + // The number of matches from the last run of . + this.lastMatchCount = 0; + this.lastKey = 0; + this.repeatOn = false; + + // Toggles the visibility of the passed element ID. + this.FindChildElement = function(id) + { + var parentElement = document.getElementById(id); + var element = parentElement.firstChild; + + while (element && element!=parentElement) + { + if (element.nodeName == 'DIV' && element.className == 'SRChildren') + { + return element; + } + + if (element.nodeName == 'DIV' && element.hasChildNodes()) + { + element = element.firstChild; + } + else if (element.nextSibling) + { + element = element.nextSibling; + } + else + { + do + { + element = element.parentNode; + } + while (element && element!=parentElement && !element.nextSibling); + + if (element && element!=parentElement) + { + element = element.nextSibling; + } + } + } + } + + this.Toggle = function(id) + { + var element = this.FindChildElement(id); + if (element) + { + if (element.style.display == 'block') + { + element.style.display = 'none'; + } + else + { + element.style.display = 'block'; + } + } + } + + // Searches for the passed string. If there is no parameter, + // it takes it from the URL query. + // + // Always returns true, since other documents may try to call it + // and that may or may not be possible. + this.Search = function(search) + { + if (!search) // get search word from URL + { + search = window.location.search; + search = search.substring(1); // Remove the leading '?' + search = unescape(search); + } + + search = search.replace(/^ +/, ""); // strip leading spaces + search = search.replace(/ +$/, ""); // strip trailing spaces + search = search.toLowerCase(); + search = convertToId(search); + + var resultRows = document.getElementsByTagName("div"); + var matches = 0; + + var i = 0; + while (i < resultRows.length) + { + var row = resultRows.item(i); + if (row.className == "SRResult") + { + var rowMatchName = row.id.toLowerCase(); + rowMatchName = rowMatchName.replace(/^sr\d*_/, ''); // strip 'sr123_' + + if (search.length<=rowMatchName.length && + rowMatchName.substr(0, search.length)==search) + { + row.style.display = 'block'; + matches++; + } + else + { + row.style.display = 'none'; + } + } + i++; + } + document.getElementById("Searching").style.display='none'; + if (matches == 0) // no results + { + document.getElementById("NoMatches").style.display='block'; + } + else // at least one result + { + document.getElementById("NoMatches").style.display='none'; + } + this.lastMatchCount = matches; + return true; + } + + // return the first item with index index or higher that is visible + this.NavNext = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index++; + } + return focusItem; + } + + this.NavPrev = function(index) + { + var focusItem; + while (1) + { + var focusName = 'Item'+index; + focusItem = document.getElementById(focusName); + if (focusItem && focusItem.parentNode.parentNode.style.display=='block') + { + break; + } + else if (!focusItem) // last element + { + break; + } + focusItem=null; + index--; + } + return focusItem; + } + + this.ProcessKeys = function(e) + { + if (e.type == "keydown") + { + this.repeatOn = false; + this.lastKey = e.keyCode; + } + else if (e.type == "keypress") + { + if (!this.repeatOn) + { + if (this.lastKey) this.repeatOn = true; + return false; // ignore first keypress after keydown + } + } + else if (e.type == "keyup") + { + this.lastKey = 0; + this.repeatOn = false; + } + return this.lastKey!=0; + } + + this.Nav = function(evt,itemIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + var newIndex = itemIndex-1; + var focusItem = this.NavPrev(newIndex); + if (focusItem) + { + var child = this.FindChildElement(focusItem.parentNode.parentNode.id); + if (child && child.style.display == 'block') // children visible + { + var n=0; + var tmpElem; + while (1) // search for last child + { + tmpElem = document.getElementById('Item'+newIndex+'_c'+n); + if (tmpElem) + { + focusItem = tmpElem; + } + else // found it! + { + break; + } + n++; + } + } + } + if (focusItem) + { + focusItem.focus(); + } + else // return focus to search field + { + parent.document.getElementById("MSearchField").focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = itemIndex+1; + var focusItem; + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem && elem.style.display == 'block') // children visible + { + focusItem = document.getElementById('Item'+itemIndex+'_c0'); + } + if (!focusItem) focusItem = this.NavNext(newIndex); + if (focusItem) focusItem.focus(); + } + else if (this.lastKey==39) // Right + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'block'; + } + else if (this.lastKey==37) // Left + { + var item = document.getElementById('Item'+itemIndex); + var elem = this.FindChildElement(item.parentNode.parentNode.id); + if (elem) elem.style.display = 'none'; + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } + + this.NavChild = function(evt,itemIndex,childIndex) + { + var e = (evt) ? evt : window.event; // for IE + if (e.keyCode==13) return true; + if (!this.ProcessKeys(e)) return false; + + if (this.lastKey==38) // Up + { + if (childIndex>0) + { + var newIndex = childIndex-1; + document.getElementById('Item'+itemIndex+'_c'+newIndex).focus(); + } + else // already at first child, jump to parent + { + document.getElementById('Item'+itemIndex).focus(); + } + } + else if (this.lastKey==40) // Down + { + var newIndex = childIndex+1; + var elem = document.getElementById('Item'+itemIndex+'_c'+newIndex); + if (!elem) // last child, jump to parent next parent + { + elem = this.NavNext(itemIndex+1); + } + if (elem) + { + elem.focus(); + } + } + else if (this.lastKey==27) // Escape + { + parent.searchBox.CloseResultsWindow(); + parent.document.getElementById("MSearchField").focus(); + } + else if (this.lastKey==13) // Enter + { + return true; + } + return false; + } +} + +function setKeyActions(elem,action) +{ + elem.setAttribute('onkeydown',action); + elem.setAttribute('onkeypress',action); + elem.setAttribute('onkeyup',action); +} + +function setClassAttr(elem,attr) +{ + elem.setAttribute('class',attr); + elem.setAttribute('className',attr); +} + +function createResults() +{ + var results = document.getElementById("SRResults"); + for (var e=0; e + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
    No Matches
    + +
    + + diff --git a/docs/html/search/typedefs_0.js b/docs/html/search/typedefs_0.js new file mode 100644 index 0000000..539aee0 --- /dev/null +++ b/docs/html/search/typedefs_0.js @@ -0,0 +1,4 @@ +var searchData= +[ + ['uint24_5ft_1111',['uint24_t',['../Ints_8hpp.html#a89f009aaf5d1964a000f44f09fa0bcf8',1,'Ints.hpp']]] +]; diff --git a/docs/html/search/variables_0.html b/docs/html/search/variables_0.html new file mode 100644 index 0000000..bf3eba5 --- /dev/null +++ b/docs/html/search/variables_0.html @@ -0,0 +1,30 @@ + + + + + + + + + +
    +
    Loading...
    +
    + +
    Searching...
    +
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    + +
    + + diff --git a/docs/html/search/variables_0.js b/docs/html/search/variables_0.js new file mode 100644 index 0000000..94c7773 --- /dev/null +++ b/docs/html/search/variables_0.js @@ -0,0 +1,117 @@ +var searchData= +[ + ['_5f_669',['_',['../classComSquare_1_1PPU_1_1PPU.html#a6fee836aeef61e1ef5905306b6a01efe',1,'ComSquare::PPU::PPU::_()'],['../classComSquare_1_1PPU_1_1PPU.html#a811b3a90904c69d316319f431b21fb64',1,'ComSquare::PPU::PPU::_()']]], + ['_5f_5f_670',['__',['../structComSquare_1_1APU_1_1DSP_1_1Registers.html#a220a3959863ad566752a4743ec1596c8',1,'ComSquare::APU::DSP::Registers']]], + ['_5f_5fatomic_5facq_5frel_671',['__ATOMIC_ACQ_REL',['../CMakeCache_8txt.html#a93654874cdfb30676f9c0c31eb3511c0',1,'CMakeCache.txt']]], + ['_5f_5fatomic_5facquire_672',['__ATOMIC_ACQUIRE',['../CMakeCache_8txt.html#a77baa125558a766167c49286c9873d7f',1,'CMakeCache.txt']]], + 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    This is the complete list of members for ComSquare::APU::DSP::Registers, including all inherited members.

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    __ComSquare::APU::DSP::Registers
    adsr1ComSquare::APU::DSP::Registers
    adsr2ComSquare::APU::DSP::Registers
    coeffComSquare::APU::DSP::Registers
    dirComSquare::APU::DSP::Registers
    edlComSquare::APU::DSP::Registers
    efbComSquare::APU::DSP::Registers
    endxComSquare::APU::DSP::Registers
    endx0ComSquare::APU::DSP::Registers
    endx1ComSquare::APU::DSP::Registers
    endx2ComSquare::APU::DSP::Registers
    endx3ComSquare::APU::DSP::Registers
    endx4ComSquare::APU::DSP::Registers
    endx5ComSquare::APU::DSP::Registers
    endx6ComSquare::APU::DSP::Registers
    endx7ComSquare::APU::DSP::Registers
    envxComSquare::APU::DSP::Registers
    eonComSquare::APU::DSP::Registers
    eon0ComSquare::APU::DSP::Registers
    eon1ComSquare::APU::DSP::Registers
    eon2ComSquare::APU::DSP::Registers
    eon3ComSquare::APU::DSP::Registers
    eon4ComSquare::APU::DSP::Registers
    eon5ComSquare::APU::DSP::Registers
    eon6ComSquare::APU::DSP::Registers
    eon7ComSquare::APU::DSP::Registers
    esaComSquare::APU::DSP::Registers
    evolLComSquare::APU::DSP::Registers
    evolRComSquare::APU::DSP::Registers
    flgComSquare::APU::DSP::Registers
    gainComSquare::APU::DSP::Registers
    kofComSquare::APU::DSP::Registers
    kof0ComSquare::APU::DSP::Registers
    kof1ComSquare::APU::DSP::Registers
    kof2ComSquare::APU::DSP::Registers
    kof3ComSquare::APU::DSP::Registers
    kof4ComSquare::APU::DSP::Registers
    kof5ComSquare::APU::DSP::Registers
    kof6ComSquare::APU::DSP::Registers
    kof7ComSquare::APU::DSP::Registers
    konComSquare::APU::DSP::Registers
    kon0ComSquare::APU::DSP::Registers
    kon1ComSquare::APU::DSP::Registers
    kon2ComSquare::APU::DSP::Registers
    kon3ComSquare::APU::DSP::Registers
    kon4ComSquare::APU::DSP::Registers
    kon5ComSquare::APU::DSP::Registers
    kon6ComSquare::APU::DSP::Registers
    kon7ComSquare::APU::DSP::Registers
    mvolLComSquare::APU::DSP::Registers
    mvolRComSquare::APU::DSP::Registers
    nonComSquare::APU::DSP::Registers
    non0ComSquare::APU::DSP::Registers
    non1ComSquare::APU::DSP::Registers
    non2ComSquare::APU::DSP::Registers
    non3ComSquare::APU::DSP::Registers
    non4ComSquare::APU::DSP::Registers
    non5ComSquare::APU::DSP::Registers
    non6ComSquare::APU::DSP::Registers
    non7ComSquare::APU::DSP::Registers
    outxComSquare::APU::DSP::Registers
    pitchHComSquare::APU::DSP::Registers
    pitchLComSquare::APU::DSP::Registers
    pmonComSquare::APU::DSP::Registers
    pmon1ComSquare::APU::DSP::Registers
    pmon2ComSquare::APU::DSP::Registers
    pmon3ComSquare::APU::DSP::Registers
    pmon4ComSquare::APU::DSP::Registers
    pmon5ComSquare::APU::DSP::Registers
    pmon6ComSquare::APU::DSP::Registers
    pmon7ComSquare::APU::DSP::Registers
    srcnComSquare::APU::DSP::Registers
    unusedComSquare::APU::DSP::Registers
    volLComSquare::APU::DSP::Registers
    volRComSquare::APU::DSP::Registers
    + + + + diff --git a/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers.html b/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers.html new file mode 100644 index 0000000..a9f7bcb --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers.html @@ -0,0 +1,1507 @@ + + + + + + + +ComSquare: ComSquare::APU::DSP::Registers Struct Reference + + + + + + + + + +
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    ComSquare +
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    +
    ComSquare::APU::DSP::Registers Struct Reference
    +
    +
    + +

    All the registers of the DSP. + More...

    + +

    #include <DSP.hpp>

    +
    +Collaboration diagram for ComSquare::APU::DSP::Registers:
    +
    +
    Collaboration graph
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    +Public Attributes

    uint8_t volL [8]
     Left channel volume register. More...
     
    uint8_t volR [8]
     Left channel volume register. More...
     
    uint8_t pitchL [8]
     Lower 8 bits of pitch register. More...
     
    uint8_t pitchH [8]
     Higher 8 bits of pitch register. More...
     
    uint8_t srcn [8]
     Source number register. More...
     
    uint8_t adsr1 [8]
     Envelope register. More...
     
    uint8_t adsr2 [8]
     Envelope controllers register. More...
     
    uint8_t gain [8]
     Gain register. More...
     
    uint8_t envx [8]
     Envelope value register. More...
     
    uint8_t outx [8]
     Wave height register. More...
     
    uint8_t mvolL
     Left output of the Main Volume register. More...
     
    uint8_t mvolR
     Right output of the Main Volume register. More...
     
    uint8_t evolL
     Left output of the Echo Volume register. More...
     
    uint8_t evolR
     Right output of the Echo Volume register. More...
     
    union {
       struct {
          bool   kon7: 1
     
          bool   kon6: 1
     
          bool   kon5: 1
     
          bool   kon4: 1
     
          bool   kon3: 1
     
          bool   kon2: 1
     
          bool   kon1: 1
     
          bool   kon0: 1
     
       } 
     
       uint8_t   kon
     
    }; 
     Key On register. More...
     
    union {
       struct {
          bool   kof7: 1
     
          bool   kof6: 1
     
          bool   kof5: 1
     
          bool   kof4: 1
     
          bool   kof3: 1
     
          bool   kof2: 1
     
          bool   kof1: 1
     
          bool   kof0: 1
     
       } 
     
       uint8_t   kof
     
    }; 
     Key Off register. More...
     
    uint8_t flg
     Flags register. More...
     
    union {
       struct {
          bool   endx7: 1
     
          bool   endx6: 1
     
          bool   endx5: 1
     
          bool   endx4: 1
     
          bool   endx3: 1
     
          bool   endx2: 1
     
          bool   endx1: 1
     
          bool   endx0: 1
     
       } 
     
       uint8_t   endx
     
    }; 
     Sample end register. More...
     
    uint8_t efb
     Echo feedback register. More...
     
    uint8_t unused
     Not used register. More...
     
    union {
       struct {
          bool   pmon7: 1
     
          bool   pmon6: 1
     
          bool   pmon5: 1
     
          bool   pmon4: 1
     
          bool   pmon3: 1
     
          bool   pmon2: 1
     
          bool   pmon1: 1
     
          bool   __: 1
     
       } 
     
       uint8_t   pmon
     
    }; 
     Pitch modulation register. More...
     
    union {
       struct {
          bool   non7: 1
     
          bool   non6: 1
     
          bool   non5: 1
     
          bool   non4: 1
     
          bool   non3: 1
     
          bool   non2: 1
     
          bool   non1: 1
     
          bool   non0: 1
     
       } 
     
       uint8_t   non
     
    }; 
     Noise enable register. More...
     
    union {
       struct {
          bool   eon7: 1
     
          bool   eon6: 1
     
          bool   eon5: 1
     
          bool   eon4: 1
     
          bool   eon3: 1
     
          bool   eon2: 1
     
          bool   eon1: 1
     
          bool   eon0: 1
     
       } 
     
       uint8_t   eon
     
    }; 
     Echo enable register. More...
     
    uint8_t dir
     Source Directory offset register. More...
     
    uint8_t esa
     Echo data start register. More...
     
    uint8_t edl
     Echo delay size register. More...
     
    uint8_t coeff [8]
     Echo FIR filter coefficients. More...
     
    +

    Detailed Description

    +

    All the registers of the DSP.

    +

    Member Data Documentation

    + +

    ◆ @53

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    Key On register.

    + +
    +
    + +

    ◆ @55

    + +
    +
    + + + + +
    union { ... }
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    + +

    Key Off register.

    + +
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    + +

    ◆ @57

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    Sample end register.

    + +
    +
    + +

    ◆ @59

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    Pitch modulation register.

    + +
    +
    + +

    ◆ @61

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    Noise enable register.

    + +
    +
    + +

    ◆ @63

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    Echo enable register.

    + +
    +
    + +

    ◆ __

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::__
    +
    + +
    +
    + +

    ◆ adsr1

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::adsr1[8]
    +
    + +

    Envelope register.

    + +
    +
    + +

    ◆ adsr2

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::adsr2[8]
    +
    + +

    Envelope controllers register.

    + +
    +
    + +

    ◆ coeff

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::coeff[8]
    +
    + +

    Echo FIR filter coefficients.

    + +
    +
    + +

    ◆ dir

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::dir
    +
    + +

    Source Directory offset register.

    + +
    +
    + +

    ◆ edl

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::edl
    +
    + +

    Echo delay size register.

    + +
    +
    + +

    ◆ efb

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::efb
    +
    + +

    Echo feedback register.

    + +
    +
    + +

    ◆ endx

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::endx
    +
    + +
    +
    + +

    ◆ endx0

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::endx0
    +
    + +
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    + +

    ◆ endx1

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::endx1
    +
    + +
    +
    + +

    ◆ endx2

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::endx2
    +
    + +
    +
    + +

    ◆ endx3

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::endx3
    +
    + +
    +
    + +

    ◆ endx4

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::endx4
    +
    + +
    +
    + +

    ◆ endx5

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::endx5
    +
    + +
    +
    + +

    ◆ endx6

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::endx6
    +
    + +
    +
    + +

    ◆ endx7

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::endx7
    +
    + +
    +
    + +

    ◆ envx

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::envx[8]
    +
    + +

    Envelope value register.

    + +
    +
    + +

    ◆ eon

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::eon
    +
    + +
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    ◆ eon0

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::eon0
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    + +
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    ◆ eon1

    + +
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    bool ComSquare::APU::DSP::Registers::eon1
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    + +

    ◆ eon2

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::eon2
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    + +
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    + +

    ◆ eon3

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::eon3
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    + +
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    + +

    ◆ eon4

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::eon4
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    + +
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    + +

    ◆ eon5

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::eon5
    +
    + +
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    + +

    ◆ eon6

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::eon6
    +
    + +
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    + +

    ◆ eon7

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::eon7
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    + +
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    + +

    ◆ esa

    + +
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    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::esa
    +
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    Echo data start register.

    + +
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    + +

    ◆ evolL

    + +
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    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::evolL
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    Left output of the Echo Volume register.

    + +
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    + +

    ◆ evolR

    + +
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    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::evolR
    +
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    Right output of the Echo Volume register.

    + +
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    + +

    ◆ flg

    + +
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    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::flg
    +
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    Flags register.

    + +
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    ◆ gain

    + +
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    uint8_t ComSquare::APU::DSP::Registers::gain[8]
    +
    + +

    Gain register.

    + +
    +
    + +

    ◆ kof

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::kof
    +
    + +
    +
    + +

    ◆ kof0

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::kof0
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    + +
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    + +

    ◆ kof1

    + +
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    + + + + +
    bool ComSquare::APU::DSP::Registers::kof1
    +
    + +
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    + +

    ◆ kof2

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kof2
    +
    + +
    +
    + +

    ◆ kof3

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kof3
    +
    + +
    +
    + +

    ◆ kof4

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kof4
    +
    + +
    +
    + +

    ◆ kof5

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kof5
    +
    + +
    +
    + +

    ◆ kof6

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kof6
    +
    + +
    +
    + +

    ◆ kof7

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kof7
    +
    + +
    +
    + +

    ◆ kon

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::kon
    +
    + +
    +
    + +

    ◆ kon0

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kon0
    +
    + +
    +
    + +

    ◆ kon1

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kon1
    +
    + +
    +
    + +

    ◆ kon2

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kon2
    +
    + +
    +
    + +

    ◆ kon3

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kon3
    +
    + +
    +
    + +

    ◆ kon4

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kon4
    +
    + +
    +
    + +

    ◆ kon5

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kon5
    +
    + +
    +
    + +

    ◆ kon6

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kon6
    +
    + +
    +
    + +

    ◆ kon7

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::kon7
    +
    + +
    +
    + +

    ◆ mvolL

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::mvolL
    +
    + +

    Left output of the Main Volume register.

    + +
    +
    + +

    ◆ mvolR

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::mvolR
    +
    + +

    Right output of the Main Volume register.

    + +
    +
    + +

    ◆ non

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::non
    +
    + +
    +
    + +

    ◆ non0

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::non0
    +
    + +
    +
    + +

    ◆ non1

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::non1
    +
    + +
    +
    + +

    ◆ non2

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::non2
    +
    + +
    +
    + +

    ◆ non3

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::non3
    +
    + +
    +
    + +

    ◆ non4

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::non4
    +
    + +
    +
    + +

    ◆ non5

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::non5
    +
    + +
    +
    + +

    ◆ non6

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::non6
    +
    + +
    +
    + +

    ◆ non7

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::non7
    +
    + +
    +
    + +

    ◆ outx

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::outx[8]
    +
    + +

    Wave height register.

    + +
    +
    + +

    ◆ pitchH

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::pitchH[8]
    +
    + +

    Higher 8 bits of pitch register.

    + +
    +
    + +

    ◆ pitchL

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::pitchL[8]
    +
    + +

    Lower 8 bits of pitch register.

    + +
    +
    + +

    ◆ pmon

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::pmon
    +
    + +
    +
    + +

    ◆ pmon1

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::pmon1
    +
    + +
    +
    + +

    ◆ pmon2

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::pmon2
    +
    + +
    +
    + +

    ◆ pmon3

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::pmon3
    +
    + +
    +
    + +

    ◆ pmon4

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::pmon4
    +
    + +
    +
    + +

    ◆ pmon5

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::pmon5
    +
    + +
    +
    + +

    ◆ pmon6

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::pmon6
    +
    + +
    +
    + +

    ◆ pmon7

    + +
    +
    + + + + +
    bool ComSquare::APU::DSP::Registers::pmon7
    +
    + +
    +
    + +

    ◆ srcn

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::srcn[8]
    +
    + +

    Source number register.

    + +
    +
    + +

    ◆ unused

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::unused
    +
    + +

    Not used register.

    + +
    +
    + +

    ◆ volL

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::volL[8]
    +
    + +

    Left channel volume register.

    + +
    +
    + +

    ◆ volR

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::DSP::Registers::volR[8]
    +
    + +

    Left channel volume register.

    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    + + + + diff --git a/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.map b/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.map new file mode 100644 index 0000000..f10dd39 --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.md5 b/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.md5 new file mode 100644 index 0000000..cdf504a --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.md5 @@ -0,0 +1 @@ +ae6bfa098d3cd31ffa5b7674900e8301 \ No newline at end of file diff --git a/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.png b/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.png new file mode 100644 index 0000000..7232a14 Binary files /dev/null and b/docs/html/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.png differ diff --git a/docs/html/structComSquare_1_1APU_1_1InternalRegisters-members.html b/docs/html/structComSquare_1_1APU_1_1InternalRegisters-members.html new file mode 100644 index 0000000..8db76f3 --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1InternalRegisters-members.html @@ -0,0 +1,91 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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    ComSquare +
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    +
    ComSquare::APU::InternalRegisters Struct Reference
    +
    +
    + +

    #include <APU.hpp>

    +
    +Collaboration diagram for ComSquare::APU::InternalRegisters:
    +
    +
    Collaboration graph
    + + + +
    + + + + + +

    +Classes

    union  psw
     Program Status Word register. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Attributes

    uint8_t x
     The X index register. More...
     
    union {
       struct {
          uint8_t   a
     The Accumulator register. More...
     
          uint8_t   y
     The Y Index register. More...
     
       } 
     
       uint16_t   ya
     
    }; 
     The YA register. More...
     
    uint8_t sp
     The Stack pointer register. More...
     
    union {
       struct {
          uint8_t   pcl
     
          uint8_t   pch
     
       } 
     
       uint16_t   pc
     
    }; 
     The Program counter register. More...
     
    +

    Member Data Documentation

    + +

    ◆ @1

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The YA register.

    + +
    +
    + +

    ◆ @3

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Program counter register.

    + +
    +
    + +

    ◆ a

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::InternalRegisters::a
    +
    + +

    The Accumulator register.

    + +
    +
    + +

    ◆ pc

    + +
    +
    + + + + +
    uint16_t ComSquare::APU::InternalRegisters::pc
    +
    + +
    +
    + +

    ◆ pch

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::InternalRegisters::pch
    +
    + +
    +
    + +

    ◆ pcl

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::InternalRegisters::pcl
    +
    + +
    +
    + +

    ◆ sp

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::InternalRegisters::sp
    +
    + +

    The Stack pointer register.

    + +
    +
    + +

    ◆ x

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::InternalRegisters::x
    +
    + +

    The X index register.

    + +
    +
    + +

    ◆ y

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::InternalRegisters::y
    +
    + +

    The Y Index register.

    + +
    +
    + +

    ◆ ya

    + +
    +
    + + + + +
    uint16_t ComSquare::APU::InternalRegisters::ya
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    + + + + diff --git a/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.map b/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.map new file mode 100644 index 0000000..f1626ce --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.md5 b/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.md5 new file mode 100644 index 0000000..cde1e1f --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.md5 @@ -0,0 +1 @@ +135b684196981900f34ecfd43cd70753 \ No newline at end of file diff --git a/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.png b/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.png new file mode 100644 index 0000000..a34ce2b Binary files /dev/null and b/docs/html/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.png differ diff --git a/docs/html/structComSquare_1_1APU_1_1Registers-members.html b/docs/html/structComSquare_1_1APU_1_1Registers-members.html new file mode 100644 index 0000000..29e5018 --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1Registers-members.html @@ -0,0 +1,99 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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    +
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    ComSquare +
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    + +
    +
    ComSquare::APU::Registers Struct Reference
    +
    +
    + +

    #include <APU.hpp>

    +
    +Collaboration diagram for ComSquare::APU::Registers:
    +
    +
    Collaboration graph
    + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Attributes

    uint8_t unknown
     An undocumented register. More...
     
    uint8_t ctrlreg
     Control Register register. More...
     
    uint8_t dspregAddr
     DSP Register Address register. More...
     
    uint8_t dspregData
     DSP Register data register. More...
     
    uint8_t port0
     Port 0 register. More...
     
    uint8_t port1
     Port 1 register. More...
     
    uint8_t port2
     Port 2 register. More...
     
    uint8_t port3
     Port 3 register. More...
     
    uint8_t regmem1
     Regular Memory register. More...
     
    uint8_t regmem2
     Another Regular Memory register. More...
     
    uint8_t timer0
     Timer-0 register. More...
     
    uint8_t timer1
     Timer-1 register. More...
     
    uint8_t timer2
     Timer-2 register. More...
     
    uint8_t counter0
     Counter-0 register. More...
     
    uint8_t counter1
     Counter-1 register. More...
     
    uint8_t counter2
     Counter-2 register. More...
     
    +

    Member Data Documentation

    + +

    ◆ counter0

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::counter0
    +
    + +

    Counter-0 register.

    + +
    +
    + +

    ◆ counter1

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::counter1
    +
    + +

    Counter-1 register.

    + +
    +
    + +

    ◆ counter2

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::counter2
    +
    + +

    Counter-2 register.

    + +
    +
    + +

    ◆ ctrlreg

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::ctrlreg
    +
    + +

    Control Register register.

    + +
    +
    + +

    ◆ dspregAddr

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::dspregAddr
    +
    + +

    DSP Register Address register.

    + +
    +
    + +

    ◆ dspregData

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::dspregData
    +
    + +

    DSP Register data register.

    + +
    +
    + +

    ◆ port0

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::port0
    +
    + +

    Port 0 register.

    + +
    +
    + +

    ◆ port1

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::port1
    +
    + +

    Port 1 register.

    + +
    +
    + +

    ◆ port2

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::port2
    +
    + +

    Port 2 register.

    + +
    +
    + +

    ◆ port3

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::port3
    +
    + +

    Port 3 register.

    + +
    +
    + +

    ◆ regmem1

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::regmem1
    +
    + +

    Regular Memory register.

    + +
    +
    + +

    ◆ regmem2

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::regmem2
    +
    + +

    Another Regular Memory register.

    + +
    +
    + +

    ◆ timer0

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::timer0
    +
    + +

    Timer-0 register.

    + +
    +
    + +

    ◆ timer1

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::timer1
    +
    + +

    Timer-1 register.

    + +
    +
    + +

    ◆ timer2

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::timer2
    +
    + +

    Timer-2 register.

    + +
    +
    + +

    ◆ unknown

    + +
    +
    + + + + +
    uint8_t ComSquare::APU::Registers::unknown
    +
    + +

    An undocumented register.

    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    + + + + diff --git a/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.map b/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.map new file mode 100644 index 0000000..6db8ec7 --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.md5 b/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.md5 new file mode 100644 index 0000000..63df88d --- /dev/null +++ b/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.md5 @@ -0,0 +1 @@ +ce73e62c32bd654f96f8959c5d6d4883 \ No newline at end of file diff --git a/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.png b/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.png new file mode 100644 index 0000000..793add3 Binary files /dev/null and b/docs/html/structComSquare_1_1APU_1_1Registers__coll__graph.png differ diff --git a/docs/html/structComSquare_1_1CPU_1_1InternalRegisters-members.html b/docs/html/structComSquare_1_1CPU_1_1InternalRegisters-members.html new file mode 100644 index 0000000..203ea79 --- /dev/null +++ b/docs/html/structComSquare_1_1CPU_1_1InternalRegisters-members.html @@ -0,0 +1,113 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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    ComSquare::CPU::InternalRegisters Struct Reference
    +
    +
    + +

    Struct containing internal registers of the CPU. + More...

    + +

    #include <CPU.hpp>

    +
    +Collaboration diagram for ComSquare::CPU::InternalRegisters:
    +
    +
    Collaboration graph
    + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Attributes

    uint8_t nmitimen
     Interrupt Enable Register. More...
     
    uint8_t wrio
     IO Port Write Register. More...
     
    uint8_t wrmpya
     Multiplicand Register A. More...
     
    uint8_t wrmpyb
     Multiplicand Register B. More...
     
    uint8_t wrdivl
     Divisor & Dividend Registers (A - Low) More...
     
    uint8_t wrdivh
     Divisor & Dividend Registers (A - High) More...
     
    uint8_t wrdivb
     Divisor & Dividend Registers (B) More...
     
    uint8_t htimel
     IRQ Timer Registers (Horizontal - Low) More...
     
    uint8_t htimeh
     IRQ Timer Registers (Horizontal - High) More...
     
    uint8_t vtimel
     IRQ Timer Registers (Vertical - Low) More...
     
    uint8_t vtimeh
     IRQ Timer Registers (Vertical - High) More...
     
    uint8_t mdmaen
     DMA Enable Register. More...
     
    uint8_t hdmaen
     HDMA Enable Register. More...
     
    uint8_t memsel
     ROM Speed Register. More...
     
    uint8_t rdnmi
     Interrupt Flag Registers. More...
     
    uint8_t timeup
     Interrupt Flag Registers - TimeUp. More...
     
    uint8_t hvbjoy
     PPU Status Register. More...
     
    uint8_t rdio
     IO Port Read Register. More...
     
    uint8_t rddivl
     Divide Result Registers (can sometimes be used as multiplication result register) - LOW. More...
     
    uint8_t rddivh
     Divide Result Registers (can sometimes be used as multiplication result register) - HIGH. More...
     
    uint8_t rdmpyl
     Multiplication Result Registers (can sometimes be used as divide result register) - LOW. More...
     
    uint8_t rdmpyh
     Multiplication Result Registers (can sometimes be used as divide result register) - HIGH. More...
     
    uint8_t joy1l
     Controller Port Data Registers (Pad 1 - Low) More...
     
    uint8_t joy1h
     Controller Port Data Registers (Pad 1 - High) More...
     
    uint8_t joy2l
     Controller Port Data Registers (Pad 2 - Low) More...
     
    uint8_t joy2h
     Controller Port Data Registers (Pad 2 - High) More...
     
    uint8_t joy3l
     Controller Port Data Registers (Pad 3 - Low) More...
     
    uint8_t joy3h
     Controller Port Data Registers (Pad 3 - High) More...
     
    uint8_t joy4l
     Controller Port Data Registers (Pad 4 - Low) More...
     
    uint8_t joy4h
     Controller Port Data Registers (Pad 4 - High) More...
     
    +

    Detailed Description

    +

    Struct containing internal registers of the CPU.

    +

    Member Data Documentation

    + +

    ◆ hdmaen

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::hdmaen
    +
    + +

    HDMA Enable Register.

    + +
    +
    + +

    ◆ htimeh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::htimeh
    +
    + +

    IRQ Timer Registers (Horizontal - High)

    + +
    +
    + +

    ◆ htimel

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::htimel
    +
    + +

    IRQ Timer Registers (Horizontal - Low)

    + +
    +
    + +

    ◆ hvbjoy

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::hvbjoy
    +
    + +

    PPU Status Register.

    + +
    +
    + +

    ◆ joy1h

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::joy1h
    +
    + +

    Controller Port Data Registers (Pad 1 - High)

    + +
    +
    + +

    ◆ joy1l

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::joy1l
    +
    + +

    Controller Port Data Registers (Pad 1 - Low)

    + +
    +
    + +

    ◆ joy2h

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::joy2h
    +
    + +

    Controller Port Data Registers (Pad 2 - High)

    + +
    +
    + +

    ◆ joy2l

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::joy2l
    +
    + +

    Controller Port Data Registers (Pad 2 - Low)

    + +
    +
    + +

    ◆ joy3h

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::joy3h
    +
    + +

    Controller Port Data Registers (Pad 3 - High)

    + +
    +
    + +

    ◆ joy3l

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::joy3l
    +
    + +

    Controller Port Data Registers (Pad 3 - Low)

    + +
    +
    + +

    ◆ joy4h

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::joy4h
    +
    + +

    Controller Port Data Registers (Pad 4 - High)

    + +
    +
    + +

    ◆ joy4l

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::joy4l
    +
    + +

    Controller Port Data Registers (Pad 4 - Low)

    + +
    +
    + +

    ◆ mdmaen

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::mdmaen
    +
    + +

    DMA Enable Register.

    + +
    +
    + +

    ◆ memsel

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::memsel
    +
    + +

    ROM Speed Register.

    + +
    +
    + +

    ◆ nmitimen

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::nmitimen
    +
    + +

    Interrupt Enable Register.

    + +
    +
    + +

    ◆ rddivh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::rddivh
    +
    + +

    Divide Result Registers (can sometimes be used as multiplication result register) - HIGH.

    + +
    +
    + +

    ◆ rddivl

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::rddivl
    +
    + +

    Divide Result Registers (can sometimes be used as multiplication result register) - LOW.

    + +
    +
    + +

    ◆ rdio

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::rdio
    +
    + +

    IO Port Read Register.

    + +
    +
    + +

    ◆ rdmpyh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::rdmpyh
    +
    + +

    Multiplication Result Registers (can sometimes be used as divide result register) - HIGH.

    + +
    +
    + +

    ◆ rdmpyl

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::rdmpyl
    +
    + +

    Multiplication Result Registers (can sometimes be used as divide result register) - LOW.

    + +
    +
    + +

    ◆ rdnmi

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::rdnmi
    +
    + +

    Interrupt Flag Registers.

    + +
    +
    + +

    ◆ timeup

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::timeup
    +
    + +

    Interrupt Flag Registers - TimeUp.

    + +
    +
    + +

    ◆ vtimeh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::vtimeh
    +
    + +

    IRQ Timer Registers (Vertical - High)

    + +
    +
    + +

    ◆ vtimel

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::vtimel
    +
    + +

    IRQ Timer Registers (Vertical - Low)

    + +
    +
    + +

    ◆ wrdivb

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::wrdivb
    +
    + +

    Divisor & Dividend Registers (B)

    + +
    +
    + +

    ◆ wrdivh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::wrdivh
    +
    + +

    Divisor & Dividend Registers (A - High)

    + +
    +
    + +

    ◆ wrdivl

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::wrdivl
    +
    + +

    Divisor & Dividend Registers (A - Low)

    + +
    +
    + +

    ◆ wrio

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::wrio
    +
    + +

    IO Port Write Register.

    + +
    +
    + +

    ◆ wrmpya

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::wrmpya
    +
    + +

    Multiplicand Register A.

    + +
    +
    + +

    ◆ wrmpyb

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::InternalRegisters::wrmpyb
    +
    + +

    Multiplicand Register B.

    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    + + + + diff --git a/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.map b/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.map new file mode 100644 index 0000000..c53cf79 --- /dev/null +++ b/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.md5 b/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.md5 new file mode 100644 index 0000000..67688f0 --- /dev/null +++ b/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.md5 @@ -0,0 +1 @@ +f217f70a153225fe670501683a68b108 \ No newline at end of file diff --git a/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.png b/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.png new file mode 100644 index 0000000..dec6284 Binary files /dev/null and b/docs/html/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.png differ diff --git a/docs/html/structComSquare_1_1CPU_1_1Registers-members.html b/docs/html/structComSquare_1_1CPU_1_1Registers-members.html new file mode 100644 index 0000000..d81fc3b --- /dev/null +++ b/docs/html/structComSquare_1_1CPU_1_1Registers-members.html @@ -0,0 +1,103 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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    ComSquare::CPU::Registers Member List
    +
    + + + + + diff --git a/docs/html/structComSquare_1_1CPU_1_1Registers.html b/docs/html/structComSquare_1_1CPU_1_1Registers.html new file mode 100644 index 0000000..5ce8378 --- /dev/null +++ b/docs/html/structComSquare_1_1CPU_1_1Registers.html @@ -0,0 +1,577 @@ + + + + + + + +ComSquare: ComSquare::CPU::Registers Struct Reference + + + + + + + + + +
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    ComSquare::CPU::Registers Struct Reference
    +
    +
    + +

    Struct containing registers for the main CPU. + More...

    + +

    #include <CPU.hpp>

    +
    +Collaboration diagram for ComSquare::CPU::Registers:
    +
    +
    Collaboration graph
    + + + +
    + + + + + +

    +Classes

    union  p
     The Processor status register;. More...
     
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Attributes

    union {
       struct {
          uint8_t   ah
     
          uint8_t   al
     
       } 
     
       uint16_t   a
     
    }; 
     The Accumulator. More...
     
    uint8_t dbr
     The Data Bank Register;. More...
     
    union {
       struct {
          uint8_t   dh
     
          uint8_t   dl
     
       } 
     
       uint16_t   d
     
    }; 
     The Direct register;. More...
     
    uint8_t k
     The program banK register;. More...
     
    union {
       struct {
          uint8_t   pch
     
          uint8_t   pcl
     
       } 
     
       uint16_t   pc
     
    }; 
     The Program Counter;. More...
     
    union {
       struct {
          uint8_t   sh
     
          uint8_t   sl
     
       } 
     
       uint16_t   s
     
    }; 
     The Stack pointer. More...
     
    union {
       struct {
          uint8_t   xh
     
          uint8_t   xl
     
       } 
     
       uint16_t   x
     
    }; 
     The X index register. More...
     
    union {
       struct {
          uint8_t   yh
     
          uint8_t   yl
     
       } 
     
       uint16_t   y
     
    }; 
     The Y index register. More...
     
    +

    Detailed Description

    +

    Struct containing registers for the main CPU.

    +

    Member Data Documentation

    + +

    ◆ @27

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Accumulator.

    + +
    +
    + +

    ◆ @29

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Direct register;.

    + +
    +
    + +

    ◆ @31

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Program Counter;.

    + +
    +
    + +

    ◆ @33

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Stack pointer.

    + +
    +
    + +

    ◆ @35

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The X index register.

    + +
    +
    + +

    ◆ @37

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Y index register.

    + +
    +
    + +

    ◆ a

    + +
    +
    + + + + +
    uint16_t ComSquare::CPU::Registers::a
    +
    + +
    +
    + +

    ◆ ah

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::ah
    +
    + +
    +
    + +

    ◆ al

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::al
    +
    + +
    +
    + +

    ◆ d

    + +
    +
    + + + + +
    uint16_t ComSquare::CPU::Registers::d
    +
    + +
    +
    + +

    ◆ dbr

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::dbr
    +
    + +

    The Data Bank Register;.

    + +
    +
    + +

    ◆ dh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::dh
    +
    + +
    +
    + +

    ◆ dl

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::dl
    +
    + +
    +
    + +

    ◆ k

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::k
    +
    + +

    The program banK register;.

    + +
    +
    + +

    ◆ pc

    + +
    +
    + + + + +
    uint16_t ComSquare::CPU::Registers::pc
    +
    + +
    +
    + +

    ◆ pch

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::pch
    +
    + +
    +
    + +

    ◆ pcl

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::pcl
    +
    + +
    +
    + +

    ◆ s

    + +
    +
    + + + + +
    uint16_t ComSquare::CPU::Registers::s
    +
    + +
    +
    + +

    ◆ sh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::sh
    +
    + +
    +
    + +

    ◆ sl

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::sl
    +
    + +
    +
    + +

    ◆ x

    + +
    +
    + + + + +
    uint16_t ComSquare::CPU::Registers::x
    +
    + +
    +
    + +

    ◆ xh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::xh
    +
    + +
    +
    + +

    ◆ xl

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::xl
    +
    + +
    +
    + +

    ◆ y

    + +
    +
    + + + + +
    uint16_t ComSquare::CPU::Registers::y
    +
    + +
    +
    + +

    ◆ yh

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::yh
    +
    + +
    +
    + +

    ◆ yl

    + +
    +
    + + + + +
    uint8_t ComSquare::CPU::Registers::yl
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    + + + + diff --git a/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.map b/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.map new file mode 100644 index 0000000..780640a --- /dev/null +++ b/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.md5 b/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.md5 new file mode 100644 index 0000000..e364748 --- /dev/null +++ b/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.md5 @@ -0,0 +1 @@ +0db2ac136f96aca98506c2f11a533a5f \ No newline at end of file diff --git a/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.png b/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.png new file mode 100644 index 0000000..c9ed897 Binary files /dev/null and b/docs/html/structComSquare_1_1CPU_1_1Registers__coll__graph.png differ diff --git a/docs/html/structComSquare_1_1Cartridge_1_1Header-members.html b/docs/html/structComSquare_1_1Cartridge_1_1Header-members.html new file mode 100644 index 0000000..6573d53 --- /dev/null +++ b/docs/html/structComSquare_1_1Cartridge_1_1Header-members.html @@ -0,0 +1,97 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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    ComSquare +
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    ComSquare::Cartridge::Header Member List
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    +
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    ComSquare +
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    +
    ComSquare::Cartridge::Header Struct Reference
    +
    +
    + +

    #include <Cartridge.hpp>

    +
    +Collaboration diagram for ComSquare::Cartridge::Header:
    +
    +
    Collaboration graph
    + + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Attributes

    std::string gameName
     The name of the game. More...
     
    MappingMode mappingMode
     The memory mapping of the ROM. More...
     
    uint8_t romType
     The rom type (special information about the rom, still don't know what). More...
     
    unsigned romSize
     The size (in bytes) of the ram. More...
     
    unsigned sramSize
     The size of the SRom inside the cartridge. More...
     
    union {
       uint8_t   creatorIDs [2]
     
       uint16_t   creatorID
     
    }; 
     Creator license ID code. More...
     
    uint8_t version
     The version of the game. More...
     
    union {
       uint8_t   checksumComplements [2]
     
       uint16_t   checksumComplement
     
    }; 
     Checksum complement. More...
     
    union {
       uint8_t   checksums [2]
     
       uint16_t   checksum
     
    }; 
     Checksum. More...
     
    InterruptVectors nativeInterrupts
     The interrupt vectors used to halt the CPU in native mode. More...
     
    InterruptVectors emulationInterrupts
     The interrupt vectors used to halt the CPU in emulation mode. More...
     
    +

    Member Data Documentation

    + +

    ◆ @11

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    Checksum complement.

    + +
    +
    + +

    ◆ @13

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    Checksum.

    + +
    +
    + +

    ◆ @9

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    Creator license ID code.

    + +
    +
    + +

    ◆ checksum

    + +
    +
    + + + + +
    uint16_t ComSquare::Cartridge::Header::checksum
    +
    + +
    +
    + +

    ◆ checksumComplement

    + +
    +
    + + + + +
    uint16_t ComSquare::Cartridge::Header::checksumComplement
    +
    + +
    +
    + +

    ◆ checksumComplements

    + +
    +
    + + + + +
    uint8_t ComSquare::Cartridge::Header::checksumComplements[2]
    +
    + +
    +
    + +

    ◆ checksums

    + +
    +
    + + + + +
    uint8_t ComSquare::Cartridge::Header::checksums[2]
    +
    + +
    +
    + +

    ◆ creatorID

    + +
    +
    + + + + +
    uint16_t ComSquare::Cartridge::Header::creatorID
    +
    + +
    +
    + +

    ◆ creatorIDs

    + +
    +
    + + + + +
    uint8_t ComSquare::Cartridge::Header::creatorIDs[2]
    +
    + +
    +
    + +

    ◆ emulationInterrupts

    + +
    +
    + + + + +
    InterruptVectors ComSquare::Cartridge::Header::emulationInterrupts
    +
    + +

    The interrupt vectors used to halt the CPU in emulation mode.

    + +
    +
    + +

    ◆ gameName

    + +
    +
    + + + + +
    std::string ComSquare::Cartridge::Header::gameName
    +
    + +

    The name of the game.

    + +
    +
    + +

    ◆ mappingMode

    + +
    +
    + + + + +
    MappingMode ComSquare::Cartridge::Header::mappingMode
    +
    + +

    The memory mapping of the ROM.

    + +
    +
    + +

    ◆ nativeInterrupts

    + +
    +
    + + + + +
    InterruptVectors ComSquare::Cartridge::Header::nativeInterrupts
    +
    + +

    The interrupt vectors used to halt the CPU in native mode.

    + +
    +
    + +

    ◆ romSize

    + +
    +
    + + + + +
    unsigned ComSquare::Cartridge::Header::romSize
    +
    + +

    The size (in bytes) of the ram.

    + +
    +
    + +

    ◆ romType

    + +
    +
    + + + + +
    uint8_t ComSquare::Cartridge::Header::romType
    +
    + +

    The rom type (special information about the rom, still don't know what).

    + +
    +
    + +

    ◆ sramSize

    + +
    +
    + + + + +
    unsigned ComSquare::Cartridge::Header::sramSize
    +
    + +

    The size of the SRom inside the cartridge.

    + +
    +
    + +

    ◆ version

    + +
    +
    + + + + +
    uint8_t ComSquare::Cartridge::Header::version
    +
    + +

    The version of the game.

    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    + + + + diff --git a/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.map b/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.map new file mode 100644 index 0000000..357f9d0 --- /dev/null +++ b/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.map @@ -0,0 +1,4 @@ + + + + diff --git a/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.md5 b/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.md5 new file mode 100644 index 0000000..fe34488 --- /dev/null +++ b/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.md5 @@ -0,0 +1 @@ +d7c52a6310d49df8bc508bbf3e39d1e3 \ No newline at end of file diff --git a/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.png b/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.png new file mode 100644 index 0000000..9da28ac Binary files /dev/null and b/docs/html/structComSquare_1_1Cartridge_1_1Header__coll__graph.png differ diff --git a/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors-members.html b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors-members.html new file mode 100644 index 0000000..5c8e78d --- /dev/null +++ b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors-members.html @@ -0,0 +1,95 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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    ComSquare::Cartridge::InterruptVectors Member List
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    + + + + + diff --git a/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors.html b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors.html new file mode 100644 index 0000000..9bbae06 --- /dev/null +++ b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors.html @@ -0,0 +1,413 @@ + + + + + + + +ComSquare: ComSquare::Cartridge::InterruptVectors Struct Reference + + + + + + + + + +
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    ComSquare +
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    +
    ComSquare::Cartridge::InterruptVectors Struct Reference
    +
    +
    + +

    #include <InterruptVectors.hpp>

    +
    +Collaboration diagram for ComSquare::Cartridge::InterruptVectors:
    +
    +
    Collaboration graph
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    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Attributes

    union {
       uint8_t   cop8 [2]
     
       uint16_t   cop
     
    }; 
     The Co-Processor enable vector. More...
     
    union {
       uint8_t   brk8 [2]
     
       uint16_t   brk
     
    }; 
     The Break vector. More...
     
    union {
       uint8_t   abort8 [2]
     
       uint16_t   abort
     
    }; 
     The Abort vector. More...
     
    union {
       uint8_t   nmi8 [2]
     
       uint16_t   nmi
     
    }; 
     The non-maskable interrupt (The V-Blank interrupt). More...
     
    union {
       uint8_t   reset8 [2]
     
       uint16_t   reset
     
    }; 
     The Reset vector (execution of the SNES starts with this reset vector in emulation mode). More...
     
    union {
       uint8_t   irq8 [2]
     
       uint16_t   irq
     
    }; 
     The Interrupt Request vector. More...
     
    +

    Member Data Documentation

    + +

    ◆ @15

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Co-Processor enable vector.

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    + +

    ◆ @17

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Break vector.

    + +
    +
    + +

    ◆ @19

    + +
    +
    + + + + +
    union { ... }
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    + +

    The Abort vector.

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    +
    + +

    ◆ @21

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The non-maskable interrupt (The V-Blank interrupt).

    + +
    +
    + +

    ◆ @23

    + +
    +
    + + + + +
    union { ... }
    +
    + +

    The Reset vector (execution of the SNES starts with this reset vector in emulation mode).

    + +
    +
    + +

    ◆ @25

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    + + + + +
    union { ... }
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    + +

    The Interrupt Request vector.

    + +
    +
    + +

    ◆ abort

    + +
    +
    + + + + +
    uint16_t ComSquare::Cartridge::InterruptVectors::abort
    +
    + +
    +
    + +

    ◆ abort8

    + +
    +
    + + + + +
    uint8_t ComSquare::Cartridge::InterruptVectors::abort8[2]
    +
    + +
    +
    + +

    ◆ brk

    + +
    +
    + + + + +
    uint16_t ComSquare::Cartridge::InterruptVectors::brk
    +
    + +
    +
    + +

    ◆ brk8

    + +
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    + + + + +
    uint8_t ComSquare::Cartridge::InterruptVectors::brk8[2]
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    ◆ cop

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    uint16_t ComSquare::Cartridge::InterruptVectors::cop
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    ◆ cop8

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    uint8_t ComSquare::Cartridge::InterruptVectors::cop8[2]
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    ◆ irq

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    uint16_t ComSquare::Cartridge::InterruptVectors::irq
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    ◆ irq8

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    uint8_t ComSquare::Cartridge::InterruptVectors::irq8[2]
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    + +
    +
    + +

    ◆ nmi

    + +
    +
    + + + + +
    uint16_t ComSquare::Cartridge::InterruptVectors::nmi
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    +
    + +

    ◆ nmi8

    + +
    +
    + + + + +
    uint8_t ComSquare::Cartridge::InterruptVectors::nmi8[2]
    +
    + +
    +
    + +

    ◆ reset

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    + + + + +
    uint16_t ComSquare::Cartridge::InterruptVectors::reset
    +
    + +
    +
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    ◆ reset8

    + +
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    + + + + +
    uint8_t ComSquare::Cartridge::InterruptVectors::reset8[2]
    +
    + +
    +
    +
    The documentation for this struct was generated from the following file: +
    + + + + diff --git a/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.map b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.map new file mode 100644 index 0000000..249d4a9 --- /dev/null +++ b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.md5 b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.md5 new file mode 100644 index 0000000..5759210 --- /dev/null +++ b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.md5 @@ -0,0 +1 @@ +2b8069ac752ff09e3c3bfe60a034523d \ No newline at end of file diff --git a/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.png b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.png new file mode 100644 index 0000000..f20faa2 Binary files /dev/null and b/docs/html/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.png differ diff --git a/docs/html/structComSquare_1_1SNES-members.html b/docs/html/structComSquare_1_1SNES-members.html new file mode 100644 index 0000000..80263a7 --- /dev/null +++ b/docs/html/structComSquare_1_1SNES-members.html @@ -0,0 +1,89 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
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    ComSquare +
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    +
    +
    ComSquare::SNES Member List
    +
    +
    + +

    This is the complete list of members for ComSquare::SNES, including all inherited members.

    + + + + + + + +
    apuComSquare::SNES
    cartridgeComSquare::SNES
    cpuComSquare::SNES
    ppuComSquare::SNES
    SNES(const std::shared_ptr< Memory::MemoryBus > &bus, const std::string &ramPath)ComSquare::SNES
    wramComSquare::SNES
    + + + + diff --git a/docs/html/structComSquare_1_1SNES.html b/docs/html/structComSquare_1_1SNES.html new file mode 100644 index 0000000..937b1f5 --- /dev/null +++ b/docs/html/structComSquare_1_1SNES.html @@ -0,0 +1,225 @@ + + + + + + + +ComSquare: ComSquare::SNES Struct Reference + + + + + + + + + +
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    ComSquare::SNES Struct Reference
    +
    +
    + +

    Container of all the components of the SNES. + More...

    + +

    #include <SNES.hpp>

    +
    +Collaboration diagram for ComSquare::SNES:
    +
    +
    Collaboration graph
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    +Public Member Functions

     SNES (const std::shared_ptr< Memory::MemoryBus > &bus, const std::string &ramPath)
     Create all the components using a common memory bus for all of them. More...
     
    + + + + + + + + + + + +

    +Public Attributes

    std::shared_ptr< CPU::CPUcpu
     
    std::shared_ptr< PPU::PPUppu
     
    std::shared_ptr< APU::APUapu
     
    std::shared_ptr< Cartridge::Cartridgecartridge
     
    std::shared_ptr< Ram::Ramwram
     
    +

    Detailed Description

    +

    Container of all the components of the SNES.

    +

    Constructor & Destructor Documentation

    + +

    ◆ SNES()

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    +
    + + + + + + + + + + + + + + + + + + +
    ComSquare::SNES::SNES (const std::shared_ptr< Memory::MemoryBus > & bus,
    const std::string & ramPath 
    )
    +
    + +

    Create all the components using a common memory bus for all of them.

    + +
    +
    +

    Member Data Documentation

    + +

    ◆ apu

    + +
    +
    + + + + +
    std::shared_ptr<APU::APU> ComSquare::SNES::apu
    +
    + +
    +
    + +

    ◆ cartridge

    + +
    +
    + + + + +
    std::shared_ptr<Cartridge::Cartridge> ComSquare::SNES::cartridge
    +
    + +
    +
    + +

    ◆ cpu

    + +
    +
    + + + + +
    std::shared_ptr<CPU::CPU> ComSquare::SNES::cpu
    +
    + +
    +
    + +

    ◆ ppu

    + +
    +
    + + + + +
    std::shared_ptr<PPU::PPU> ComSquare::SNES::ppu
    +
    + +
    +
    + +

    ◆ wram

    + +
    +
    + + + + +
    std::shared_ptr<Ram::Ram> ComSquare::SNES::wram
    +
    + +
    +
    +
    The documentation for this struct was generated from the following files: +
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a.highlighted{background:#fff}.sm-dox.sm-vertical a.disabled{background-image:url("tab_b.png")}.sm-dox.sm-vertical a span.sub-arrow{right:8px;top:50%;margin-top:-5px;border-width:5px;border-style:dashed dashed dashed solid;border-color:transparent transparent transparent #555}.sm-dox.sm-vertical>li>ul:before,.sm-dox.sm-vertical>li>ul:after{display:none}.sm-dox.sm-vertical ul a{padding:10px 20px}.sm-dox.sm-vertical ul a:hover,.sm-dox.sm-vertical ul a:focus,.sm-dox.sm-vertical ul a:active,.sm-dox.sm-vertical ul a.highlighted{background:#eee}.sm-dox.sm-vertical ul a.disabled{background:#fff}} \ No newline at end of file diff --git a/docs/html/testCPU_8cpp.html b/docs/html/testCPU_8cpp.html new file mode 100644 index 0000000..7c7a3ab --- /dev/null +++ b/docs/html/testCPU_8cpp.html @@ -0,0 +1,80 @@ + + + + + + + +ComSquare: tests/testCPU.cpp File Reference + + + + + + + + + +
    +
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    +
    ComSquare +
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    +
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    + +
    + + +
    +
    +
    +
    testCPU.cpp File Reference
    +
    +
    +
    + + + + diff --git a/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw-members.html b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw-members.html new file mode 100644 index 0000000..5911fa4 --- /dev/null +++ b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw-members.html @@ -0,0 +1,91 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
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    +
    +
    ComSquare::APU::InternalRegisters::psw Member List
    +
    + + + + + diff --git a/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw.html b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw.html new file mode 100644 index 0000000..0909fa3 --- /dev/null +++ b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw.html @@ -0,0 +1,258 @@ + + + + + + + +ComSquare: ComSquare::APU::InternalRegisters::psw Union Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
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    + +
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    +
    + +
    +
    ComSquare::APU::InternalRegisters::psw Union Reference
    +
    +
    + +

    Program Status Word register. + More...

    + +

    #include <APU.hpp>

    +
    +Collaboration diagram for ComSquare::APU::InternalRegisters::psw:
    +
    +
    Collaboration graph
    + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Attributes

    bool n: 1
     Negative flag. More...
     
    bool v: 1
     Overflow flag. More...
     
    bool p: 1
     Direct page flag. More...
     
    bool b: 1
     Break flag. More...
     
    bool h: 1
     Half carry flag. More...
     
    bool i: 1
     Interrupt enabled flag. More...
     
    bool z: 1
     Zero flag. More...
     
    bool c: 1
     Carry flag. More...
     
    +

    Detailed Description

    +

    Program Status Word register.

    +

    Member Data Documentation

    + +

    ◆ b

    + +
    +
    + + + + +
    bool ComSquare::APU::InternalRegisters::psw::b
    +
    + +

    Break flag.

    + +
    +
    + +

    ◆ c

    + +
    +
    + + + + +
    bool ComSquare::APU::InternalRegisters::psw::c
    +
    + +

    Carry flag.

    + +
    +
    + +

    ◆ h

    + +
    +
    + + + + +
    bool ComSquare::APU::InternalRegisters::psw::h
    +
    + +

    Half carry flag.

    + +
    +
    + +

    ◆ i

    + +
    +
    + + + + +
    bool ComSquare::APU::InternalRegisters::psw::i
    +
    + +

    Interrupt enabled flag.

    + +
    +
    + +

    ◆ n

    + +
    +
    + + + + +
    bool ComSquare::APU::InternalRegisters::psw::n
    +
    + +

    Negative flag.

    + +
    +
    + +

    ◆ p

    + +
    +
    + + + + +
    bool ComSquare::APU::InternalRegisters::psw::p
    +
    + +

    Direct page flag.

    + +
    +
    + +

    ◆ v

    + +
    +
    + + + + +
    bool ComSquare::APU::InternalRegisters::psw::v
    +
    + +

    Overflow flag.

    + +
    +
    + +

    ◆ z

    + +
    +
    + + + + +
    bool ComSquare::APU::InternalRegisters::psw::z
    +
    + +

    Zero flag.

    + +
    +
    +
    The documentation for this union was generated from the following file: +
    + + + + diff --git a/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.map b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.map new file mode 100644 index 0000000..b02ffa7 --- /dev/null +++ b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.md5 b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.md5 new file mode 100644 index 0000000..43ab149 --- /dev/null +++ b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.md5 @@ -0,0 +1 @@ +686ec89da339fdad6e6d5ff04ebffd6a \ No newline at end of file diff --git a/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.png b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.png new file mode 100644 index 0000000..874784a Binary files /dev/null and b/docs/html/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.png differ diff --git a/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p-members.html b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p-members.html new file mode 100644 index 0000000..23668df --- /dev/null +++ b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p-members.html @@ -0,0 +1,92 @@ + + + + + + + +ComSquare: Member List + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + + +
    +
    +
    +
    ComSquare::CPU::Registers::p Member List
    +
    + + + + + diff --git a/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p.html b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p.html new file mode 100644 index 0000000..d193537 --- /dev/null +++ b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p.html @@ -0,0 +1,294 @@ + + + + + + + +ComSquare: ComSquare::CPU::Registers::p Union Reference + + + + + + + + + +
    +
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    ComSquare +
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    + +
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    +
    + +
    +
    ComSquare::CPU::Registers::p Union Reference
    +
    +
    + +

    The Processor status register;. + More...

    + +

    #include <CPU.hpp>

    +
    +Collaboration diagram for ComSquare::CPU::Registers::p:
    +
    +
    Collaboration graph
    + + + +
    + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

    +Public Attributes

    bool n: 1
     The Negative flag. More...
     
    bool v: 1
     The oVerflow flag. More...
     
    bool m: 1
     The accumulator and Memory width flag (in native mode only) More...
     
    union {
       bool   x: 1
     The indeX register width flag (in native mode only) More...
     
       bool   b: 1
     The Break flag (in emulation mode only) More...
     
    }; 
     
    bool d: 1
     The Decimal mode flag. More...
     
    bool i: 1
     The Interrupt disable flag. More...
     
    bool z: 1
     The Zero flag. More...
     
    bool c: 1
     The Carry flag. More...
     
    +

    Detailed Description

    +

    The Processor status register;.

    +

    Member Data Documentation

    + +

    ◆ @51

    + +
    +
    + + + + +
    union { ... }
    +
    + +
    +
    + +

    ◆ b

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::b
    +
    + +

    The Break flag (in emulation mode only)

    + +
    +
    + +

    ◆ c

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::c
    +
    + +

    The Carry flag.

    + +
    +
    + +

    ◆ d

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::d
    +
    + +

    The Decimal mode flag.

    + +
    +
    + +

    ◆ i

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::i
    +
    + +

    The Interrupt disable flag.

    + +
    +
    + +

    ◆ m

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::m
    +
    + +

    The accumulator and Memory width flag (in native mode only)

    + +
    +
    + +

    ◆ n

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::n
    +
    + +

    The Negative flag.

    + +
    +
    + +

    ◆ v

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::v
    +
    + +

    The oVerflow flag.

    + +
    +
    + +

    ◆ x

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::x
    +
    + +

    The indeX register width flag (in native mode only)

    + +
    +
    + +

    ◆ z

    + +
    +
    + + + + +
    bool ComSquare::CPU::Registers::p::z
    +
    + +

    The Zero flag.

    + +
    +
    +
    The documentation for this union was generated from the following file: +
    + + + + diff --git a/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.map b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.map new file mode 100644 index 0000000..9386a07 --- /dev/null +++ b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.map @@ -0,0 +1,3 @@ + + + diff --git a/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.md5 b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.md5 new file mode 100644 index 0000000..170a009 --- /dev/null +++ b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.md5 @@ -0,0 +1 @@ +f97df3f14a9b2437c7f7293dedae63cc \ No newline at end of file diff --git a/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.png b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.png new file mode 100644 index 0000000..9765b20 Binary files /dev/null and b/docs/html/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.png differ diff --git a/docs/html/unit__tests_8dir_2link_8txt.html b/docs/html/unit__tests_8dir_2link_8txt.html new file mode 100644 index 0000000..4c47793 --- /dev/null +++ b/docs/html/unit__tests_8dir_2link_8txt.html @@ -0,0 +1,76 @@ + + + + + + + +ComSquare: cmake-build-debug/CMakeFiles/unit_tests.dir/link.txt File Reference + + + + + + + + + +
    +
    + + + + + + +
    +
    ComSquare +
    +
    +
    + + + + + + + + +
    +
    + + +
    + +
    + +
    +
    +
    +
    cmake-build-debug/CMakeFiles/unit_tests.dir/link.txt File Reference
    +
    +
    +
    + + + + diff --git a/docs/latex/APU_8cpp.tex b/docs/latex/APU_8cpp.tex new file mode 100644 index 0000000..b702bb0 --- /dev/null +++ b/docs/latex/APU_8cpp.tex @@ -0,0 +1,20 @@ +\hypertarget{APU_8cpp}{}\doxysection{sources/\+A\+P\+U/\+A\+PU.cpp File Reference} +\label{APU_8cpp}\index{sources/APU/APU.cpp@{sources/APU/APU.cpp}} +{\ttfamily \#include \char`\"{}A\+P\+U.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Not\+Implemented\+Exception.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Address.\+hpp\char`\"{}}\newline +Include dependency graph for A\+P\+U.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{APU_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1APU}{Com\+Square\+::\+A\+PU}} +\end{DoxyCompactItemize} diff --git a/docs/latex/APU_8cpp__incl.md5 b/docs/latex/APU_8cpp__incl.md5 new file mode 100644 index 0000000..acbe1aa --- /dev/null +++ b/docs/latex/APU_8cpp__incl.md5 @@ -0,0 +1 @@ +505ee4baaafbad61aaee8f989335d1d0 \ No newline at end of file diff --git a/docs/latex/APU_8cpp__incl.pdf b/docs/latex/APU_8cpp__incl.pdf new file mode 100644 index 0000000..b1fb790 Binary files /dev/null and b/docs/latex/APU_8cpp__incl.pdf differ diff --git a/docs/latex/APU_8hpp.tex b/docs/latex/APU_8hpp.tex new file mode 100644 index 0000000..269c3f4 --- /dev/null +++ b/docs/latex/APU_8hpp.tex @@ -0,0 +1,39 @@ +\hypertarget{APU_8hpp}{}\doxysection{sources/\+A\+P\+U/\+A\+PU.hpp File Reference} +\label{APU_8hpp}\index{sources/APU/APU.hpp@{sources/APU/APU.hpp}} +{\ttfamily \#include $<$memory$>$}\newline +{\ttfamily \#include \char`\"{}../\+D\+S\+P/\+D\+S\+P.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Memory/\+I\+Memory.\+hpp\char`\"{}}\newline +Include dependency graph for A\+P\+U.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{APU_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{APU_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +struct \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters}{Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers}} +\item +union \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}{Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw}} +\begin{DoxyCompactList}\small\item\em Program Status Word register. \end{DoxyCompactList}\item +struct \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers}{Com\+Square\+::\+A\+P\+U\+::\+Registers}} +\item +class \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{Com\+Square\+::\+A\+P\+U\+::\+A\+PU}} +\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1APU}{Com\+Square\+::\+A\+PU}} +\end{DoxyCompactItemize} diff --git a/docs/latex/APU_8hpp__dep__incl.md5 b/docs/latex/APU_8hpp__dep__incl.md5 new file mode 100644 index 0000000..b99f31e --- /dev/null +++ b/docs/latex/APU_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +2aa8cfd166a22888316ca6994db2f939 \ No newline at end of file diff --git a/docs/latex/APU_8hpp__dep__incl.pdf b/docs/latex/APU_8hpp__dep__incl.pdf new file mode 100644 index 0000000..3d36525 Binary files /dev/null and b/docs/latex/APU_8hpp__dep__incl.pdf differ diff --git a/docs/latex/APU_8hpp__incl.md5 b/docs/latex/APU_8hpp__incl.md5 new file mode 100644 index 0000000..e8f6a0e --- /dev/null +++ b/docs/latex/APU_8hpp__incl.md5 @@ -0,0 +1 @@ +9b0bc1618c8d2681133f6cceba884364 \ No newline at end of file diff --git a/docs/latex/APU_8hpp__incl.pdf b/docs/latex/APU_8hpp__incl.pdf new file mode 100644 index 0000000..0880645 Binary files /dev/null and b/docs/latex/APU_8hpp__incl.pdf differ diff --git a/docs/latex/CMakeCCompilerId_8c.tex b/docs/latex/CMakeCCompilerId_8c.tex new file mode 100644 index 0000000..ecb4d7c --- /dev/null +++ b/docs/latex/CMakeCCompilerId_8c.tex @@ -0,0 +1,154 @@ +\hypertarget{CMakeCCompilerId_8c}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/3.15.3/\+Compiler\+Id\+C/\+C\+Make\+C\+Compiler\+Id.c File Reference} +\label{CMakeCCompilerId_8c}\index{cmake-\/build-\/debug/CMakeFiles/3.15.3/CompilerIdC/CMakeCCompilerId.c@{cmake-\/build-\/debug/CMakeFiles/3.15.3/CompilerIdC/CMakeCCompilerId.c}} +\doxysubsection*{Macros} +\begin{DoxyCompactItemize} +\item +\#define \mbox{\hyperlink{CMakeCCompilerId_8c_a81dee0709ded976b2e0319239f72d174}{C\+O\+M\+P\+I\+L\+E\+R\+\_\+\+ID}}~\char`\"{}\char`\"{} +\item +\#define \mbox{\hyperlink{CMakeCCompilerId_8c_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}{S\+T\+R\+I\+N\+G\+I\+F\+Y\+\_\+\+H\+E\+L\+P\+ER}}(X)~\#X +\item +\#define \mbox{\hyperlink{CMakeCCompilerId_8c_a43e1cad902b6477bec893cb6430bd6c8}{S\+T\+R\+I\+N\+G\+I\+FY}}(X)~\mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}{S\+T\+R\+I\+N\+G\+I\+F\+Y\+\_\+\+H\+E\+L\+P\+ER}}(X) +\item +\#define \mbox{\hyperlink{CMakeCCompilerId_8c_adbc5372f40838899018fadbc89bd588b}{P\+L\+A\+T\+F\+O\+R\+M\+\_\+\+ID}} +\item +\#define \mbox{\hyperlink{CMakeCCompilerId_8c_aba35d0d200deaeb06aee95ca297acb28}{A\+R\+C\+H\+I\+T\+E\+C\+T\+U\+R\+E\+\_\+\+ID}} +\item +\#define \mbox{\hyperlink{CMakeCCompilerId_8c_ad1280362da42492bbc11aa78cbf776ad}{D\+EC}}(n) +\item +\#define \mbox{\hyperlink{CMakeCCompilerId_8c_a46d5d95daa1bef867bd0179594310ed5}{H\+EX}}(n) +\item +\#define \mbox{\hyperlink{CMakeCCompilerId_8c_a07f8e5783674099cd7f5110e22a78cdb}{C\+\_\+\+D\+I\+A\+L\+E\+CT}} +\end{DoxyCompactItemize} +\doxysubsection*{Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} \mbox{\hyperlink{CMakeCCompilerId_8c_a0ddf1224851353fc92bfbff6f499fa97}{main}} (\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} argc, \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$argv\mbox{[}$\,$\mbox{]}) +\end{DoxyCompactItemize} +\doxysubsection*{Variables} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const $\ast$ \mbox{\hyperlink{CMakeCCompilerId_8c_a4b0efeb7a5d59313986b3a0390f050f6}{info\+\_\+compiler}} = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}compiler\mbox{[}\char`\"{} C\+O\+M\+P\+I\+L\+E\+R\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{} +\item +\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const $\ast$ \mbox{\hyperlink{CMakeCCompilerId_8c_a2321403dee54ee23f0c2fa849c60f7d4}{info\+\_\+platform}} = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}platform\mbox{[}\char`\"{} P\+L\+A\+T\+F\+O\+R\+M\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{} +\item +\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const $\ast$ \mbox{\hyperlink{CMakeCCompilerId_8c_a59647e99d304ed33b15cb284c27ed391}{info\+\_\+arch}} = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}arch\mbox{[}\char`\"{} A\+R\+C\+H\+I\+T\+E\+C\+T\+U\+R\+E\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{} +\item +const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$ \mbox{\hyperlink{CMakeCCompilerId_8c_a1ce162bad2fe6966ac8b33cc19e120b8}{info\+\_\+language\+\_\+dialect\+\_\+default}} +\end{DoxyCompactItemize} + + +\doxysubsection{Macro Definition Documentation} +\mbox{\Hypertarget{CMakeCCompilerId_8c_aba35d0d200deaeb06aee95ca297acb28}\label{CMakeCCompilerId_8c_aba35d0d200deaeb06aee95ca297acb28}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!ARCHITECTURE\_ID@{ARCHITECTURE\_ID}} +\index{ARCHITECTURE\_ID@{ARCHITECTURE\_ID}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{ARCHITECTURE\_ID}{ARCHITECTURE\_ID}} +{\footnotesize\ttfamily \#define A\+R\+C\+H\+I\+T\+E\+C\+T\+U\+R\+E\+\_\+\+ID} + +\mbox{\Hypertarget{CMakeCCompilerId_8c_a07f8e5783674099cd7f5110e22a78cdb}\label{CMakeCCompilerId_8c_a07f8e5783674099cd7f5110e22a78cdb}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!C\_DIALECT@{C\_DIALECT}} +\index{C\_DIALECT@{C\_DIALECT}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{C\_DIALECT}{C\_DIALECT}} +{\footnotesize\ttfamily \#define C\+\_\+\+D\+I\+A\+L\+E\+CT} + +\mbox{\Hypertarget{CMakeCCompilerId_8c_a81dee0709ded976b2e0319239f72d174}\label{CMakeCCompilerId_8c_a81dee0709ded976b2e0319239f72d174}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!COMPILER\_ID@{COMPILER\_ID}} +\index{COMPILER\_ID@{COMPILER\_ID}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{COMPILER\_ID}{COMPILER\_ID}} +{\footnotesize\ttfamily \#define C\+O\+M\+P\+I\+L\+E\+R\+\_\+\+ID~\char`\"{}\char`\"{}} + +\mbox{\Hypertarget{CMakeCCompilerId_8c_ad1280362da42492bbc11aa78cbf776ad}\label{CMakeCCompilerId_8c_ad1280362da42492bbc11aa78cbf776ad}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!DEC@{DEC}} +\index{DEC@{DEC}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{DEC}{DEC}} +{\footnotesize\ttfamily \#define D\+EC(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})} + +{\bfseries Value\+:} +\begin{DoxyCode}{0} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 10000000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 1000000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 100000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 10000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 1000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 100)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 10)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n) \% 10))} + +\end{DoxyCode} +\mbox{\Hypertarget{CMakeCCompilerId_8c_a46d5d95daa1bef867bd0179594310ed5}\label{CMakeCCompilerId_8c_a46d5d95daa1bef867bd0179594310ed5}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!HEX@{HEX}} +\index{HEX@{HEX}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{HEX}{HEX}} +{\footnotesize\ttfamily \#define H\+EX(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})} + +{\bfseries Value\+:} +\begin{DoxyCode}{0} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>28 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>24 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>20 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>16 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>12 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>8 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>4 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n) \& 0xF))} + +\end{DoxyCode} +\mbox{\Hypertarget{CMakeCCompilerId_8c_adbc5372f40838899018fadbc89bd588b}\label{CMakeCCompilerId_8c_adbc5372f40838899018fadbc89bd588b}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!PLATFORM\_ID@{PLATFORM\_ID}} +\index{PLATFORM\_ID@{PLATFORM\_ID}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{PLATFORM\_ID}{PLATFORM\_ID}} +{\footnotesize\ttfamily \#define P\+L\+A\+T\+F\+O\+R\+M\+\_\+\+ID} + +\mbox{\Hypertarget{CMakeCCompilerId_8c_a43e1cad902b6477bec893cb6430bd6c8}\label{CMakeCCompilerId_8c_a43e1cad902b6477bec893cb6430bd6c8}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!STRINGIFY@{STRINGIFY}} +\index{STRINGIFY@{STRINGIFY}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{STRINGIFY}{STRINGIFY}} +{\footnotesize\ttfamily \#define S\+T\+R\+I\+N\+G\+I\+FY(\begin{DoxyParamCaption}\item[{}]{X }\end{DoxyParamCaption})~\mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}{S\+T\+R\+I\+N\+G\+I\+F\+Y\+\_\+\+H\+E\+L\+P\+ER}}(X)} + +\mbox{\Hypertarget{CMakeCCompilerId_8c_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}\label{CMakeCCompilerId_8c_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!STRINGIFY\_HELPER@{STRINGIFY\_HELPER}} +\index{STRINGIFY\_HELPER@{STRINGIFY\_HELPER}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{STRINGIFY\_HELPER}{STRINGIFY\_HELPER}} +{\footnotesize\ttfamily \#define S\+T\+R\+I\+N\+G\+I\+F\+Y\+\_\+\+H\+E\+L\+P\+ER(\begin{DoxyParamCaption}\item[{}]{X }\end{DoxyParamCaption})~\#X} + + + +\doxysubsection{Function Documentation} +\mbox{\Hypertarget{CMakeCCompilerId_8c_a0ddf1224851353fc92bfbff6f499fa97}\label{CMakeCCompilerId_8c_a0ddf1224851353fc92bfbff6f499fa97}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!main@{main}} +\index{main@{main}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{main()}{main()}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} main (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{argc, }\item[{\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$}]{argv\mbox{[}$\,$\mbox{]} }\end{DoxyParamCaption})} + + + +\doxysubsection{Variable Documentation} +\mbox{\Hypertarget{CMakeCCompilerId_8c_a59647e99d304ed33b15cb284c27ed391}\label{CMakeCCompilerId_8c_a59647e99d304ed33b15cb284c27ed391}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!info\_arch@{info\_arch}} +\index{info\_arch@{info\_arch}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{info\_arch}{info\_arch}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const$\ast$ info\+\_\+arch = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}arch\mbox{[}\char`\"{} A\+R\+C\+H\+I\+T\+E\+C\+T\+U\+R\+E\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{}} + +\mbox{\Hypertarget{CMakeCCompilerId_8c_a4b0efeb7a5d59313986b3a0390f050f6}\label{CMakeCCompilerId_8c_a4b0efeb7a5d59313986b3a0390f050f6}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!info\_compiler@{info\_compiler}} +\index{info\_compiler@{info\_compiler}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{info\_compiler}{info\_compiler}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const$\ast$ info\+\_\+compiler = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}compiler\mbox{[}\char`\"{} C\+O\+M\+P\+I\+L\+E\+R\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{}} + +\mbox{\Hypertarget{CMakeCCompilerId_8c_a1ce162bad2fe6966ac8b33cc19e120b8}\label{CMakeCCompilerId_8c_a1ce162bad2fe6966ac8b33cc19e120b8}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!info\_language\_dialect\_default@{info\_language\_dialect\_default}} +\index{info\_language\_dialect\_default@{info\_language\_dialect\_default}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{info\_language\_dialect\_default}{info\_language\_dialect\_default}} +{\footnotesize\ttfamily const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}}$\ast$ info\+\_\+language\+\_\+dialect\+\_\+default} + +{\bfseries Initial value\+:} +\begin{DoxyCode}{0} +\DoxyCodeLine{=} +\DoxyCodeLine{ \textcolor{stringliteral}{"INFO"} \textcolor{stringliteral}{":"} \textcolor{stringliteral}{"dialect\_default["} \mbox{\hyperlink{CMakeCCompilerId_8c_a07f8e5783674099cd7f5110e22a78cdb}{C\_DIALECT}} \textcolor{stringliteral}{"]"}} + +\end{DoxyCode} +\mbox{\Hypertarget{CMakeCCompilerId_8c_a2321403dee54ee23f0c2fa849c60f7d4}\label{CMakeCCompilerId_8c_a2321403dee54ee23f0c2fa849c60f7d4}} +\index{CMakeCCompilerId.c@{CMakeCCompilerId.c}!info\_platform@{info\_platform}} +\index{info\_platform@{info\_platform}!CMakeCCompilerId.c@{CMakeCCompilerId.c}} +\doxysubsubsection{\texorpdfstring{info\_platform}{info\_platform}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const$\ast$ info\+\_\+platform = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}platform\mbox{[}\char`\"{} P\+L\+A\+T\+F\+O\+R\+M\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{}} + diff --git a/docs/latex/CMakeCXXCompilerId_8cpp.tex b/docs/latex/CMakeCXXCompilerId_8cpp.tex new file mode 100644 index 0000000..2e22f83 --- /dev/null +++ b/docs/latex/CMakeCXXCompilerId_8cpp.tex @@ -0,0 +1,165 @@ +\hypertarget{CMakeCXXCompilerId_8cpp}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/3.15.3/\+Compiler\+Id\+C\+X\+X/\+C\+Make\+C\+X\+X\+Compiler\+Id.cpp File Reference} +\label{CMakeCXXCompilerId_8cpp}\index{cmake-\/build-\/debug/CMakeFiles/3.15.3/CompilerIdCXX/CMakeCXXCompilerId.cpp@{cmake-\/build-\/debug/CMakeFiles/3.15.3/CompilerIdCXX/CMakeCXXCompilerId.cpp}} +\doxysubsection*{Macros} +\begin{DoxyCompactItemize} +\item +\#define \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a81dee0709ded976b2e0319239f72d174}{C\+O\+M\+P\+I\+L\+E\+R\+\_\+\+ID}}~\char`\"{}\char`\"{} +\item +\#define \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}{S\+T\+R\+I\+N\+G\+I\+F\+Y\+\_\+\+H\+E\+L\+P\+ER}}(X)~\#X +\item +\#define \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a43e1cad902b6477bec893cb6430bd6c8}{S\+T\+R\+I\+N\+G\+I\+FY}}(X)~\mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}{S\+T\+R\+I\+N\+G\+I\+F\+Y\+\_\+\+H\+E\+L\+P\+ER}}(X) +\item +\#define \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_adbc5372f40838899018fadbc89bd588b}{P\+L\+A\+T\+F\+O\+R\+M\+\_\+\+ID}} +\item +\#define \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_aba35d0d200deaeb06aee95ca297acb28}{A\+R\+C\+H\+I\+T\+E\+C\+T\+U\+R\+E\+\_\+\+ID}} +\item +\#define \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_ad1280362da42492bbc11aa78cbf776ad}{D\+EC}}(n) +\item +\#define \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a46d5d95daa1bef867bd0179594310ed5}{H\+EX}}(n) +\item +\#define \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a34cc889e576a1ae6c84ae9e0a851ba21}{C\+X\+X\+\_\+\+S\+TD}}~\+\_\+\+\_\+cplusplus +\end{DoxyCompactItemize} +\doxysubsection*{Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a0ddf1224851353fc92bfbff6f499fa97}{main}} (\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} argc, \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$argv\mbox{[}$\,$\mbox{]}) +\end{DoxyCompactItemize} +\doxysubsection*{Variables} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const $\ast$ \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a4b0efeb7a5d59313986b3a0390f050f6}{info\+\_\+compiler}} = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}compiler\mbox{[}\char`\"{} C\+O\+M\+P\+I\+L\+E\+R\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{} +\item +\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const $\ast$ \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a2321403dee54ee23f0c2fa849c60f7d4}{info\+\_\+platform}} = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}platform\mbox{[}\char`\"{} P\+L\+A\+T\+F\+O\+R\+M\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{} +\item +\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const $\ast$ \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a59647e99d304ed33b15cb284c27ed391}{info\+\_\+arch}} = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}arch\mbox{[}\char`\"{} A\+R\+C\+H\+I\+T\+E\+C\+T\+U\+R\+E\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{} +\item +const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$ \mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a1ce162bad2fe6966ac8b33cc19e120b8}{info\+\_\+language\+\_\+dialect\+\_\+default}} +\end{DoxyCompactItemize} + + +\doxysubsection{Macro Definition Documentation} +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_aba35d0d200deaeb06aee95ca297acb28}\label{CMakeCXXCompilerId_8cpp_aba35d0d200deaeb06aee95ca297acb28}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!ARCHITECTURE\_ID@{ARCHITECTURE\_ID}} +\index{ARCHITECTURE\_ID@{ARCHITECTURE\_ID}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{ARCHITECTURE\_ID}{ARCHITECTURE\_ID}} +{\footnotesize\ttfamily \#define A\+R\+C\+H\+I\+T\+E\+C\+T\+U\+R\+E\+\_\+\+ID} + +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_a81dee0709ded976b2e0319239f72d174}\label{CMakeCXXCompilerId_8cpp_a81dee0709ded976b2e0319239f72d174}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!COMPILER\_ID@{COMPILER\_ID}} +\index{COMPILER\_ID@{COMPILER\_ID}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{COMPILER\_ID}{COMPILER\_ID}} +{\footnotesize\ttfamily \#define C\+O\+M\+P\+I\+L\+E\+R\+\_\+\+ID~\char`\"{}\char`\"{}} + +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_a34cc889e576a1ae6c84ae9e0a851ba21}\label{CMakeCXXCompilerId_8cpp_a34cc889e576a1ae6c84ae9e0a851ba21}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!CXX\_STD@{CXX\_STD}} +\index{CXX\_STD@{CXX\_STD}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{CXX\_STD}{CXX\_STD}} +{\footnotesize\ttfamily \#define C\+X\+X\+\_\+\+S\+TD~\+\_\+\+\_\+cplusplus} + +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_ad1280362da42492bbc11aa78cbf776ad}\label{CMakeCXXCompilerId_8cpp_ad1280362da42492bbc11aa78cbf776ad}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!DEC@{DEC}} +\index{DEC@{DEC}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{DEC}{DEC}} +{\footnotesize\ttfamily \#define D\+EC(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})} + +{\bfseries Value\+:} +\begin{DoxyCode}{0} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 10000000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 1000000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 100000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 10000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 1000)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 100)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + (((n) / 10)\%10)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n) \% 10))} + +\end{DoxyCode} +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_a46d5d95daa1bef867bd0179594310ed5}\label{CMakeCXXCompilerId_8cpp_a46d5d95daa1bef867bd0179594310ed5}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!HEX@{HEX}} +\index{HEX@{HEX}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{HEX}{HEX}} +{\footnotesize\ttfamily \#define H\+EX(\begin{DoxyParamCaption}\item[{}]{n }\end{DoxyParamCaption})} + +{\bfseries Value\+:} +\begin{DoxyCode}{0} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>28 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>24 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>20 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>16 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>12 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>8 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n)>>4 \& 0xF)), \(\backslash\)} +\DoxyCodeLine{ (\textcolor{charliteral}{'0'} + ((n) \& 0xF))} + +\end{DoxyCode} +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_adbc5372f40838899018fadbc89bd588b}\label{CMakeCXXCompilerId_8cpp_adbc5372f40838899018fadbc89bd588b}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!PLATFORM\_ID@{PLATFORM\_ID}} +\index{PLATFORM\_ID@{PLATFORM\_ID}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{PLATFORM\_ID}{PLATFORM\_ID}} +{\footnotesize\ttfamily \#define P\+L\+A\+T\+F\+O\+R\+M\+\_\+\+ID} + +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_a43e1cad902b6477bec893cb6430bd6c8}\label{CMakeCXXCompilerId_8cpp_a43e1cad902b6477bec893cb6430bd6c8}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!STRINGIFY@{STRINGIFY}} +\index{STRINGIFY@{STRINGIFY}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{STRINGIFY}{STRINGIFY}} +{\footnotesize\ttfamily \#define S\+T\+R\+I\+N\+G\+I\+FY(\begin{DoxyParamCaption}\item[{}]{X }\end{DoxyParamCaption})~\mbox{\hyperlink{CMakeCXXCompilerId_8cpp_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}{S\+T\+R\+I\+N\+G\+I\+F\+Y\+\_\+\+H\+E\+L\+P\+ER}}(X)} + +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}\label{CMakeCXXCompilerId_8cpp_a2ae9b72bb13abaabfcf2ee0ba7d3fa1d}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!STRINGIFY\_HELPER@{STRINGIFY\_HELPER}} +\index{STRINGIFY\_HELPER@{STRINGIFY\_HELPER}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{STRINGIFY\_HELPER}{STRINGIFY\_HELPER}} +{\footnotesize\ttfamily \#define S\+T\+R\+I\+N\+G\+I\+F\+Y\+\_\+\+H\+E\+L\+P\+ER(\begin{DoxyParamCaption}\item[{}]{X }\end{DoxyParamCaption})~\#X} + + + +\doxysubsection{Function Documentation} +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_a0ddf1224851353fc92bfbff6f499fa97}\label{CMakeCXXCompilerId_8cpp_a0ddf1224851353fc92bfbff6f499fa97}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!main@{main}} +\index{main@{main}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{main()}{main()}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} main (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{argc, }\item[{\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$}]{argv\mbox{[}$\,$\mbox{]} }\end{DoxyParamCaption})} + + + +\doxysubsection{Variable Documentation} +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_a59647e99d304ed33b15cb284c27ed391}\label{CMakeCXXCompilerId_8cpp_a59647e99d304ed33b15cb284c27ed391}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!info\_arch@{info\_arch}} +\index{info\_arch@{info\_arch}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{info\_arch}{info\_arch}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const$\ast$ info\+\_\+arch = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}arch\mbox{[}\char`\"{} A\+R\+C\+H\+I\+T\+E\+C\+T\+U\+R\+E\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{}} + 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+\index{info\_language\_dialect\_default@{info\_language\_dialect\_default}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{info\_language\_dialect\_default}{info\_language\_dialect\_default}} +{\footnotesize\ttfamily const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}}$\ast$ info\+\_\+language\+\_\+dialect\+\_\+default} + +{\bfseries Initial value\+:} +\begin{DoxyCode}{0} +\DoxyCodeLine{= \textcolor{stringliteral}{"INFO"} \textcolor{stringliteral}{":"} \textcolor{stringliteral}{"dialect\_default["}} +\DoxyCodeLine{} +\DoxyCodeLine{} +\DoxyCodeLine{} +\DoxyCodeLine{} +\DoxyCodeLine{} +\DoxyCodeLine{} +\DoxyCodeLine{} +\DoxyCodeLine{} +\DoxyCodeLine{} +\DoxyCodeLine{ \textcolor{stringliteral}{"98"}} +\DoxyCodeLine{} +\DoxyCodeLine{\textcolor{stringliteral}{"]"}} + +\end{DoxyCode} +\mbox{\Hypertarget{CMakeCXXCompilerId_8cpp_a2321403dee54ee23f0c2fa849c60f7d4}\label{CMakeCXXCompilerId_8cpp_a2321403dee54ee23f0c2fa849c60f7d4}} +\index{CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}!info\_platform@{info\_platform}} +\index{info\_platform@{info\_platform}!CMakeCXXCompilerId.cpp@{CMakeCXXCompilerId.cpp}} +\doxysubsubsection{\texorpdfstring{info\_platform}{info\_platform}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} const$\ast$ info\+\_\+platform = \char`\"{}I\+N\+FO\char`\"{} \char`\"{}\+:\char`\"{} \char`\"{}platform\mbox{[}\char`\"{} P\+L\+A\+T\+F\+O\+R\+M\+\_\+\+ID \char`\"{}\mbox{]}\char`\"{}} + diff --git a/docs/latex/CMakeCache_8txt.tex b/docs/latex/CMakeCache_8txt.tex new file mode 100644 index 0000000..e330141 --- /dev/null +++ b/docs/latex/CMakeCache_8txt.tex @@ -0,0 +1,886 @@ +\hypertarget{CMakeCache_8txt}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Cache.txt File Reference} +\label{CMakeCache_8txt}\index{cmake-\/build-\/debug/CMakeCache.txt@{cmake-\/build-\/debug/CMakeCache.txt}} +\doxysubsection*{Functions} +\begin{DoxyCompactItemize} +\item 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\mbox{\hyperlink{CMakeCache_8txt_a986ccfc90e04633694fe6cff5472be19}{include}} +\item +usr lib gcc x86\+\_\+64 pc linux \mbox{\hyperlink{CMakeCache_8txt_a94494c548a9cfaab513372b19256ebd5}{gnu}} \mbox{\hyperlink{CMakeCache_8txt_a986ccfc90e04633694fe6cff5472be19}{include}} \mbox{\hyperlink{CMakeCache_8txt_a875e0bccbbd97e552845299053681d31}{fixed}} +\item +usr \mbox{\hyperlink{CMakeCache_8txt_a986ccfc90e04633694fe6cff5472be19}{include}} \mbox{\hyperlink{CMakeCache_8txt_ab210976cb9b88cff4b84f82940881802}{C\+M\+A\+K\+E\+\_\+\+E\+X\+T\+R\+A\+\_\+\+G\+E\+N\+E\+R\+A\+T\+O\+R\+\_\+\+C\+\_\+\+S\+Y\+S\+T\+E\+M\+\_\+\+D\+E\+F\+I\+N\+E\+D\+\_\+\+M\+A\+C\+R\+OS}} +\item +c \mbox{\hyperlink{CMakeCache_8txt_ad56d00d3d7b282aa4096d39b0f15746c}{C\+M\+A\+K\+E\+\_\+\+E\+X\+T\+R\+A\+\_\+\+G\+E\+N\+E\+R\+A\+T\+O\+R\+\_\+\+C\+\_\+\+S\+Y\+S\+T\+E\+M\+\_\+\+I\+N\+C\+L\+U\+D\+E\+\_\+\+D\+I\+RS}} +\end{DoxyCompactItemize} + + +\doxysubsection{Function Documentation} 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+\doxysubsubsection{\texorpdfstring{fixed}{fixed}} +{\footnotesize\ttfamily usr lib gcc x86\+\_\+64 pc linux \mbox{\hyperlink{CMakeCache_8txt_a94494c548a9cfaab513372b19256ebd5}{gnu}} \mbox{\hyperlink{CMakeCache_8txt_a986ccfc90e04633694fe6cff5472be19}{include}} fixed} + +\mbox{\Hypertarget{CMakeCache_8txt_a94494c548a9cfaab513372b19256ebd5}\label{CMakeCache_8txt_a94494c548a9cfaab513372b19256ebd5}} +\index{CMakeCache.txt@{CMakeCache.txt}!gnu@{gnu}} +\index{gnu@{gnu}!CMakeCache.txt@{CMakeCache.txt}} +\doxysubsubsection{\texorpdfstring{gnu}{gnu}} +{\footnotesize\ttfamily usr lib gcc x86\+\_\+64 pc linux gnu \mbox{\hyperlink{CMakeCache_8txt_a986ccfc90e04633694fe6cff5472be19}{include}} c x86\+\_\+64 pc linux gnu} + +\mbox{\Hypertarget{CMakeCache_8txt_a986ccfc90e04633694fe6cff5472be19}\label{CMakeCache_8txt_a986ccfc90e04633694fe6cff5472be19}} +\index{CMakeCache.txt@{CMakeCache.txt}!include@{include}} +\index{include@{include}!CMakeCache.txt@{CMakeCache.txt}} +\doxysubsubsection{\texorpdfstring{include}{include}} +{\footnotesize\ttfamily usr local include} + +\mbox{\Hypertarget{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}\label{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}} +\index{CMakeCache.txt@{CMakeCache.txt}!int@{int}} +\index{int@{int}!CMakeCache.txt@{CMakeCache.txt}} +\doxysubsubsection{\texorpdfstring{int}{int}} +{\footnotesize\ttfamily long unsigned int} + diff --git a/docs/latex/CMakeLists_8txt.tex b/docs/latex/CMakeLists_8txt.tex new file mode 100644 index 0000000..c941e35 --- /dev/null +++ b/docs/latex/CMakeLists_8txt.tex @@ -0,0 +1,2 @@ +\hypertarget{CMakeLists_8txt}{}\doxysection{C\+Make\+Lists.\+txt File Reference} +\label{CMakeLists_8txt}\index{CMakeLists.txt@{CMakeLists.txt}} diff --git a/docs/latex/CPU_8cpp.tex b/docs/latex/CPU_8cpp.tex new file mode 100644 index 0000000..682291f --- /dev/null +++ b/docs/latex/CPU_8cpp.tex @@ -0,0 +1,21 @@ +\hypertarget{CPU_8cpp}{}\doxysection{sources/\+C\+P\+U/\+C\+PU.cpp File Reference} +\label{CPU_8cpp}\index{sources/CPU/CPU.cpp@{sources/CPU/CPU.cpp}} +{\ttfamily \#include \char`\"{}C\+P\+U.\+hpp\char`\"{}}\newline +{\ttfamily \#include $<$utility$>$}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Not\+Implemented\+Exception.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Address.\+hpp\char`\"{}}\newline +Include dependency graph for C\+P\+U.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{CPU_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1CPU}{Com\+Square\+::\+C\+PU}} +\end{DoxyCompactItemize} diff --git a/docs/latex/CPU_8cpp__incl.md5 b/docs/latex/CPU_8cpp__incl.md5 new file mode 100644 index 0000000..5ce04c2 --- /dev/null +++ b/docs/latex/CPU_8cpp__incl.md5 @@ -0,0 +1 @@ +23b1440912db8e44916fb0c27ff092fd \ No newline at end of file diff --git a/docs/latex/CPU_8cpp__incl.pdf b/docs/latex/CPU_8cpp__incl.pdf new file mode 100644 index 0000000..e41ea3a Binary files /dev/null and b/docs/latex/CPU_8cpp__incl.pdf differ diff --git a/docs/latex/CPU_8hpp.tex b/docs/latex/CPU_8hpp.tex new file mode 100644 index 0000000..853e96f --- /dev/null +++ b/docs/latex/CPU_8hpp.tex @@ -0,0 +1,39 @@ +\hypertarget{CPU_8hpp}{}\doxysection{sources/\+C\+P\+U/\+C\+PU.hpp File Reference} +\label{CPU_8hpp}\index{sources/CPU/CPU.hpp@{sources/CPU/CPU.hpp}} +{\ttfamily \#include \char`\"{}../\+Memory/\+I\+Memory.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Memory/\+Memory\+Bus.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Models/\+Ints.\+hpp\char`\"{}}\newline +Include dependency graph for C\+P\+U.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{CPU_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{CPU_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +struct \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Com\+Square\+::\+C\+P\+U\+::\+Registers}} +\begin{DoxyCompactList}\small\item\em Struct containing registers for the main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. \end{DoxyCompactList}\item +union \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p}{Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p}} +\begin{DoxyCompactList}\small\item\em The Processor status register;. \end{DoxyCompactList}\item +struct \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters}{Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers}} +\begin{DoxyCompactList}\small\item\em Struct containing internal registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. \end{DoxyCompactList}\item +class \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{Com\+Square\+::\+C\+P\+U\+::\+C\+PU}} +\begin{DoxyCompactList}\small\item\em The main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1CPU}{Com\+Square\+::\+C\+PU}} +\end{DoxyCompactItemize} diff --git a/docs/latex/CPU_8hpp__dep__incl.md5 b/docs/latex/CPU_8hpp__dep__incl.md5 new file mode 100644 index 0000000..d5b0ac1 --- /dev/null +++ b/docs/latex/CPU_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +4555ec3ab59dbc38cc45a53689fd94cd \ No newline at end of file diff --git a/docs/latex/CPU_8hpp__dep__incl.pdf b/docs/latex/CPU_8hpp__dep__incl.pdf new file mode 100644 index 0000000..460ca7f Binary files /dev/null and b/docs/latex/CPU_8hpp__dep__incl.pdf differ diff --git a/docs/latex/CPU_8hpp__incl.md5 b/docs/latex/CPU_8hpp__incl.md5 new file mode 100644 index 0000000..ea93b4f --- /dev/null +++ b/docs/latex/CPU_8hpp__incl.md5 @@ -0,0 +1 @@ +bf3079badeae41ab6631885bd9d35da2 \ No newline at end of file diff --git a/docs/latex/CPU_8hpp__incl.pdf b/docs/latex/CPU_8hpp__incl.pdf new file mode 100644 index 0000000..474829d Binary files /dev/null and b/docs/latex/CPU_8hpp__incl.pdf differ diff --git a/docs/latex/Cartridge_8cpp.tex b/docs/latex/Cartridge_8cpp.tex new file mode 100644 index 0000000..bfd9f93 --- /dev/null +++ b/docs/latex/Cartridge_8cpp.tex @@ -0,0 +1,24 @@ +\hypertarget{Cartridge_8cpp}{}\doxysection{sources/\+Cartridge/\+Cartridge.cpp File Reference} +\label{Cartridge_8cpp}\index{sources/Cartridge/Cartridge.cpp@{sources/Cartridge/Cartridge.cpp}} +{\ttfamily \#include $<$sys/stat.\+h$>$}\newline +{\ttfamily \#include $<$iostream$>$}\newline +{\ttfamily \#include $<$cstring$>$}\newline +{\ttfamily \#include \char`\"{}Cartridge.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Address.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Rom.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Action.\+hpp\char`\"{}}\newline +Include dependency graph for Cartridge.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{Cartridge_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Cartridge}{Com\+Square\+::\+Cartridge}} +\end{DoxyCompactItemize} diff --git a/docs/latex/Cartridge_8cpp__incl.md5 b/docs/latex/Cartridge_8cpp__incl.md5 new file mode 100644 index 0000000..313d71a --- /dev/null +++ b/docs/latex/Cartridge_8cpp__incl.md5 @@ -0,0 +1 @@ +0aee4d221e6246d63d7ac29cce75ca32 \ No newline at end of file diff --git a/docs/latex/Cartridge_8cpp__incl.pdf b/docs/latex/Cartridge_8cpp__incl.pdf new file mode 100644 index 0000000..69ef0f5 Binary files /dev/null and b/docs/latex/Cartridge_8cpp__incl.pdf differ diff --git a/docs/latex/Cartridge_8hpp.tex b/docs/latex/Cartridge_8hpp.tex new file mode 100644 index 0000000..1637f05 --- /dev/null +++ b/docs/latex/Cartridge_8hpp.tex @@ -0,0 +1,63 @@ +\hypertarget{Cartridge_8hpp}{}\doxysection{sources/\+Cartridge/\+Cartridge.hpp File Reference} +\label{Cartridge_8hpp}\index{sources/Cartridge/Cartridge.hpp@{sources/Cartridge/Cartridge.hpp}} +{\ttfamily \#include $<$string$>$}\newline +{\ttfamily \#include \char`\"{}../\+Memory/\+I\+Memory.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Models/\+Ints.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Memory/\+I\+Rectangle\+Memory.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}Interrupt\+Vectors.\+hpp\char`\"{}}\newline +Include dependency graph for Cartridge.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{Cartridge_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{Cartridge_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +struct \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header}{Com\+Square\+::\+Cartridge\+::\+Header}} +\item +class \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge}{Com\+Square\+::\+Cartridge\+::\+Cartridge}} +\begin{DoxyCompactList}\small\item\em Contains the rom\textquotesingle{}s memory/instructions. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Cartridge}{Com\+Square\+::\+Cartridge}} +\end{DoxyCompactItemize} +\doxysubsection*{Macros} +\begin{DoxyCompactItemize} +\item +\#define \mbox{\hyperlink{Cartridge_8hpp_a80eeb0ec0b62466ea8b7980d0bf8c2e8}{A\+D\+D\+M\+A\+P\+P\+I\+N\+G\+M\+O\+DE}}(x, flag)~(x = static\+\_\+cast$<$Mapping\+Mode$>$(x $\vert$ (flag))) +\end{DoxyCompactItemize} +\doxysubsection*{Enumerations} +\begin{DoxyCompactItemize} +\item +enum \mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645}{Com\+Square\+::\+Cartridge\+::\+Mapping\+Mode}} \{ \newline +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645ab06a20291b736bc664f853b77d1f3846}{Com\+Square\+::\+Cartridge\+::\+Lo\+Rom}} = 1u $<$$<$ 0u, +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645a461b515672aec1a8463cda3e05936cdd}{Com\+Square\+::\+Cartridge\+::\+Hi\+Rom}} = 1u $<$$<$ 1u, +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645aa80ac825c99f61aada8b3cbd04952bb6}{Com\+Square\+::\+Cartridge\+::\+Slow\+Rom}} = 1u $<$$<$ 2u, +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645ad5867d09b7b015f54e76780ef508bd64}{Com\+Square\+::\+Cartridge\+::\+Fast\+Rom}} = 1u $<$$<$ 3u, +\newline +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645a48571836eb7c4372c4c5501715a8641d}{Com\+Square\+::\+Cartridge\+::\+Ex\+Rom}} = 1u $<$$<$ 4u + \} +\end{DoxyCompactItemize} + + +\doxysubsection{Macro Definition Documentation} +\mbox{\Hypertarget{Cartridge_8hpp_a80eeb0ec0b62466ea8b7980d0bf8c2e8}\label{Cartridge_8hpp_a80eeb0ec0b62466ea8b7980d0bf8c2e8}} +\index{Cartridge.hpp@{Cartridge.hpp}!ADDMAPPINGMODE@{ADDMAPPINGMODE}} +\index{ADDMAPPINGMODE@{ADDMAPPINGMODE}!Cartridge.hpp@{Cartridge.hpp}} +\doxysubsubsection{\texorpdfstring{ADDMAPPINGMODE}{ADDMAPPINGMODE}} +{\footnotesize\ttfamily \#define A\+D\+D\+M\+A\+P\+P\+I\+N\+G\+M\+O\+DE(\begin{DoxyParamCaption}\item[{}]{x, }\item[{}]{flag }\end{DoxyParamCaption})~(x = static\+\_\+cast$<$Mapping\+Mode$>$(x $\vert$ (flag)))} + diff --git a/docs/latex/Cartridge_8hpp__dep__incl.md5 b/docs/latex/Cartridge_8hpp__dep__incl.md5 new file mode 100644 index 0000000..8ad1f91 --- /dev/null +++ b/docs/latex/Cartridge_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +7b20512af04aa87bb2e5ac93b362371a \ No newline at end of file diff --git a/docs/latex/Cartridge_8hpp__dep__incl.pdf b/docs/latex/Cartridge_8hpp__dep__incl.pdf new file mode 100644 index 0000000..0e7d75a Binary files /dev/null and b/docs/latex/Cartridge_8hpp__dep__incl.pdf differ diff --git a/docs/latex/Cartridge_8hpp__incl.md5 b/docs/latex/Cartridge_8hpp__incl.md5 new file mode 100644 index 0000000..ff16ac0 --- /dev/null +++ b/docs/latex/Cartridge_8hpp__incl.md5 @@ -0,0 +1 @@ +1d22f3938c57c6af953be2a9914baf56 \ No newline at end of file diff --git a/docs/latex/Cartridge_8hpp__incl.pdf b/docs/latex/Cartridge_8hpp__incl.pdf new file mode 100644 index 0000000..1e8ce2c Binary files /dev/null and b/docs/latex/Cartridge_8hpp__incl.pdf differ diff --git a/docs/latex/ComSquare_8dir_2link_8txt.tex b/docs/latex/ComSquare_8dir_2link_8txt.tex new file mode 100644 index 0000000..5c03d65 --- /dev/null +++ b/docs/latex/ComSquare_8dir_2link_8txt.tex @@ -0,0 +1,2 @@ +\hypertarget{ComSquare_8dir_2link_8txt}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/\+Com\+Square.dir/link.txt File Reference} +\label{ComSquare_8dir_2link_8txt}\index{cmake-\/build-\/debug/CMakeFiles/ComSquare.dir/link.txt@{cmake-\/build-\/debug/CMakeFiles/ComSquare.dir/link.txt}} diff --git a/docs/latex/DSP_8cpp.tex b/docs/latex/DSP_8cpp.tex new file mode 100644 index 0000000..b2dfa8c --- /dev/null +++ b/docs/latex/DSP_8cpp.tex @@ -0,0 +1,21 @@ +\hypertarget{DSP_8cpp}{}\doxysection{sources/\+D\+S\+P/\+D\+SP.cpp File Reference} +\label{DSP_8cpp}\index{sources/DSP/DSP.cpp@{sources/DSP/DSP.cpp}} +{\ttfamily \#include \char`\"{}D\+S\+P.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Address.\+hpp\char`\"{}}\newline +Include dependency graph for D\+S\+P.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{DSP_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1APU}{Com\+Square\+::\+A\+PU}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{Com\+Square\+::\+A\+P\+U\+::\+D\+SP}} +\end{DoxyCompactItemize} diff --git a/docs/latex/DSP_8cpp__incl.md5 b/docs/latex/DSP_8cpp__incl.md5 new file mode 100644 index 0000000..a5f54c7 --- /dev/null +++ b/docs/latex/DSP_8cpp__incl.md5 @@ -0,0 +1 @@ +8e48430a6a3f037eecef99ebdc6f5380 \ No newline at end of file diff --git a/docs/latex/DSP_8cpp__incl.pdf b/docs/latex/DSP_8cpp__incl.pdf new file mode 100644 index 0000000..de7e9d7 Binary files /dev/null and b/docs/latex/DSP_8cpp__incl.pdf differ diff --git a/docs/latex/DSP_8hpp.tex b/docs/latex/DSP_8hpp.tex new file mode 100644 index 0000000..6631ff8 --- /dev/null +++ b/docs/latex/DSP_8hpp.tex @@ -0,0 +1,37 @@ +\hypertarget{DSP_8hpp}{}\doxysection{sources/\+D\+S\+P/\+D\+SP.hpp File Reference} +\label{DSP_8hpp}\index{sources/DSP/DSP.hpp@{sources/DSP/DSP.hpp}} +{\ttfamily \#include $<$cstdint$>$}\newline +{\ttfamily \#include $<$S\+F\+M\+L/\+Audio.\+hpp$>$}\newline +{\ttfamily \#include \char`\"{}../\+Memory/\+I\+Memory.\+hpp\char`\"{}}\newline +Include dependency graph for D\+S\+P.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{DSP_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{DSP_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +struct \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers}{Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers}} +\begin{DoxyCompactList}\small\item\em All the registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}}. \end{DoxyCompactList}\item +class \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+SP}} +\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1APU}{Com\+Square\+::\+A\+PU}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{Com\+Square\+::\+A\+P\+U\+::\+D\+SP}} +\end{DoxyCompactItemize} diff --git a/docs/latex/DSP_8hpp__dep__incl.md5 b/docs/latex/DSP_8hpp__dep__incl.md5 new file mode 100644 index 0000000..17085ab --- /dev/null +++ b/docs/latex/DSP_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +12612368f94015881b2f68cd97ad499e \ No newline at end of file diff --git a/docs/latex/DSP_8hpp__dep__incl.pdf b/docs/latex/DSP_8hpp__dep__incl.pdf new file mode 100644 index 0000000..a0733d1 Binary files /dev/null and b/docs/latex/DSP_8hpp__dep__incl.pdf differ diff --git a/docs/latex/DSP_8hpp__incl.md5 b/docs/latex/DSP_8hpp__incl.md5 new file mode 100644 index 0000000..d523a93 --- /dev/null +++ b/docs/latex/DSP_8hpp__incl.md5 @@ -0,0 +1 @@ +08bbba9f814254bb0731d56d5fdbe13f \ No newline at end of file diff --git a/docs/latex/DSP_8hpp__incl.pdf b/docs/latex/DSP_8hpp__incl.pdf new file mode 100644 index 0000000..7e9852e Binary files /dev/null and b/docs/latex/DSP_8hpp__incl.pdf differ diff --git a/docs/latex/IMemory_8cpp.tex b/docs/latex/IMemory_8cpp.tex new file mode 100644 index 0000000..4f6c0f5 --- /dev/null +++ b/docs/latex/IMemory_8cpp.tex @@ -0,0 +1,19 @@ +\hypertarget{IMemory_8cpp}{}\doxysection{sources/\+Memory/\+I\+Memory.cpp File Reference} +\label{IMemory_8cpp}\index{sources/Memory/IMemory.cpp@{sources/Memory/IMemory.cpp}} +{\ttfamily \#include \char`\"{}I\+Memory.\+hpp\char`\"{}}\newline +{\ttfamily \#include $<$algorithm$>$}\newline +Include dependency graph for I\+Memory.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=317pt]{IMemory_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} +\end{DoxyCompactItemize} diff --git a/docs/latex/IMemory_8cpp__incl.md5 b/docs/latex/IMemory_8cpp__incl.md5 new file mode 100644 index 0000000..ee529e4 --- /dev/null +++ b/docs/latex/IMemory_8cpp__incl.md5 @@ -0,0 +1 @@ +b88abea68a5ba531cef29c0262f1120b \ No newline at end of file diff --git a/docs/latex/IMemory_8cpp__incl.pdf b/docs/latex/IMemory_8cpp__incl.pdf new file mode 100644 index 0000000..fb7ccbb Binary files /dev/null and b/docs/latex/IMemory_8cpp__incl.pdf differ diff --git a/docs/latex/IMemory_8hpp.tex b/docs/latex/IMemory_8hpp.tex new file mode 100644 index 0000000..f1817ea --- /dev/null +++ b/docs/latex/IMemory_8hpp.tex @@ -0,0 +1,33 @@ +\hypertarget{IMemory_8hpp}{}\doxysection{sources/\+Memory/\+I\+Memory.hpp File Reference} +\label{IMemory_8hpp}\index{sources/Memory/IMemory.hpp@{sources/Memory/IMemory.hpp}} +{\ttfamily \#include $<$cstdint$>$}\newline +{\ttfamily \#include $<$vector$>$}\newline +{\ttfamily \#include \char`\"{}../\+Models/\+Ints.\+hpp\char`\"{}}\newline +Include dependency graph for I\+Memory.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=317pt]{IMemory_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{IMemory_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{Com\+Square\+::\+Memory\+::\+I\+Memory}} +\begin{DoxyCompactList}\small\item\em Common interface implemented by all components mapping memory. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} +\end{DoxyCompactItemize} diff --git a/docs/latex/IMemory_8hpp__dep__incl.md5 b/docs/latex/IMemory_8hpp__dep__incl.md5 new file mode 100644 index 0000000..a7ea493 --- /dev/null +++ b/docs/latex/IMemory_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +8aa5c10dc7fde21796aed3a5b529a47c \ No newline at end of file diff --git a/docs/latex/IMemory_8hpp__dep__incl.pdf b/docs/latex/IMemory_8hpp__dep__incl.pdf new file mode 100644 index 0000000..d1d8f79 Binary files /dev/null and b/docs/latex/IMemory_8hpp__dep__incl.pdf differ diff --git a/docs/latex/IMemory_8hpp__incl.md5 b/docs/latex/IMemory_8hpp__incl.md5 new file mode 100644 index 0000000..b136060 --- /dev/null +++ b/docs/latex/IMemory_8hpp__incl.md5 @@ -0,0 +1 @@ +74a25a3ac4481c6c5759356aeb134af7 \ No newline at end of file diff --git a/docs/latex/IMemory_8hpp__incl.pdf b/docs/latex/IMemory_8hpp__incl.pdf new file mode 100644 index 0000000..c2ec10e Binary files /dev/null and b/docs/latex/IMemory_8hpp__incl.pdf differ diff --git a/docs/latex/IRectangleMemory_8cpp.tex b/docs/latex/IRectangleMemory_8cpp.tex new file mode 100644 index 0000000..be8fb59 --- /dev/null +++ b/docs/latex/IRectangleMemory_8cpp.tex @@ -0,0 +1,19 @@ +\hypertarget{IRectangleMemory_8cpp}{}\doxysection{sources/\+Memory/\+I\+Rectangle\+Memory.cpp File Reference} +\label{IRectangleMemory_8cpp}\index{sources/Memory/IRectangleMemory.cpp@{sources/Memory/IRectangleMemory.cpp}} +{\ttfamily \#include \char`\"{}I\+Rectangle\+Memory.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Address.\+hpp\char`\"{}}\newline +Include dependency graph for I\+Rectangle\+Memory.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{IRectangleMemory_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} +\end{DoxyCompactItemize} diff --git a/docs/latex/IRectangleMemory_8cpp__incl.md5 b/docs/latex/IRectangleMemory_8cpp__incl.md5 new file mode 100644 index 0000000..7c68e76 --- /dev/null +++ b/docs/latex/IRectangleMemory_8cpp__incl.md5 @@ -0,0 +1 @@ +8200493434131cfd1eaef08149cddb32 \ No newline at end of file diff --git a/docs/latex/IRectangleMemory_8cpp__incl.pdf b/docs/latex/IRectangleMemory_8cpp__incl.pdf new file mode 100644 index 0000000..e1b5e3f Binary files /dev/null and b/docs/latex/IRectangleMemory_8cpp__incl.pdf differ diff --git a/docs/latex/IRectangleMemory_8hpp.tex b/docs/latex/IRectangleMemory_8hpp.tex new file mode 100644 index 0000000..9d66ac1 --- /dev/null +++ b/docs/latex/IRectangleMemory_8hpp.tex @@ -0,0 +1,31 @@ +\hypertarget{IRectangleMemory_8hpp}{}\doxysection{sources/\+Memory/\+I\+Rectangle\+Memory.hpp File Reference} +\label{IRectangleMemory_8hpp}\index{sources/Memory/IRectangleMemory.hpp@{sources/Memory/IRectangleMemory.hpp}} +{\ttfamily \#include \char`\"{}I\+Memory.\+hpp\char`\"{}}\newline +Include dependency graph for I\+Rectangle\+Memory.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=317pt]{IRectangleMemory_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{IRectangleMemory_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}} +\begin{DoxyCompactList}\small\item\em Superset of the \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at F\+F\+FF). \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} +\end{DoxyCompactItemize} diff --git a/docs/latex/IRectangleMemory_8hpp__dep__incl.md5 b/docs/latex/IRectangleMemory_8hpp__dep__incl.md5 new file mode 100644 index 0000000..3bffb46 --- /dev/null +++ b/docs/latex/IRectangleMemory_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +fec32804e6ad1ae5717040dbb5762191 \ No newline at end of file diff --git a/docs/latex/IRectangleMemory_8hpp__dep__incl.pdf b/docs/latex/IRectangleMemory_8hpp__dep__incl.pdf new file mode 100644 index 0000000..a25f6c3 Binary files /dev/null and b/docs/latex/IRectangleMemory_8hpp__dep__incl.pdf differ diff --git a/docs/latex/IRectangleMemory_8hpp__incl.md5 b/docs/latex/IRectangleMemory_8hpp__incl.md5 new file mode 100644 index 0000000..7e00411 --- /dev/null +++ b/docs/latex/IRectangleMemory_8hpp__incl.md5 @@ -0,0 +1 @@ +d0263c62c05131db9fbc48708cb1f421 \ No newline at end of file diff --git a/docs/latex/IRectangleMemory_8hpp__incl.pdf b/docs/latex/IRectangleMemory_8hpp__incl.pdf new file mode 100644 index 0000000..e1d5604 Binary files /dev/null and b/docs/latex/IRectangleMemory_8hpp__incl.pdf differ diff --git a/docs/latex/IRenderer_8hpp.tex b/docs/latex/IRenderer_8hpp.tex new file mode 100644 index 0000000..459419b --- /dev/null +++ b/docs/latex/IRenderer_8hpp.tex @@ -0,0 +1,31 @@ +\hypertarget{IRenderer_8hpp}{}\doxysection{sources/\+Renderer/\+I\+Renderer.hpp File Reference} +\label{IRenderer_8hpp}\index{sources/Renderer/IRenderer.hpp@{sources/Renderer/IRenderer.hpp}} +{\ttfamily \#include $<$string$>$}\newline +Include dependency graph for I\+Renderer.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=252pt]{IRenderer_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=261pt]{IRenderer_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer}{Com\+Square\+::\+Renderer\+::\+I\+Renderer}} +\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Renderer}{Com\+Square\+::\+Renderer}} +\end{DoxyCompactItemize} diff --git a/docs/latex/IRenderer_8hpp__dep__incl.md5 b/docs/latex/IRenderer_8hpp__dep__incl.md5 new file mode 100644 index 0000000..dddccfa --- /dev/null +++ b/docs/latex/IRenderer_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +9d025c4212fa8735edae36e932db8e1d \ No newline at end of file diff --git a/docs/latex/IRenderer_8hpp__dep__incl.pdf b/docs/latex/IRenderer_8hpp__dep__incl.pdf new file mode 100644 index 0000000..4fcd2de Binary files /dev/null and b/docs/latex/IRenderer_8hpp__dep__incl.pdf differ diff --git a/docs/latex/IRenderer_8hpp__incl.md5 b/docs/latex/IRenderer_8hpp__incl.md5 new file mode 100644 index 0000000..ab049fe --- /dev/null +++ b/docs/latex/IRenderer_8hpp__incl.md5 @@ -0,0 +1 @@ +92f09cf325fda01197cab2d0a52df15c \ No newline at end of file diff --git a/docs/latex/IRenderer_8hpp__incl.pdf b/docs/latex/IRenderer_8hpp__incl.pdf new file mode 100644 index 0000000..3374355 Binary files /dev/null and b/docs/latex/IRenderer_8hpp__incl.pdf differ diff --git a/docs/latex/InterruptVectors_8hpp.tex b/docs/latex/InterruptVectors_8hpp.tex new file mode 100644 index 0000000..d236a2d --- /dev/null +++ b/docs/latex/InterruptVectors_8hpp.tex @@ -0,0 +1,22 @@ +\hypertarget{InterruptVectors_8hpp}{}\doxysection{sources/\+Cartridge/\+Interrupt\+Vectors.hpp File Reference} +\label{InterruptVectors_8hpp}\index{sources/Cartridge/InterruptVectors.hpp@{sources/Cartridge/InterruptVectors.hpp}} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{InterruptVectors_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +struct \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors}{Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors}} +\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Cartridge}{Com\+Square\+::\+Cartridge}} +\end{DoxyCompactItemize} diff --git a/docs/latex/InterruptVectors_8hpp__dep__incl.md5 b/docs/latex/InterruptVectors_8hpp__dep__incl.md5 new file mode 100644 index 0000000..cdb0424 --- /dev/null +++ b/docs/latex/InterruptVectors_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +f805307d63aeee4fc8134b84c74b4220 \ No newline at end of file diff --git a/docs/latex/InterruptVectors_8hpp__dep__incl.pdf b/docs/latex/InterruptVectors_8hpp__dep__incl.pdf new file mode 100644 index 0000000..140d840 Binary files /dev/null and b/docs/latex/InterruptVectors_8hpp__dep__incl.pdf differ diff --git a/docs/latex/Ints_8hpp.tex b/docs/latex/Ints_8hpp.tex new file mode 100644 index 0000000..502fe64 --- /dev/null +++ b/docs/latex/Ints_8hpp.tex @@ -0,0 +1,24 @@ +\hypertarget{Ints_8hpp}{}\doxysection{sources/\+Models/\+Ints.hpp File Reference} +\label{Ints_8hpp}\index{sources/Models/Ints.hpp@{sources/Models/Ints.hpp}} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{Ints_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Typedefs} +\begin{DoxyCompactItemize} +\item +typedef unsigned \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} +\end{DoxyCompactItemize} + + +\doxysubsection{Typedef Documentation} +\mbox{\Hypertarget{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}\label{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}} +\index{Ints.hpp@{Ints.hpp}!uint24\_t@{uint24\_t}} +\index{uint24\_t@{uint24\_t}!Ints.hpp@{Ints.hpp}} +\doxysubsubsection{\texorpdfstring{uint24\_t}{uint24\_t}} +{\footnotesize\ttfamily typedef unsigned \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}} + diff --git a/docs/latex/Ints_8hpp__dep__incl.md5 b/docs/latex/Ints_8hpp__dep__incl.md5 new file mode 100644 index 0000000..3d8c849 --- /dev/null +++ b/docs/latex/Ints_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +0b331f3f71d3a261d8cc848d396fa1ae \ No newline at end of file diff --git a/docs/latex/Ints_8hpp__dep__incl.pdf b/docs/latex/Ints_8hpp__dep__incl.pdf new file mode 100644 index 0000000..7c0efe9 Binary files /dev/null and b/docs/latex/Ints_8hpp__dep__incl.pdf differ diff --git a/docs/latex/InvalidAction_8hpp.tex b/docs/latex/InvalidAction_8hpp.tex new file mode 100644 index 0000000..7c8faa4 --- /dev/null +++ b/docs/latex/InvalidAction_8hpp.tex @@ -0,0 +1,30 @@ +\hypertarget{InvalidAction_8hpp}{}\doxysection{sources/\+Exceptions/\+Invalid\+Action.hpp File Reference} +\label{InvalidAction_8hpp}\index{sources/Exceptions/InvalidAction.hpp@{sources/Exceptions/InvalidAction.hpp}} +{\ttfamily \#include $<$exception$>$}\newline +{\ttfamily \#include $<$string$>$}\newline +Include dependency graph for Invalid\+Action.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=208pt]{InvalidAction_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=250pt]{InvalidAction_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1InvalidAction}{Com\+Square\+::\+Invalid\+Action}} +\begin{DoxyCompactList}\small\item\em Exception thrown when someone tries to load an invalid rom. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\end{DoxyCompactItemize} diff --git a/docs/latex/InvalidAction_8hpp__dep__incl.md5 b/docs/latex/InvalidAction_8hpp__dep__incl.md5 new file mode 100644 index 0000000..be697f6 --- /dev/null +++ b/docs/latex/InvalidAction_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +07a4238b9ac04b4d9b3abaa694828768 \ No newline at end of file diff --git a/docs/latex/InvalidAction_8hpp__dep__incl.pdf b/docs/latex/InvalidAction_8hpp__dep__incl.pdf new file mode 100644 index 0000000..7ae059b Binary files /dev/null and b/docs/latex/InvalidAction_8hpp__dep__incl.pdf differ diff --git a/docs/latex/InvalidAction_8hpp__incl.md5 b/docs/latex/InvalidAction_8hpp__incl.md5 new file mode 100644 index 0000000..fd2f716 --- /dev/null +++ b/docs/latex/InvalidAction_8hpp__incl.md5 @@ -0,0 +1 @@ +25f0ec19d3db7956d8f01fc234516d05 \ No newline at end of file diff --git a/docs/latex/InvalidAction_8hpp__incl.pdf b/docs/latex/InvalidAction_8hpp__incl.pdf new file mode 100644 index 0000000..e05d59e Binary files /dev/null and b/docs/latex/InvalidAction_8hpp__incl.pdf differ diff --git a/docs/latex/InvalidAddress_8hpp.tex b/docs/latex/InvalidAddress_8hpp.tex new file mode 100644 index 0000000..99b9641 --- /dev/null +++ b/docs/latex/InvalidAddress_8hpp.tex @@ -0,0 +1,32 @@ +\hypertarget{InvalidAddress_8hpp}{}\doxysection{sources/\+Exceptions/\+Invalid\+Address.hpp File Reference} +\label{InvalidAddress_8hpp}\index{sources/Exceptions/InvalidAddress.hpp@{sources/Exceptions/InvalidAddress.hpp}} +{\ttfamily \#include $<$exception$>$}\newline +{\ttfamily \#include $<$string$>$}\newline +{\ttfamily \#include $<$ios$>$}\newline +{\ttfamily \#include $<$sstream$>$}\newline +Include dependency graph for Invalid\+Address.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=332pt]{InvalidAddress_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{InvalidAddress_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Com\+Square\+::\+Invalid\+Address}} +\begin{DoxyCompactList}\small\item\em Exception thrown when trying to read/write to an invalid address. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\end{DoxyCompactItemize} diff --git a/docs/latex/InvalidAddress_8hpp__dep__incl.md5 b/docs/latex/InvalidAddress_8hpp__dep__incl.md5 new file mode 100644 index 0000000..707922a --- /dev/null +++ b/docs/latex/InvalidAddress_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +b2e313d06560dfdb1b9302d56f1fbb0a \ No newline at end of file diff --git a/docs/latex/InvalidAddress_8hpp__dep__incl.pdf b/docs/latex/InvalidAddress_8hpp__dep__incl.pdf new file mode 100644 index 0000000..a355be5 Binary files /dev/null and b/docs/latex/InvalidAddress_8hpp__dep__incl.pdf differ diff --git a/docs/latex/InvalidAddress_8hpp__incl.md5 b/docs/latex/InvalidAddress_8hpp__incl.md5 new file mode 100644 index 0000000..50c4c5c --- /dev/null +++ b/docs/latex/InvalidAddress_8hpp__incl.md5 @@ -0,0 +1 @@ +063b8af04f797c4fd5a3469f7a58ac9f \ No newline at end of file diff --git a/docs/latex/InvalidAddress_8hpp__incl.pdf b/docs/latex/InvalidAddress_8hpp__incl.pdf new file mode 100644 index 0000000..607d603 Binary files /dev/null and b/docs/latex/InvalidAddress_8hpp__incl.pdf differ diff --git a/docs/latex/InvalidRom_8hpp.tex b/docs/latex/InvalidRom_8hpp.tex new file mode 100644 index 0000000..7096548 --- /dev/null +++ b/docs/latex/InvalidRom_8hpp.tex @@ -0,0 +1,30 @@ +\hypertarget{InvalidRom_8hpp}{}\doxysection{sources/\+Exceptions/\+Invalid\+Rom.hpp File Reference} +\label{InvalidRom_8hpp}\index{sources/Exceptions/InvalidRom.hpp@{sources/Exceptions/InvalidRom.hpp}} +{\ttfamily \#include $<$exception$>$}\newline +{\ttfamily \#include $<$string$>$}\newline +Include dependency graph for Invalid\+Rom.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=208pt]{InvalidRom_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=250pt]{InvalidRom_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1InvalidRomException}{Com\+Square\+::\+Invalid\+Rom\+Exception}} +\begin{DoxyCompactList}\small\item\em Exception thrown when someone tries to load an invalid rom. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\end{DoxyCompactItemize} diff --git a/docs/latex/InvalidRom_8hpp__dep__incl.md5 b/docs/latex/InvalidRom_8hpp__dep__incl.md5 new file mode 100644 index 0000000..d75a3b4 --- /dev/null +++ b/docs/latex/InvalidRom_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +ad9db7450271ddbb9b27918897abfc65 \ No newline at end of file diff --git a/docs/latex/InvalidRom_8hpp__dep__incl.pdf b/docs/latex/InvalidRom_8hpp__dep__incl.pdf new file mode 100644 index 0000000..edcc8d1 Binary files /dev/null and b/docs/latex/InvalidRom_8hpp__dep__incl.pdf differ diff --git a/docs/latex/InvalidRom_8hpp__incl.md5 b/docs/latex/InvalidRom_8hpp__incl.md5 new file mode 100644 index 0000000..3685021 --- /dev/null +++ b/docs/latex/InvalidRom_8hpp__incl.md5 @@ -0,0 +1 @@ +1895e23b67dc12aa71d7e1b9a06770e1 \ No newline at end of file diff --git a/docs/latex/InvalidRom_8hpp__incl.pdf b/docs/latex/InvalidRom_8hpp__incl.pdf new file mode 100644 index 0000000..19f5ba3 Binary files /dev/null and b/docs/latex/InvalidRom_8hpp__incl.pdf differ diff --git a/docs/latex/Makefile b/docs/latex/Makefile new file mode 100644 index 0000000..877c9cc --- /dev/null +++ b/docs/latex/Makefile @@ -0,0 +1,23 @@ +LATEX_CMD=pdflatex + +all: refman.pdf + +pdf: refman.pdf + +refman.pdf: clean refman.tex + $(LATEX_CMD) refman + makeindex refman.idx + $(LATEX_CMD) refman + latex_count=8 ; \ + while egrep -s 'Rerun (LaTeX|to get cross-references right)' refman.log && [ $$latex_count -gt 0 ] ;\ + do \ + echo "Rerunning latex...." ;\ + $(LATEX_CMD) refman ;\ + latex_count=`expr $$latex_count - 1` ;\ + done + makeindex refman.idx + $(LATEX_CMD) refman + + +clean: + rm -f *.ps *.dvi *.aux *.toc *.idx *.ind *.ilg *.log *.out *.brf *.blg *.bbl refman.pdf diff --git a/docs/latex/MemoryBus_8cpp.tex b/docs/latex/MemoryBus_8cpp.tex new file mode 100644 index 0000000..10079ab --- /dev/null +++ b/docs/latex/MemoryBus_8cpp.tex @@ -0,0 +1,22 @@ +\hypertarget{MemoryBus_8cpp}{}\doxysection{sources/\+Memory/\+Memory\+Bus.cpp File Reference} +\label{MemoryBus_8cpp}\index{sources/Memory/MemoryBus.cpp@{sources/Memory/MemoryBus.cpp}} +{\ttfamily \#include $<$algorithm$>$}\newline +{\ttfamily \#include $<$iostream$>$}\newline +{\ttfamily \#include \char`\"{}Memory\+Bus.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+S\+N\+E\+S.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}Memory\+Shadow.\+hpp\char`\"{}}\newline +Include dependency graph for Memory\+Bus.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{MemoryBus_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} +\end{DoxyCompactItemize} diff --git a/docs/latex/MemoryBus_8cpp__incl.md5 b/docs/latex/MemoryBus_8cpp__incl.md5 new file mode 100644 index 0000000..ea62260 --- /dev/null +++ b/docs/latex/MemoryBus_8cpp__incl.md5 @@ -0,0 +1 @@ +2fac035c559f40fbc69879598e57b723 \ No newline at end of file diff --git a/docs/latex/MemoryBus_8cpp__incl.pdf b/docs/latex/MemoryBus_8cpp__incl.pdf new file mode 100644 index 0000000..7e9ed66 Binary files /dev/null and b/docs/latex/MemoryBus_8cpp__incl.pdf differ diff --git a/docs/latex/MemoryBus_8hpp.tex b/docs/latex/MemoryBus_8hpp.tex new file mode 100644 index 0000000..12e10a7 --- /dev/null +++ b/docs/latex/MemoryBus_8hpp.tex @@ -0,0 +1,34 @@ +\hypertarget{MemoryBus_8hpp}{}\doxysection{sources/\+Memory/\+Memory\+Bus.hpp File Reference} +\label{MemoryBus_8hpp}\index{sources/Memory/MemoryBus.hpp@{sources/Memory/MemoryBus.hpp}} +{\ttfamily \#include $<$cstdint$>$}\newline +{\ttfamily \#include $<$vector$>$}\newline +{\ttfamily \#include $<$memory$>$}\newline +{\ttfamily \#include \char`\"{}I\+Memory.\+hpp\char`\"{}}\newline +Include dependency graph for Memory\+Bus.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{MemoryBus_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{MemoryBus_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Com\+Square\+::\+Memory\+::\+Memory\+Bus}} +\begin{DoxyCompactList}\small\item\em The memory bus is the component responsible of mapping addresses to components address and transmitting the data. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} +\end{DoxyCompactItemize} diff --git a/docs/latex/MemoryBus_8hpp__dep__incl.md5 b/docs/latex/MemoryBus_8hpp__dep__incl.md5 new file mode 100644 index 0000000..a05d5a4 --- /dev/null +++ b/docs/latex/MemoryBus_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +c33601cadd143b6959c04fb2ac21c2fc \ No newline at end of file diff --git a/docs/latex/MemoryBus_8hpp__dep__incl.pdf b/docs/latex/MemoryBus_8hpp__dep__incl.pdf new file mode 100644 index 0000000..ec705e2 Binary files /dev/null and b/docs/latex/MemoryBus_8hpp__dep__incl.pdf differ diff --git a/docs/latex/MemoryBus_8hpp__incl.md5 b/docs/latex/MemoryBus_8hpp__incl.md5 new file mode 100644 index 0000000..8f63ebb --- /dev/null +++ b/docs/latex/MemoryBus_8hpp__incl.md5 @@ -0,0 +1 @@ +8d6d70426d18d4e25c84af9430e811e0 \ No newline at end of file diff --git a/docs/latex/MemoryBus_8hpp__incl.pdf b/docs/latex/MemoryBus_8hpp__incl.pdf new file mode 100644 index 0000000..76d519e Binary files /dev/null and b/docs/latex/MemoryBus_8hpp__incl.pdf differ diff --git a/docs/latex/MemoryShadow_8cpp.tex b/docs/latex/MemoryShadow_8cpp.tex new file mode 100644 index 0000000..67090fc --- /dev/null +++ b/docs/latex/MemoryShadow_8cpp.tex @@ -0,0 +1,19 @@ +\hypertarget{MemoryShadow_8cpp}{}\doxysection{sources/\+Memory/\+Memory\+Shadow.cpp File Reference} +\label{MemoryShadow_8cpp}\index{sources/Memory/MemoryShadow.cpp@{sources/Memory/MemoryShadow.cpp}} +{\ttfamily \#include \char`\"{}Memory\+Shadow.\+hpp\char`\"{}}\newline +{\ttfamily \#include $<$utility$>$}\newline +Include dependency graph for Memory\+Shadow.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=341pt]{MemoryShadow_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} +\end{DoxyCompactItemize} diff --git a/docs/latex/MemoryShadow_8cpp__incl.md5 b/docs/latex/MemoryShadow_8cpp__incl.md5 new file mode 100644 index 0000000..969a920 --- /dev/null +++ b/docs/latex/MemoryShadow_8cpp__incl.md5 @@ -0,0 +1 @@ +bb91693dd95b658e84bf3aca829137f9 \ No newline at end of file diff --git a/docs/latex/MemoryShadow_8cpp__incl.pdf b/docs/latex/MemoryShadow_8cpp__incl.pdf new file mode 100644 index 0000000..228e095 Binary files /dev/null and b/docs/latex/MemoryShadow_8cpp__incl.pdf differ diff --git a/docs/latex/MemoryShadow_8hpp.tex b/docs/latex/MemoryShadow_8hpp.tex new file mode 100644 index 0000000..3fb40ef --- /dev/null +++ b/docs/latex/MemoryShadow_8hpp.tex @@ -0,0 +1,32 @@ +\hypertarget{MemoryShadow_8hpp}{}\doxysection{sources/\+Memory/\+Memory\+Shadow.hpp File Reference} +\label{MemoryShadow_8hpp}\index{sources/Memory/MemoryShadow.hpp@{sources/Memory/MemoryShadow.hpp}} +{\ttfamily \#include $<$memory$>$}\newline +{\ttfamily \#include \char`\"{}I\+Memory.\+hpp\char`\"{}}\newline +Include dependency graph for Memory\+Shadow.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{MemoryShadow_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{MemoryShadow_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow}{Com\+Square\+::\+Memory\+::\+Memory\+Shadow}} +\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} +\end{DoxyCompactItemize} diff --git a/docs/latex/MemoryShadow_8hpp__dep__incl.md5 b/docs/latex/MemoryShadow_8hpp__dep__incl.md5 new file mode 100644 index 0000000..6361c29 --- /dev/null +++ b/docs/latex/MemoryShadow_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +726993aa616516e1b394587ba045079f \ No newline at end of file diff --git a/docs/latex/MemoryShadow_8hpp__dep__incl.pdf b/docs/latex/MemoryShadow_8hpp__dep__incl.pdf new file mode 100644 index 0000000..bccafce Binary files /dev/null and b/docs/latex/MemoryShadow_8hpp__dep__incl.pdf differ diff --git a/docs/latex/MemoryShadow_8hpp__incl.md5 b/docs/latex/MemoryShadow_8hpp__incl.md5 new file mode 100644 index 0000000..e11c63e --- /dev/null +++ b/docs/latex/MemoryShadow_8hpp__incl.md5 @@ -0,0 +1 @@ +34229290a7de138807e0d03b619c112a \ No newline at end of file diff --git a/docs/latex/MemoryShadow_8hpp__incl.pdf b/docs/latex/MemoryShadow_8hpp__incl.pdf new file mode 100644 index 0000000..0508b0d Binary files /dev/null and b/docs/latex/MemoryShadow_8hpp__incl.pdf differ diff --git a/docs/latex/NotImplementedException_8hpp.tex b/docs/latex/NotImplementedException_8hpp.tex new file mode 100644 index 0000000..c0f13ea --- /dev/null +++ b/docs/latex/NotImplementedException_8hpp.tex @@ -0,0 +1,29 @@ +\hypertarget{NotImplementedException_8hpp}{}\doxysection{sources/\+Exceptions/\+Not\+Implemented\+Exception.hpp File Reference} +\label{NotImplementedException_8hpp}\index{sources/Exceptions/NotImplementedException.hpp@{sources/Exceptions/NotImplementedException.hpp}} +{\ttfamily \#include $<$exception$>$}\newline +Include dependency graph for Not\+Implemented\+Exception.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=251pt]{NotImplementedException_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{NotImplementedException_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1NotImplementedException}{Com\+Square\+::\+Not\+Implemented\+Exception}} +\begin{DoxyCompactList}\small\item\em When this is thrown, it means that we should work more. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\end{DoxyCompactItemize} diff --git a/docs/latex/NotImplementedException_8hpp__dep__incl.md5 b/docs/latex/NotImplementedException_8hpp__dep__incl.md5 new file mode 100644 index 0000000..39f988a --- /dev/null +++ b/docs/latex/NotImplementedException_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +040059250b22d6083e03820a2d84dfe7 \ No newline at end of file diff --git a/docs/latex/NotImplementedException_8hpp__dep__incl.pdf b/docs/latex/NotImplementedException_8hpp__dep__incl.pdf new file mode 100644 index 0000000..b65c827 Binary files /dev/null and b/docs/latex/NotImplementedException_8hpp__dep__incl.pdf differ diff --git a/docs/latex/NotImplementedException_8hpp__incl.md5 b/docs/latex/NotImplementedException_8hpp__incl.md5 new file mode 100644 index 0000000..17787f7 --- /dev/null +++ b/docs/latex/NotImplementedException_8hpp__incl.md5 @@ -0,0 +1 @@ +fb5da360e5873246e97984e253028c23 \ No newline at end of file diff --git a/docs/latex/NotImplementedException_8hpp__incl.pdf b/docs/latex/NotImplementedException_8hpp__incl.pdf new file mode 100644 index 0000000..6014454 Binary files /dev/null and b/docs/latex/NotImplementedException_8hpp__incl.pdf differ diff --git a/docs/latex/PPU_8cpp.tex b/docs/latex/PPU_8cpp.tex new file mode 100644 index 0000000..7a68bf5 --- /dev/null +++ b/docs/latex/PPU_8cpp.tex @@ -0,0 +1,20 @@ +\hypertarget{PPU_8cpp}{}\doxysection{sources/\+P\+P\+U/\+P\+PU.cpp File Reference} +\label{PPU_8cpp}\index{sources/PPU/PPU.cpp@{sources/PPU/PPU.cpp}} +{\ttfamily \#include \char`\"{}P\+P\+U.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Not\+Implemented\+Exception.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Address.\+hpp\char`\"{}}\newline +Include dependency graph for P\+P\+U.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{PPU_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1PPU}{Com\+Square\+::\+P\+PU}} +\end{DoxyCompactItemize} diff --git a/docs/latex/PPU_8cpp__incl.md5 b/docs/latex/PPU_8cpp__incl.md5 new file mode 100644 index 0000000..cdfc44f --- /dev/null +++ b/docs/latex/PPU_8cpp__incl.md5 @@ -0,0 +1 @@ +33dc7e0d1b0bd33740265fe2edde7715 \ No newline at end of file diff --git a/docs/latex/PPU_8cpp__incl.pdf b/docs/latex/PPU_8cpp__incl.pdf new file mode 100644 index 0000000..03ff871 Binary files /dev/null and b/docs/latex/PPU_8cpp__incl.pdf differ diff --git a/docs/latex/PPU_8hpp.tex b/docs/latex/PPU_8hpp.tex new file mode 100644 index 0000000..d911e1c --- /dev/null +++ b/docs/latex/PPU_8hpp.tex @@ -0,0 +1,32 @@ +\hypertarget{PPU_8hpp}{}\doxysection{sources/\+P\+P\+U/\+P\+PU.hpp File Reference} +\label{PPU_8hpp}\index{sources/PPU/PPU.hpp@{sources/PPU/PPU.hpp}} +{\ttfamily \#include $<$stdint-\/gcc.\+h$>$}\newline +{\ttfamily \#include \char`\"{}../\+Memory/\+I\+Memory.\+hpp\char`\"{}}\newline +Include dependency graph for P\+P\+U.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{PPU_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{PPU_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{Com\+Square\+::\+P\+P\+U\+::\+P\+PU}} +\begin{DoxyCompactList}\small\item\em The struct containing all the registers the \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}}. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1PPU}{Com\+Square\+::\+P\+PU}} +\end{DoxyCompactItemize} diff --git a/docs/latex/PPU_8hpp__dep__incl.md5 b/docs/latex/PPU_8hpp__dep__incl.md5 new file mode 100644 index 0000000..a2fa0b2 --- /dev/null +++ b/docs/latex/PPU_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +1aa69b00ace8a30f08689e3cfd305cba \ No newline at end of file diff --git a/docs/latex/PPU_8hpp__dep__incl.pdf b/docs/latex/PPU_8hpp__dep__incl.pdf new file mode 100644 index 0000000..6e61d09 Binary files /dev/null and b/docs/latex/PPU_8hpp__dep__incl.pdf differ diff --git a/docs/latex/PPU_8hpp__incl.md5 b/docs/latex/PPU_8hpp__incl.md5 new file mode 100644 index 0000000..9948287 --- /dev/null +++ b/docs/latex/PPU_8hpp__incl.md5 @@ -0,0 +1 @@ +6d306c7b753efea311ae28bb74714a01 \ No newline at end of file diff --git a/docs/latex/PPU_8hpp__incl.pdf b/docs/latex/PPU_8hpp__incl.pdf new file mode 100644 index 0000000..440c0f9 Binary files /dev/null and b/docs/latex/PPU_8hpp__incl.pdf differ diff --git a/docs/latex/README_8md.tex b/docs/latex/README_8md.tex new file mode 100644 index 0000000..c7fc84e --- /dev/null +++ b/docs/latex/README_8md.tex @@ -0,0 +1,2 @@ +\hypertarget{README_8md}{}\doxysection{R\+E\+A\+D\+M\+E.\+md File Reference} +\label{README_8md}\index{README.md@{README.md}} diff --git a/docs/latex/Ram_8cpp.tex b/docs/latex/Ram_8cpp.tex new file mode 100644 index 0000000..b191595 --- /dev/null +++ b/docs/latex/Ram_8cpp.tex @@ -0,0 +1,19 @@ +\hypertarget{Ram_8cpp}{}\doxysection{sources/\+Ram/\+Ram.cpp File Reference} +\label{Ram_8cpp}\index{sources/Ram/Ram.cpp@{sources/Ram/Ram.cpp}} +{\ttfamily \#include \char`\"{}Ram.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}../\+Exceptions/\+Invalid\+Address.\+hpp\char`\"{}}\newline +Include dependency graph for Ram.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{Ram_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Ram}{Com\+Square\+::\+Ram}} +\end{DoxyCompactItemize} diff --git a/docs/latex/Ram_8cpp__incl.md5 b/docs/latex/Ram_8cpp__incl.md5 new file mode 100644 index 0000000..71f86f6 --- /dev/null +++ b/docs/latex/Ram_8cpp__incl.md5 @@ -0,0 +1 @@ +0604108bc57f0851553b7657ed89bbe6 \ No newline at end of file diff --git a/docs/latex/Ram_8cpp__incl.pdf b/docs/latex/Ram_8cpp__incl.pdf new file mode 100644 index 0000000..067e0e9 Binary files /dev/null and b/docs/latex/Ram_8cpp__incl.pdf differ diff --git a/docs/latex/Ram_8hpp.tex b/docs/latex/Ram_8hpp.tex new file mode 100644 index 0000000..a72eac1 --- /dev/null +++ b/docs/latex/Ram_8hpp.tex @@ -0,0 +1,31 @@ +\hypertarget{Ram_8hpp}{}\doxysection{sources/\+Ram/\+Ram.hpp File Reference} +\label{Ram_8hpp}\index{sources/Ram/Ram.hpp@{sources/Ram/Ram.hpp}} +{\ttfamily \#include \char`\"{}../\+Memory/\+I\+Memory.\+hpp\char`\"{}}\newline +Include dependency graph for Ram.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=317pt]{Ram_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{Ram_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram}{Com\+Square\+::\+Ram\+::\+Ram}} +\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Ram}{Com\+Square\+::\+Ram}} +\end{DoxyCompactItemize} diff --git a/docs/latex/Ram_8hpp__dep__incl.md5 b/docs/latex/Ram_8hpp__dep__incl.md5 new file mode 100644 index 0000000..211952a --- /dev/null +++ b/docs/latex/Ram_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +1c52e196d05a6ae315b863bf9d3a4567 \ No newline at end of file diff --git a/docs/latex/Ram_8hpp__dep__incl.pdf b/docs/latex/Ram_8hpp__dep__incl.pdf new file mode 100644 index 0000000..d5eb28c Binary files /dev/null and b/docs/latex/Ram_8hpp__dep__incl.pdf differ diff --git a/docs/latex/Ram_8hpp__incl.md5 b/docs/latex/Ram_8hpp__incl.md5 new file mode 100644 index 0000000..cc823ce --- /dev/null +++ b/docs/latex/Ram_8hpp__incl.md5 @@ -0,0 +1 @@ +8761dbdbe117a7ccafed1c2ea0eb8599 \ No newline at end of file diff --git a/docs/latex/Ram_8hpp__incl.pdf b/docs/latex/Ram_8hpp__incl.pdf new file mode 100644 index 0000000..1ebb763 Binary files /dev/null and b/docs/latex/Ram_8hpp__incl.pdf differ diff --git a/docs/latex/SFRenderer_8cpp.tex b/docs/latex/SFRenderer_8cpp.tex new file mode 100644 index 0000000..bb6c0cd --- /dev/null +++ b/docs/latex/SFRenderer_8cpp.tex @@ -0,0 +1,18 @@ +\hypertarget{SFRenderer_8cpp}{}\doxysection{sources/\+Renderer/\+S\+F\+Renderer.cpp File Reference} +\label{SFRenderer_8cpp}\index{sources/Renderer/SFRenderer.cpp@{sources/Renderer/SFRenderer.cpp}} +{\ttfamily \#include \char`\"{}S\+F\+Renderer.\+hpp\char`\"{}}\newline +Include dependency graph for S\+F\+Renderer.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{SFRenderer_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Renderer}{Com\+Square\+::\+Renderer}} +\end{DoxyCompactItemize} diff --git a/docs/latex/SFRenderer_8cpp__incl.md5 b/docs/latex/SFRenderer_8cpp__incl.md5 new file mode 100644 index 0000000..f8495d6 --- /dev/null +++ b/docs/latex/SFRenderer_8cpp__incl.md5 @@ -0,0 +1 @@ +1cfa52f60cc12e28be56ef08a6beb8d4 \ No newline at end of file diff --git a/docs/latex/SFRenderer_8cpp__incl.pdf b/docs/latex/SFRenderer_8cpp__incl.pdf new file mode 100644 index 0000000..1a1782c Binary files /dev/null and b/docs/latex/SFRenderer_8cpp__incl.pdf differ diff --git a/docs/latex/SFRenderer_8hpp.tex b/docs/latex/SFRenderer_8hpp.tex new file mode 100644 index 0000000..2bda94d --- /dev/null +++ b/docs/latex/SFRenderer_8hpp.tex @@ -0,0 +1,36 @@ +\hypertarget{SFRenderer_8hpp}{}\doxysection{sources/\+Renderer/\+S\+F\+Renderer.hpp File Reference} +\label{SFRenderer_8hpp}\index{sources/Renderer/SFRenderer.hpp@{sources/Renderer/SFRenderer.hpp}} +{\ttfamily \#include \char`\"{}I\+Renderer.\+hpp\char`\"{}}\newline +{\ttfamily \#include $<$S\+F\+M\+L/\+Graphics.\+hpp$>$}\newline +{\ttfamily \#include $<$S\+F\+M\+L/\+Audio.\+hpp$>$}\newline +{\ttfamily \#include $<$S\+F\+M\+L/\+System.\+hpp$>$}\newline +{\ttfamily \#include $<$S\+F\+M\+L/\+Window.\+hpp$>$}\newline +{\ttfamily \#include $<$S\+F\+M\+L/\+Graphics//\+Render\+Window.\+hpp$>$}\newline +Include dependency graph for S\+F\+Renderer.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{SFRenderer_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=261pt]{SFRenderer_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer}{Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer}} +\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Renderer}{Com\+Square\+::\+Renderer}} +\end{DoxyCompactItemize} diff --git a/docs/latex/SFRenderer_8hpp__dep__incl.md5 b/docs/latex/SFRenderer_8hpp__dep__incl.md5 new file mode 100644 index 0000000..be3b9c1 --- /dev/null +++ b/docs/latex/SFRenderer_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +be431ddd759de8dcb85bde82c802ae37 \ No newline at end of file diff --git a/docs/latex/SFRenderer_8hpp__dep__incl.pdf b/docs/latex/SFRenderer_8hpp__dep__incl.pdf new file mode 100644 index 0000000..6601614 Binary files /dev/null and b/docs/latex/SFRenderer_8hpp__dep__incl.pdf differ diff --git a/docs/latex/SFRenderer_8hpp__incl.md5 b/docs/latex/SFRenderer_8hpp__incl.md5 new file mode 100644 index 0000000..d37a644 --- /dev/null +++ b/docs/latex/SFRenderer_8hpp__incl.md5 @@ -0,0 +1 @@ +c9dec74ed3228e33b1caa05979c0af4c \ No newline at end of file diff --git a/docs/latex/SFRenderer_8hpp__incl.pdf b/docs/latex/SFRenderer_8hpp__incl.pdf new file mode 100644 index 0000000..d271944 Binary files /dev/null and b/docs/latex/SFRenderer_8hpp__incl.pdf differ diff --git a/docs/latex/SNES_8cpp.tex b/docs/latex/SNES_8cpp.tex new file mode 100644 index 0000000..44bac80 --- /dev/null +++ b/docs/latex/SNES_8cpp.tex @@ -0,0 +1,16 @@ +\hypertarget{SNES_8cpp}{}\doxysection{sources/\+S\+N\+ES.cpp File Reference} +\label{SNES_8cpp}\index{sources/SNES.cpp@{sources/SNES.cpp}} +{\ttfamily \#include \char`\"{}S\+N\+E\+S.\+hpp\char`\"{}}\newline +Include dependency graph for S\+N\+E\+S.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{SNES_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\end{DoxyCompactItemize} diff --git a/docs/latex/SNES_8cpp__incl.md5 b/docs/latex/SNES_8cpp__incl.md5 new file mode 100644 index 0000000..cf5669b --- /dev/null +++ b/docs/latex/SNES_8cpp__incl.md5 @@ -0,0 +1 @@ +65c92d2ab08a1f094740f9cfbdc22a54 \ No newline at end of file diff --git a/docs/latex/SNES_8cpp__incl.pdf b/docs/latex/SNES_8cpp__incl.pdf new file mode 100644 index 0000000..512a14c Binary files /dev/null and b/docs/latex/SNES_8cpp__incl.pdf differ diff --git a/docs/latex/SNES_8hpp.tex b/docs/latex/SNES_8hpp.tex new file mode 100644 index 0000000..7912c58 --- /dev/null +++ b/docs/latex/SNES_8hpp.tex @@ -0,0 +1,34 @@ +\hypertarget{SNES_8hpp}{}\doxysection{sources/\+S\+N\+ES.hpp File Reference} +\label{SNES_8hpp}\index{sources/SNES.hpp@{sources/SNES.hpp}} +{\ttfamily \#include \char`\"{}Memory/\+Memory\+Bus.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}C\+P\+U/\+C\+P\+U.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}Cartridge/\+Cartridge.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}Ram/\+Ram.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}P\+P\+U/\+P\+P\+U.\+hpp\char`\"{}}\newline +{\ttfamily \#include \char`\"{}A\+P\+U/\+A\+P\+U.\+hpp\char`\"{}}\newline +Include dependency graph for S\+N\+E\+S.\+hpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{SNES_8hpp__incl} +\end{center} +\end{figure} +This graph shows which files directly or indirectly include this file\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{SNES_8hpp__dep__incl} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +struct \mbox{\hyperlink{structComSquare_1_1SNES}{Com\+Square\+::\+S\+N\+ES}} +\begin{DoxyCompactList}\small\item\em Container of all the components of the \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}}. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare}{Com\+Square}} +\end{DoxyCompactItemize} diff --git a/docs/latex/SNES_8hpp__dep__incl.md5 b/docs/latex/SNES_8hpp__dep__incl.md5 new file mode 100644 index 0000000..2e45c2e --- /dev/null +++ b/docs/latex/SNES_8hpp__dep__incl.md5 @@ -0,0 +1 @@ +3db5e6cc52f62533d785b9ff217d8cc7 \ No newline at end of file diff --git a/docs/latex/SNES_8hpp__dep__incl.pdf b/docs/latex/SNES_8hpp__dep__incl.pdf new file mode 100644 index 0000000..8aa8275 Binary files /dev/null and b/docs/latex/SNES_8hpp__dep__incl.pdf differ diff --git a/docs/latex/SNES_8hpp__incl.md5 b/docs/latex/SNES_8hpp__incl.md5 new file mode 100644 index 0000000..7779489 --- /dev/null +++ b/docs/latex/SNES_8hpp__incl.md5 @@ -0,0 +1 @@ +f3750f62bac0cc350a56da3b9053e578 \ No newline at end of file diff --git a/docs/latex/SNES_8hpp__incl.pdf b/docs/latex/SNES_8hpp__incl.pdf new file mode 100644 index 0000000..debbd26 Binary files /dev/null and b/docs/latex/SNES_8hpp__incl.pdf differ diff --git a/docs/latex/TargetDirectories_8txt.tex b/docs/latex/TargetDirectories_8txt.tex new file mode 100644 index 0000000..376ecfc --- /dev/null +++ b/docs/latex/TargetDirectories_8txt.tex @@ -0,0 +1,2 @@ +\hypertarget{TargetDirectories_8txt}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/\+Target\+Directories.txt File Reference} +\label{TargetDirectories_8txt}\index{cmake-\/build-\/debug/CMakeFiles/TargetDirectories.txt@{cmake-\/build-\/debug/CMakeFiles/TargetDirectories.txt}} diff --git a/docs/latex/annotated.tex b/docs/latex/annotated.tex new file mode 100644 index 0000000..f4d2a0b --- /dev/null +++ b/docs/latex/annotated.tex @@ -0,0 +1,29 @@ +\doxysection{Class List} +Here are the classes, structs, unions and interfaces with brief descriptions\+:\begin{DoxyCompactList} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{Com\+Square\+::\+A\+P\+U\+::\+A\+PU}} }{\pageref{classComSquare_1_1APU_1_1APU}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge}{Com\+Square\+::\+Cartridge\+::\+Cartridge}} \\*Contains the rom\textquotesingle{}s memory/instructions }{\pageref{classComSquare_1_1Cartridge_1_1Cartridge}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{Com\+Square\+::\+C\+P\+U\+::\+C\+PU}} \\*The main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} }{\pageref{classComSquare_1_1CPU_1_1CPU}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+SP}} }{\pageref{classComSquare_1_1APU_1_1DSP_1_1DSP}}{} +\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header}{Com\+Square\+::\+Cartridge\+::\+Header}} }{\pageref{structComSquare_1_1Cartridge_1_1Header}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{Com\+Square\+::\+Memory\+::\+I\+Memory}} \\*Common interface implemented by all components mapping memory }{\pageref{classComSquare_1_1Memory_1_1IMemory}}{} +\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters}{Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers}} }{\pageref{structComSquare_1_1APU_1_1InternalRegisters}}{} +\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters}{Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers}} \\*Struct containing internal registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} }{\pageref{structComSquare_1_1CPU_1_1InternalRegisters}}{} +\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors}{Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors}} }{\pageref{structComSquare_1_1Cartridge_1_1InterruptVectors}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1InvalidAction}{Com\+Square\+::\+Invalid\+Action}} \\*Exception thrown when someone tries to load an invalid rom }{\pageref{classComSquare_1_1InvalidAction}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Com\+Square\+::\+Invalid\+Address}} \\*Exception thrown when trying to read/write to an invalid address }{\pageref{classComSquare_1_1InvalidAddress}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1InvalidRomException}{Com\+Square\+::\+Invalid\+Rom\+Exception}} \\*Exception thrown when someone tries to load an invalid rom }{\pageref{classComSquare_1_1InvalidRomException}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}} \\*Superset of the \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at F\+F\+FF) }{\pageref{classComSquare_1_1Memory_1_1IRectangleMemory}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer}{Com\+Square\+::\+Renderer\+::\+I\+Renderer}} }{\pageref{classComSquare_1_1Renderer_1_1IRenderer}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Com\+Square\+::\+Memory\+::\+Memory\+Bus}} \\*The memory bus is the component responsible of mapping addresses to components address and transmitting the data }{\pageref{classComSquare_1_1Memory_1_1MemoryBus}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow}{Com\+Square\+::\+Memory\+::\+Memory\+Shadow}} }{\pageref{classComSquare_1_1Memory_1_1MemoryShadow}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1NotImplementedException}{Com\+Square\+::\+Not\+Implemented\+Exception}} \\*When this is thrown, it means that we should work more }{\pageref{classComSquare_1_1NotImplementedException}}{} +\item\contentsline{section}{\mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p}{Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p}} \\*The Processor status register; }{\pageref{unionComSquare_1_1CPU_1_1Registers_1_1p}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{Com\+Square\+::\+P\+P\+U\+::\+P\+PU}} \\*The struct containing all the registers the \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}} }{\pageref{classComSquare_1_1PPU_1_1PPU}}{} +\item\contentsline{section}{\mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}{Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw}} \\*Program Status Word register }{\pageref{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram}{Com\+Square\+::\+Ram\+::\+Ram}} }{\pageref{classComSquare_1_1Ram_1_1Ram}}{} +\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers}{Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers}} \\*All the registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}} }{\pageref{structComSquare_1_1APU_1_1DSP_1_1Registers}}{} +\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1APU_1_1Registers}{Com\+Square\+::\+A\+P\+U\+::\+Registers}} }{\pageref{structComSquare_1_1APU_1_1Registers}}{} +\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Com\+Square\+::\+C\+P\+U\+::\+Registers}} \\*Struct containing registers for the main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} }{\pageref{structComSquare_1_1CPU_1_1Registers}}{} +\item\contentsline{section}{\mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer}{Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer}} }{\pageref{classComSquare_1_1Renderer_1_1SFRenderer}}{} +\item\contentsline{section}{\mbox{\hyperlink{structComSquare_1_1SNES}{Com\+Square\+::\+S\+N\+ES}} \\*Container of all the components of the \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} }{\pageref{structComSquare_1_1SNES}}{} +\end{DoxyCompactList} diff --git a/docs/latex/classComSquare_1_1APU_1_1APU.tex b/docs/latex/classComSquare_1_1APU_1_1APU.tex new file mode 100644 index 0000000..c496826 --- /dev/null +++ b/docs/latex/classComSquare_1_1APU_1_1APU.tex @@ -0,0 +1,156 @@ +\hypertarget{classComSquare_1_1APU_1_1APU}{}\doxysection{Com\+Square\+::A\+PU\+::A\+PU Class Reference} +\label{classComSquare_1_1APU_1_1APU}\index{ComSquare::APU::APU@{ComSquare::APU::APU}} + + +{\ttfamily \#include $<$A\+P\+U.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::A\+PU\+::A\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=205pt]{classComSquare_1_1APU_1_1APU__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::A\+PU\+::A\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{classComSquare_1_1APU_1_1APU__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1APU_1_1APU_af94d2f262bb9114bdd022da37f8ec5b3}{A\+PU}} () +\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1APU_1_1APU_acf11685da76ce208cf57a4209cdbd0c2}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Read from the internal \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+PU}} register. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1APU_1_1APU_ab77224524520cbad442e89f3663cf67f}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) override +\begin{DoxyCompactList}\small\item\em Write data to the internal \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+PU}} register. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{classComSquare_1_1APU_1_1APU_a5cea0122578d14d4ff3a9aead1322bba}{update}} () +\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{structComSquare_1_1APU_1_1Registers}{Registers}} \mbox{\hyperlink{classComSquare_1_1APU_1_1APU_a31a0eee6623c22ecc1ba891fefec8e3f}{\+\_\+registers}} \{\} +\begin{DoxyCompactList}\small\item\em All the registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+PU}} \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}}. \end{DoxyCompactList}\item +\mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters}{Internal\+Registers}} \mbox{\hyperlink{classComSquare_1_1APU_1_1APU_a6f6c534e0f850c7882cefdc5455aedca}{\+\_\+internal\+Registers}} \{\} +\begin{DoxyCompactList}\small\item\em Internal registers of the \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}} (accessible from the bus via addr \$4200 to \$421F). \end{DoxyCompactList}\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+S\+P\+::\+D\+SP}} $>$ \mbox{\hyperlink{classComSquare_1_1APU_1_1APU_a08e24ceee57a5b40da0fcd31652c858b}{\+\_\+dsp}} +\begin{DoxyCompactList}\small\item\em The \mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{D\+SP}} component used to produce sound. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1APU_1_1APU_af94d2f262bb9114bdd022da37f8ec5b3}\label{classComSquare_1_1APU_1_1APU_af94d2f262bb9114bdd022da37f8ec5b3}} +\index{ComSquare::APU::APU@{ComSquare::APU::APU}!APU@{APU}} +\index{APU@{APU}!ComSquare::APU::APU@{ComSquare::APU::APU}} +\doxysubsubsection{\texorpdfstring{APU()}{APU()}} +{\footnotesize\ttfamily Com\+Square\+::\+A\+P\+U\+::\+A\+P\+U\+::\+A\+PU (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [explicit]}} + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1APU_1_1APU_acf11685da76ce208cf57a4209cdbd0c2}\label{classComSquare_1_1APU_1_1APU_acf11685da76ce208cf57a4209cdbd0c2}} +\index{ComSquare::APU::APU@{ComSquare::APU::APU}!read@{read}} +\index{read@{read}!ComSquare::APU::APU@{ComSquare::APU::APU}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+A\+P\+U\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Read from the internal \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+PU}} register. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to read from. The address 0x\+F0 should refer to the first byte of the register. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than \$\+FF (the number of register). \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the value of the register. +\end{DoxyReturn} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1APU_1_1APU_a5cea0122578d14d4ff3a9aead1322bba}\label{classComSquare_1_1APU_1_1APU_a5cea0122578d14d4ff3a9aead1322bba}} +\index{ComSquare::APU::APU@{ComSquare::APU::APU}!update@{update}} +\index{update@{update}!ComSquare::APU::APU@{ComSquare::APU::APU}} +\doxysubsubsection{\texorpdfstring{update()}{update()}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+A\+P\+U\+::update (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})} + +\mbox{\Hypertarget{classComSquare_1_1APU_1_1APU_ab77224524520cbad442e89f3663cf67f}\label{classComSquare_1_1APU_1_1APU_ab77224524520cbad442e89f3663cf67f}} +\index{ComSquare::APU::APU@{ComSquare::APU::APU}!write@{write}} +\index{write@{write}!ComSquare::APU::APU@{ComSquare::APU::APU}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily void Com\+Square\+::\+A\+P\+U\+::\+A\+P\+U\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Write data to the internal \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+PU}} register. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to write to. The address 0x\+F0 should refer to the first byte of register. \\ +\hline +{\em data} & The new value of the register. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than \$\+FF (the number of register). \\ +\hline +\end{DoxyExceptions} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1APU_1_1APU_a08e24ceee57a5b40da0fcd31652c858b}\label{classComSquare_1_1APU_1_1APU_a08e24ceee57a5b40da0fcd31652c858b}} +\index{ComSquare::APU::APU@{ComSquare::APU::APU}!\_dsp@{\_dsp}} +\index{\_dsp@{\_dsp}!ComSquare::APU::APU@{ComSquare::APU::APU}} +\doxysubsubsection{\texorpdfstring{\_dsp}{\_dsp}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+S\+P\+::\+D\+SP}}$>$ Com\+Square\+::\+A\+P\+U\+::\+A\+P\+U\+::\+\_\+dsp\hspace{0.3cm}{\ttfamily [private]}} + + + +The \mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{D\+SP}} component used to produce sound. + +\mbox{\Hypertarget{classComSquare_1_1APU_1_1APU_a6f6c534e0f850c7882cefdc5455aedca}\label{classComSquare_1_1APU_1_1APU_a6f6c534e0f850c7882cefdc5455aedca}} +\index{ComSquare::APU::APU@{ComSquare::APU::APU}!\_internalRegisters@{\_internalRegisters}} +\index{\_internalRegisters@{\_internalRegisters}!ComSquare::APU::APU@{ComSquare::APU::APU}} +\doxysubsubsection{\texorpdfstring{\_internalRegisters}{\_internalRegisters}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters}{Internal\+Registers}} Com\+Square\+::\+A\+P\+U\+::\+A\+P\+U\+::\+\_\+internal\+Registers \{\}\hspace{0.3cm}{\ttfamily [private]}} + + + +Internal registers of the \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}} (accessible from the bus via addr \$4200 to \$421F). + +\mbox{\Hypertarget{classComSquare_1_1APU_1_1APU_a31a0eee6623c22ecc1ba891fefec8e3f}\label{classComSquare_1_1APU_1_1APU_a31a0eee6623c22ecc1ba891fefec8e3f}} +\index{ComSquare::APU::APU@{ComSquare::APU::APU}!\_registers@{\_registers}} +\index{\_registers@{\_registers}!ComSquare::APU::APU@{ComSquare::APU::APU}} +\doxysubsubsection{\texorpdfstring{\_registers}{\_registers}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers}{Registers}} Com\+Square\+::\+A\+P\+U\+::\+A\+P\+U\+::\+\_\+registers \{\}\hspace{0.3cm}{\ttfamily [private]}} + + + +All the registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+PU}} \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}}. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+A\+P\+U/\mbox{\hyperlink{APU_8hpp}{A\+P\+U.\+hpp}}\item +sources/\+A\+P\+U/\mbox{\hyperlink{APU_8cpp}{A\+P\+U.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1APU_1_1APU__coll__graph.md5 b/docs/latex/classComSquare_1_1APU_1_1APU__coll__graph.md5 new file mode 100644 index 0000000..489e767 --- /dev/null +++ b/docs/latex/classComSquare_1_1APU_1_1APU__coll__graph.md5 @@ -0,0 +1 @@ +5d9e5f5afd86e5b5a0c4fe49b2354547 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1APU_1_1APU__coll__graph.pdf b/docs/latex/classComSquare_1_1APU_1_1APU__coll__graph.pdf new file mode 100644 index 0000000..d7338fa Binary files /dev/null and b/docs/latex/classComSquare_1_1APU_1_1APU__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1APU_1_1APU__inherit__graph.md5 b/docs/latex/classComSquare_1_1APU_1_1APU__inherit__graph.md5 new file mode 100644 index 0000000..48a8a79 --- /dev/null +++ b/docs/latex/classComSquare_1_1APU_1_1APU__inherit__graph.md5 @@ -0,0 +1 @@ +26798a325b57f1d4f71e4a59b28c8457 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1APU_1_1APU__inherit__graph.pdf b/docs/latex/classComSquare_1_1APU_1_1APU__inherit__graph.pdf new file mode 100644 index 0000000..2c4a22d Binary files /dev/null and b/docs/latex/classComSquare_1_1APU_1_1APU__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP.tex b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP.tex new file mode 100644 index 0000000..5292517 --- /dev/null +++ b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP.tex @@ -0,0 +1,148 @@ +\hypertarget{classComSquare_1_1APU_1_1DSP_1_1DSP}{}\doxysection{Com\+Square\+::A\+PU\+::D\+SP\+::D\+SP Class Reference} +\label{classComSquare_1_1APU_1_1DSP_1_1DSP}\index{ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}} + + +{\ttfamily \#include $<$D\+S\+P.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::A\+PU\+::D\+SP\+::D\+SP\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=230pt]{classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::A\+PU\+::D\+SP\+::D\+SP\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=348pt]{classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP_a486750b4821dfdfb98fff9273462d1f2}{D\+SP}} () +\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP_acee7abd47b8b5d2f4971ddcfceb26111}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Read from the internal \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}} register. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP_a5dcd5917875b1dbb0e6b9185aa8bfef2}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) override +\begin{DoxyCompactList}\small\item\em Write data to the internal \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}} register. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers}{Registers}} \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP_a65e76db7e52c15d195cbe4469b51cd5f}{\+\_\+registers}} \{\} +\begin{DoxyCompactList}\small\item\em All registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}}. \end{DoxyCompactList}\item +sf\+::\+Sound \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP_aa0539ae8604e369da70fa7f49476e28c}{\+\_\+channels}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em 8x channels of sample used to make sound \end{DoxyCompactList}\item +sf\+::\+Sound\+Buffer \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP_ac153734bc63349159d8f972ef426f39a}{\+\_\+sound\+Buffer}} +\begin{DoxyCompactList}\small\item\em A buffer containing current wave. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1APU_1_1DSP_1_1DSP_a486750b4821dfdfb98fff9273462d1f2}\label{classComSquare_1_1APU_1_1DSP_1_1DSP_a486750b4821dfdfb98fff9273462d1f2}} +\index{ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}!DSP@{DSP}} +\index{DSP@{DSP}!ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}} +\doxysubsubsection{\texorpdfstring{DSP()}{DSP()}} +{\footnotesize\ttfamily Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+S\+P\+::\+D\+SP (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [explicit]}} + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1APU_1_1DSP_1_1DSP_acee7abd47b8b5d2f4971ddcfceb26111}\label{classComSquare_1_1APU_1_1DSP_1_1DSP_acee7abd47b8b5d2f4971ddcfceb26111}} +\index{ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}!read@{read}} +\index{read@{read}!ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+S\+P\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Read from the internal \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}} register. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to read from. The address 0x0 should refer to the first byte of the register. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than \$7F (the number of register). \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the value of the register. +\end{DoxyReturn} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1APU_1_1DSP_1_1DSP_a5dcd5917875b1dbb0e6b9185aa8bfef2}\label{classComSquare_1_1APU_1_1DSP_1_1DSP_a5dcd5917875b1dbb0e6b9185aa8bfef2}} +\index{ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}!write@{write}} +\index{write@{write}!ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily void Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+S\+P\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Write data to the internal \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}} register. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to write to. The address 0x0 should refer to the first byte of register. \\ +\hline +{\em data} & The new value of the register. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than \$7F (the number of register). \\ +\hline +\end{DoxyExceptions} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1APU_1_1DSP_1_1DSP_aa0539ae8604e369da70fa7f49476e28c}\label{classComSquare_1_1APU_1_1DSP_1_1DSP_aa0539ae8604e369da70fa7f49476e28c}} +\index{ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}!\_channels@{\_channels}} +\index{\_channels@{\_channels}!ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}} +\doxysubsubsection{\texorpdfstring{\_channels}{\_channels}} +{\footnotesize\ttfamily sf\+::\+Sound Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+S\+P\+::\+\_\+channels\mbox{[}8\mbox{]}\hspace{0.3cm}{\ttfamily [private]}} + + + +8x channels of sample used to make sound + +\mbox{\Hypertarget{classComSquare_1_1APU_1_1DSP_1_1DSP_a65e76db7e52c15d195cbe4469b51cd5f}\label{classComSquare_1_1APU_1_1DSP_1_1DSP_a65e76db7e52c15d195cbe4469b51cd5f}} +\index{ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}!\_registers@{\_registers}} +\index{\_registers@{\_registers}!ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}} +\doxysubsubsection{\texorpdfstring{\_registers}{\_registers}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers}{Registers}} Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+S\+P\+::\+\_\+registers \{\}\hspace{0.3cm}{\ttfamily [private]}} + + + +All registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}}. + +\mbox{\Hypertarget{classComSquare_1_1APU_1_1DSP_1_1DSP_ac153734bc63349159d8f972ef426f39a}\label{classComSquare_1_1APU_1_1DSP_1_1DSP_ac153734bc63349159d8f972ef426f39a}} +\index{ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}!\_soundBuffer@{\_soundBuffer}} +\index{\_soundBuffer@{\_soundBuffer}!ComSquare::APU::DSP::DSP@{ComSquare::APU::DSP::DSP}} +\doxysubsubsection{\texorpdfstring{\_soundBuffer}{\_soundBuffer}} +{\footnotesize\ttfamily sf\+::\+Sound\+Buffer Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+S\+P\+::\+\_\+sound\+Buffer\hspace{0.3cm}{\ttfamily [private]}} + + + +A buffer containing current wave. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+D\+S\+P/\mbox{\hyperlink{DSP_8hpp}{D\+S\+P.\+hpp}}\item +sources/\+D\+S\+P/\mbox{\hyperlink{DSP_8cpp}{D\+S\+P.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.md5 b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.md5 new file mode 100644 index 0000000..f2059a4 --- /dev/null +++ b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.md5 @@ -0,0 +1 @@ +5d06b3ffa18725205eb61a3b3117937c \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.pdf b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.pdf new file mode 100644 index 0000000..4084b56 Binary files /dev/null and b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.md5 b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.md5 new file mode 100644 index 0000000..86defcf --- /dev/null +++ b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.md5 @@ -0,0 +1 @@ +2b1a740d780aff5dd426d1f37d866f18 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.pdf b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.pdf new file mode 100644 index 0000000..2290ac1 Binary files /dev/null and b/docs/latex/classComSquare_1_1APU_1_1DSP_1_1DSP__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1CPU_1_1CPU.tex b/docs/latex/classComSquare_1_1CPU_1_1CPU.tex new file mode 100644 index 0000000..cc5480e --- /dev/null +++ b/docs/latex/classComSquare_1_1CPU_1_1CPU.tex @@ -0,0 +1,203 @@ +\hypertarget{classComSquare_1_1CPU_1_1CPU}{}\doxysection{Com\+Square\+::C\+PU\+::C\+PU Class Reference} +\label{classComSquare_1_1CPU_1_1CPU}\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} + + +The main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. + + + + +{\ttfamily \#include $<$C\+P\+U.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::C\+PU\+::C\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=205pt]{classComSquare_1_1CPU_1_1CPU__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::C\+PU\+::C\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{classComSquare_1_1CPU_1_1CPU__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_ae5cb2a71ebba5f4519793582880f31f2}{C\+PU}} (std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Memory\+::\+Memory\+Bus}} $>$ bus) +\item +\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_a47ccd3b85569b89baa73679eac513ab0}{update}} () +\begin{DoxyCompactList}\small\item\em This function continue to execute the \mbox{\hyperlink{namespaceComSquare_1_1Cartridge}{Cartridge}} code. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_a2f5e100896256e62f1995a0172f3a5e5}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Read from the internal \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} register. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_a98d7a910393934e63f4ea479cea49f2e}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) override +\begin{DoxyCompactList}\small\item\em Write data to the internal \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} register. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_acb160633242110e7b285ee5a5d5f6ff9}{execute\+Instruction}} () +\begin{DoxyCompactList}\small\item\em Execute a single instruction. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_a579c0dd2e1cafca0dd3617c05a33d1f7}{\+\_\+registers}} \{\} +\begin{DoxyCompactList}\small\item\em All the registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_ac9c6fa76bf7171654b0b52896f699927}{\+\_\+is\+Emulation\+Mode}} = true +\begin{DoxyCompactList}\small\item\em Is the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} running in emulation mode (in 8bits) \end{DoxyCompactList}\item +\mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters}{Internal\+Registers}} \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_a4566720e2cf2ce891a1332932c2f1e0e}{\+\_\+internal\+Registers}} \{\} +\begin{DoxyCompactList}\small\item\em Internal registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} (accessible from the bus via addr \$4200 to \$421F). \end{DoxyCompactList}\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Memory\+::\+Memory\+Bus}} $>$ \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_a7118a772fbf88584fc671eba1d5c2e3f}{\+\_\+bus}} +\begin{DoxyCompactList}\small\item\em The memory bus to use for read/write. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +The main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_ae5cb2a71ebba5f4519793582880f31f2}\label{classComSquare_1_1CPU_1_1CPU_ae5cb2a71ebba5f4519793582880f31f2}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!CPU@{CPU}} +\index{CPU@{CPU}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{CPU()}{CPU()}} +{\footnotesize\ttfamily Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::\+C\+PU (\begin{DoxyParamCaption}\item[{std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Memory\+::\+Memory\+Bus}} $>$}]{bus }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [explicit]}} + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_acb160633242110e7b285ee5a5d5f6ff9}\label{classComSquare_1_1CPU_1_1CPU_acb160633242110e7b285ee5a5d5f6ff9}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!executeInstruction@{executeInstruction}} +\index{executeInstruction@{executeInstruction}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{executeInstruction()}{executeInstruction()}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::execute\+Instruction (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [private]}} + + + +Execute a single instruction. + +\begin{DoxyReturn}{Returns} +The number of \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} cycles that the instruction took. +\end{DoxyReturn} +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_a2f5e100896256e62f1995a0172f3a5e5}\label{classComSquare_1_1CPU_1_1CPU_a2f5e100896256e62f1995a0172f3a5e5}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!read@{read}} +\index{read@{read}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Read from the internal \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} register. + +@bref The \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}\textquotesingle{}s internal registers starts at \$4200 and finish at \$421F. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to read from. The address 0x0 should refer to the first byte of the register. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than \$1F (the number of register). \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the value of the register. +\end{DoxyReturn} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_a47ccd3b85569b89baa73679eac513ab0}\label{classComSquare_1_1CPU_1_1CPU_a47ccd3b85569b89baa73679eac513ab0}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!update@{update}} +\index{update@{update}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{update()}{update()}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::update (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})} + + + +This function continue to execute the \mbox{\hyperlink{namespaceComSquare_1_1Cartridge}{Cartridge}} code. + +\begin{DoxyReturn}{Returns} +The number of \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} cycles that elapsed +\end{DoxyReturn} +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_a98d7a910393934e63f4ea479cea49f2e}\label{classComSquare_1_1CPU_1_1CPU_a98d7a910393934e63f4ea479cea49f2e}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!write@{write}} +\index{write@{write}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily void Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Write data to the internal \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} register. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to write to. The address 0x0 should refer to the first byte of register. \\ +\hline +{\em data} & The new value of the register. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than \$1F (the number of register). \\ +\hline +\end{DoxyExceptions} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_a7118a772fbf88584fc671eba1d5c2e3f}\label{classComSquare_1_1CPU_1_1CPU_a7118a772fbf88584fc671eba1d5c2e3f}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!\_bus@{\_bus}} +\index{\_bus@{\_bus}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{\_bus}{\_bus}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Memory\+::\+Memory\+Bus}}$>$ Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::\+\_\+bus\hspace{0.3cm}{\ttfamily [private]}} + + + +The memory bus to use for read/write. + +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_a4566720e2cf2ce891a1332932c2f1e0e}\label{classComSquare_1_1CPU_1_1CPU_a4566720e2cf2ce891a1332932c2f1e0e}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!\_internalRegisters@{\_internalRegisters}} +\index{\_internalRegisters@{\_internalRegisters}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{\_internalRegisters}{\_internalRegisters}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters}{Internal\+Registers}} Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::\+\_\+internal\+Registers \{\}\hspace{0.3cm}{\ttfamily [private]}} + + + +Internal registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} (accessible from the bus via addr \$4200 to \$421F). + +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_ac9c6fa76bf7171654b0b52896f699927}\label{classComSquare_1_1CPU_1_1CPU_ac9c6fa76bf7171654b0b52896f699927}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!\_isEmulationMode@{\_isEmulationMode}} +\index{\_isEmulationMode@{\_isEmulationMode}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{\_isEmulationMode}{\_isEmulationMode}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::\+\_\+is\+Emulation\+Mode = true\hspace{0.3cm}{\ttfamily [private]}} + + + +Is the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} running in emulation mode (in 8bits) + +\mbox{\Hypertarget{classComSquare_1_1CPU_1_1CPU_a579c0dd2e1cafca0dd3617c05a33d1f7}\label{classComSquare_1_1CPU_1_1CPU_a579c0dd2e1cafca0dd3617c05a33d1f7}} +\index{ComSquare::CPU::CPU@{ComSquare::CPU::CPU}!\_registers@{\_registers}} +\index{\_registers@{\_registers}!ComSquare::CPU::CPU@{ComSquare::CPU::CPU}} +\doxysubsubsection{\texorpdfstring{\_registers}{\_registers}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} Com\+Square\+::\+C\+P\+U\+::\+C\+P\+U\+::\+\_\+registers \{\}\hspace{0.3cm}{\ttfamily [private]}} + + + +All the registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+C\+P\+U/\mbox{\hyperlink{CPU_8hpp}{C\+P\+U.\+hpp}}\item +sources/\+C\+P\+U/\mbox{\hyperlink{CPU_8cpp}{C\+P\+U.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1CPU_1_1CPU__coll__graph.md5 b/docs/latex/classComSquare_1_1CPU_1_1CPU__coll__graph.md5 new file mode 100644 index 0000000..62e2af3 --- /dev/null +++ b/docs/latex/classComSquare_1_1CPU_1_1CPU__coll__graph.md5 @@ -0,0 +1 @@ +b86a512e3e89dcc57e3e9f1d6ca2e2e8 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1CPU_1_1CPU__coll__graph.pdf b/docs/latex/classComSquare_1_1CPU_1_1CPU__coll__graph.pdf new file mode 100644 index 0000000..2f7feba Binary files /dev/null and b/docs/latex/classComSquare_1_1CPU_1_1CPU__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1CPU_1_1CPU__inherit__graph.md5 b/docs/latex/classComSquare_1_1CPU_1_1CPU__inherit__graph.md5 new file mode 100644 index 0000000..8c52577 --- /dev/null +++ b/docs/latex/classComSquare_1_1CPU_1_1CPU__inherit__graph.md5 @@ -0,0 +1 @@ +30d44f055f63bb2012cfb16e537b19ef \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1CPU_1_1CPU__inherit__graph.pdf b/docs/latex/classComSquare_1_1CPU_1_1CPU__inherit__graph.pdf new file mode 100644 index 0000000..5ba4a99 Binary files /dev/null and b/docs/latex/classComSquare_1_1CPU_1_1CPU__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge.tex b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge.tex new file mode 100644 index 0000000..3b4009b --- /dev/null +++ b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge.tex @@ -0,0 +1,251 @@ +\hypertarget{classComSquare_1_1Cartridge_1_1Cartridge}{}\doxysection{Com\+Square\+::Cartridge\+::Cartridge Class Reference} +\label{classComSquare_1_1Cartridge_1_1Cartridge}\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} + + +Contains the rom\textquotesingle{}s memory/instructions. + + + + +{\ttfamily \#include $<$Cartridge.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Cartridge\+::Cartridge\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[height=550pt]{classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Cartridge\+::Cartridge\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[height=550pt]{classComSquare_1_1Cartridge_1_1Cartridge__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_ad84333cbf5cd4f265a1b9b78a39215a7}{Cartridge}} (const std\+::string \&rom\+Path) +\begin{DoxyCompactList}\small\item\em Load a rom from it\textquotesingle{}s path. \end{DoxyCompactList}\item +\mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_aee03a2960a75f1988c432dac4c96f3d7}{$\sim$\+Cartridge}} () +\begin{DoxyCompactList}\small\item\em Destructor that free the cartridge data. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a940771d62cb665381e89d8c841fdad72}{read\+\_\+internal}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Read from the rom. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a02d9c1db34d043234aef35a7357356fd}{write\+\_\+internal}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) override +\begin{DoxyCompactList}\small\item\em Write data to the rom. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header}{Header}} \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a93c463170a03e3bb59a50ba78b2c60a1}{header}} +\begin{DoxyCompactList}\small\item\em The header of the cartridge. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Member Functions} +\begin{DoxyCompactItemize} +\item +bool \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a1dbd870d1ad8bfe25426cc7fd263deab}{\+\_\+load\+Header}} () +\begin{DoxyCompactList}\small\item\em Set the public variable header by parsing the header in the R\+OM. \end{DoxyCompactList}\item +uint32\+\_\+t \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_abfbecf451634e5699593ac9fea940356}{\+\_\+get\+Header\+Address}} () +\begin{DoxyCompactList}\small\item\em Get the address of the header. \end{DoxyCompactList}\item +\mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header}{Header}} \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a669043a0708921bed0bc18c37abb1c96}{\+\_\+map\+Header}} (uint32\+\_\+t header\+Address) +\begin{DoxyCompactList}\small\item\em Parse the memory to get a readable header. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Static Private Member Functions} +\begin{DoxyCompactItemize} +\item +static size\+\_\+t \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a2312babcc070998f38da5a90e4c3bb7b}{get\+Rom\+Size}} (const std\+::string \&rom\+Path) +\begin{DoxyCompactList}\small\item\em Get the size of a rom from it\textquotesingle{}s path. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t $\ast$ \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a7ac6ff859255d44689e2028e3a561980}{\+\_\+data}} +\begin{DoxyCompactList}\small\item\em The rom data (contains all the instructions). \end{DoxyCompactList}\item +size\+\_\+t \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a9e66e4f0ff9d213d86ca81800228f3a1}{\+\_\+size}} +\begin{DoxyCompactList}\small\item\em The size of the rom data. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Contains the rom\textquotesingle{}s memory/instructions. + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_ad84333cbf5cd4f265a1b9b78a39215a7}\label{classComSquare_1_1Cartridge_1_1Cartridge_ad84333cbf5cd4f265a1b9b78a39215a7}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!Cartridge@{Cartridge}} +\index{Cartridge@{Cartridge}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{Cartridge()}{Cartridge()}} +{\footnotesize\ttfamily Com\+Square\+::\+Cartridge\+::\+Cartridge\+::\+Cartridge (\begin{DoxyParamCaption}\item[{const std\+::string \&}]{rom\+Path }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [explicit]}} + + + +Load a rom from it\textquotesingle{}s path. + +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_aee03a2960a75f1988c432dac4c96f3d7}\label{classComSquare_1_1Cartridge_1_1Cartridge_aee03a2960a75f1988c432dac4c96f3d7}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!````~Cartridge@{$\sim$Cartridge}} +\index{````~Cartridge@{$\sim$Cartridge}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{$\sim$Cartridge()}{~Cartridge()}} +{\footnotesize\ttfamily Com\+Square\+::\+Cartridge\+::\+Cartridge\+::$\sim$\+Cartridge (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})} + + + +Destructor that free the cartridge data. + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_abfbecf451634e5699593ac9fea940356}\label{classComSquare_1_1Cartridge_1_1Cartridge_abfbecf451634e5699593ac9fea940356}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!\_getHeaderAddress@{\_getHeaderAddress}} +\index{\_getHeaderAddress@{\_getHeaderAddress}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{\_getHeaderAddress()}{\_getHeaderAddress()}} +{\footnotesize\ttfamily uint32\+\_\+t Com\+Square\+::\+Cartridge\+::\+Cartridge\+::\+\_\+get\+Header\+Address (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [private]}} + + + +Get the address of the header. + +\begin{DoxyReturn}{Returns} +The address of this cartridge header. +\end{DoxyReturn} +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_a1dbd870d1ad8bfe25426cc7fd263deab}\label{classComSquare_1_1Cartridge_1_1Cartridge_a1dbd870d1ad8bfe25426cc7fd263deab}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!\_loadHeader@{\_loadHeader}} +\index{\_loadHeader@{\_loadHeader}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{\_loadHeader()}{\_loadHeader()}} +{\footnotesize\ttfamily bool Com\+Square\+::\+Cartridge\+::\+Cartridge\+::\+\_\+load\+Header (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [private]}} + + + +Set the public variable header by parsing the header in the R\+OM. + +\begin{DoxyReturn}{Returns} +True if this cartridge has a S\+CM header, false otherwise. +\end{DoxyReturn} +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_a669043a0708921bed0bc18c37abb1c96}\label{classComSquare_1_1Cartridge_1_1Cartridge_a669043a0708921bed0bc18c37abb1c96}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!\_mapHeader@{\_mapHeader}} +\index{\_mapHeader@{\_mapHeader}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{\_mapHeader()}{\_mapHeader()}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header}{Header}} Com\+Square\+::\+Cartridge\+::\+Cartridge\+::\+\_\+map\+Header (\begin{DoxyParamCaption}\item[{uint32\+\_\+t}]{header\+Address }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [private]}} + + + +Parse the memory to get a readable header. + + +\begin{DoxyParams}{Parameters} +{\em header\+Address} & The address you want to parse. \\ +\hline +\end{DoxyParams} +\begin{DoxyReturn}{Returns} +A header struct representing the data at the memory address you passed. +\end{DoxyReturn} +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_a2312babcc070998f38da5a90e4c3bb7b}\label{classComSquare_1_1Cartridge_1_1Cartridge_a2312babcc070998f38da5a90e4c3bb7b}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!getRomSize@{getRomSize}} +\index{getRomSize@{getRomSize}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{getRomSize()}{getRomSize()}} +{\footnotesize\ttfamily size\+\_\+t Com\+Square\+::\+Cartridge\+::\+Cartridge\+::get\+Rom\+Size (\begin{DoxyParamCaption}\item[{const std\+::string \&}]{rom\+Path }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}, {\ttfamily [private]}} + + + +Get the size of a rom from it\textquotesingle{}s path. + + +\begin{DoxyParams}{Parameters} +{\em rom\+Path} & The path of the rom to get info from. \\ +\hline +\end{DoxyParams} +\begin{DoxyReturn}{Returns} +The size of the rom. +\end{DoxyReturn} +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_a940771d62cb665381e89d8c841fdad72}\label{classComSquare_1_1Cartridge_1_1Cartridge_a940771d62cb665381e89d8c841fdad72}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!read\_internal@{read\_internal}} +\index{read\_internal@{read\_internal}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{read\_internal()}{read\_internal()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Cartridge\+::read\+\_\+internal (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Read from the rom. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to read from. The address 0x0 should refer to the first byte of the rom\textquotesingle{}s memory. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than the size of the rom\textquotesingle{}s memory. \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the data at the address. +\end{DoxyReturn} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a2a239baa265b31e222d4e5b0a9d2d5e0}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_a02d9c1db34d043234aef35a7357356fd}\label{classComSquare_1_1Cartridge_1_1Cartridge_a02d9c1db34d043234aef35a7357356fd}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!write\_internal@{write\_internal}} +\index{write\_internal@{write\_internal}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{write\_internal()}{write\_internal()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Cartridge\+::\+Cartridge\+::write\+\_\+internal (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Write data to the rom. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to write to. The address 0x0 should refer to the first byte of the rom\textquotesingle{}s memory. \\ +\hline +{\em data} & The data to write. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than the size of the rom\textquotesingle{}s memory. \\ +\hline +\end{DoxyExceptions} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_ac37e86292b5e7b0bd099757c2e6263cc}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_a7ac6ff859255d44689e2028e3a561980}\label{classComSquare_1_1Cartridge_1_1Cartridge_a7ac6ff859255d44689e2028e3a561980}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!\_data@{\_data}} +\index{\_data@{\_data}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{\_data}{\_data}} +{\footnotesize\ttfamily uint8\+\_\+t$\ast$ Com\+Square\+::\+Cartridge\+::\+Cartridge\+::\+\_\+data\hspace{0.3cm}{\ttfamily [private]}} + + + +The rom data (contains all the instructions). + +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_a9e66e4f0ff9d213d86ca81800228f3a1}\label{classComSquare_1_1Cartridge_1_1Cartridge_a9e66e4f0ff9d213d86ca81800228f3a1}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!\_size@{\_size}} +\index{\_size@{\_size}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{\_size}{\_size}} +{\footnotesize\ttfamily size\+\_\+t Com\+Square\+::\+Cartridge\+::\+Cartridge\+::\+\_\+size\hspace{0.3cm}{\ttfamily [private]}} + + + +The size of the rom data. + +\mbox{\Hypertarget{classComSquare_1_1Cartridge_1_1Cartridge_a93c463170a03e3bb59a50ba78b2c60a1}\label{classComSquare_1_1Cartridge_1_1Cartridge_a93c463170a03e3bb59a50ba78b2c60a1}} +\index{ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}!header@{header}} +\index{header@{header}!ComSquare::Cartridge::Cartridge@{ComSquare::Cartridge::Cartridge}} +\doxysubsubsection{\texorpdfstring{header}{header}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header}{Header}} Com\+Square\+::\+Cartridge\+::\+Cartridge\+::header} + + + +The header of the cartridge. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+Cartridge/\mbox{\hyperlink{Cartridge_8hpp}{Cartridge.\+hpp}}\item +sources/\+Cartridge/\mbox{\hyperlink{Cartridge_8cpp}{Cartridge.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.md5 b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.md5 new file mode 100644 index 0000000..14129d2 --- /dev/null +++ b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.md5 @@ -0,0 +1 @@ +2c998186736117fba139318a4c0c7fd4 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.pdf b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.pdf new file mode 100644 index 0000000..3031584 Binary files /dev/null and b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.md5 b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.md5 new file mode 100644 index 0000000..79c09a4 --- /dev/null +++ b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.md5 @@ -0,0 +1 @@ +0d43e6a86b27a3ed2afff181961ee9f9 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.pdf b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.pdf new file mode 100644 index 0000000..74c517c Binary files /dev/null and b/docs/latex/classComSquare_1_1Cartridge_1_1Cartridge__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1InvalidAction.tex b/docs/latex/classComSquare_1_1InvalidAction.tex new file mode 100644 index 0000000..5351f7e --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidAction.tex @@ -0,0 +1,78 @@ +\hypertarget{classComSquare_1_1InvalidAction}{}\doxysection{Com\+Square\+::Invalid\+Action Class Reference} +\label{classComSquare_1_1InvalidAction}\index{ComSquare::InvalidAction@{ComSquare::InvalidAction}} + + +Exception thrown when someone tries to load an invalid rom. + + + + +{\ttfamily \#include $<$Invalid\+Action.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Invalid\+Action\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=223pt]{classComSquare_1_1InvalidAction__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Invalid\+Action\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=223pt]{classComSquare_1_1InvalidAction__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1InvalidAction_a03458ca2b92c2bfc31650e9fcab0c037}{Invalid\+Action}} (const std\+::string \&msg) +\item +const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$ \mbox{\hyperlink{classComSquare_1_1InvalidAction_aaca5669b1d88088a578739e80cfbcb71}{what}} () const noexcept override +\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +std\+::string \mbox{\hyperlink{classComSquare_1_1InvalidAction_a14672f101b62a93ca4b8e0668ccfd3ad}{\+\_\+msg}} +\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Exception thrown when someone tries to load an invalid rom. + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidAction_a03458ca2b92c2bfc31650e9fcab0c037}\label{classComSquare_1_1InvalidAction_a03458ca2b92c2bfc31650e9fcab0c037}} +\index{ComSquare::InvalidAction@{ComSquare::InvalidAction}!InvalidAction@{InvalidAction}} +\index{InvalidAction@{InvalidAction}!ComSquare::InvalidAction@{ComSquare::InvalidAction}} +\doxysubsubsection{\texorpdfstring{InvalidAction()}{InvalidAction()}} +{\footnotesize\ttfamily Com\+Square\+::\+Invalid\+Action\+::\+Invalid\+Action (\begin{DoxyParamCaption}\item[{const std\+::string \&}]{msg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [inline]}, {\ttfamily [explicit]}} + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidAction_aaca5669b1d88088a578739e80cfbcb71}\label{classComSquare_1_1InvalidAction_aaca5669b1d88088a578739e80cfbcb71}} +\index{ComSquare::InvalidAction@{ComSquare::InvalidAction}!what@{what}} +\index{what@{what}!ComSquare::InvalidAction@{ComSquare::InvalidAction}} +\doxysubsubsection{\texorpdfstring{what()}{what()}} +{\footnotesize\ttfamily const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}}$\ast$ Com\+Square\+::\+Invalid\+Action\+::what (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption}) const\hspace{0.3cm}{\ttfamily [inline]}, {\ttfamily [override]}, {\ttfamily [noexcept]}} + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidAction_a14672f101b62a93ca4b8e0668ccfd3ad}\label{classComSquare_1_1InvalidAction_a14672f101b62a93ca4b8e0668ccfd3ad}} +\index{ComSquare::InvalidAction@{ComSquare::InvalidAction}!\_msg@{\_msg}} +\index{\_msg@{\_msg}!ComSquare::InvalidAction@{ComSquare::InvalidAction}} +\doxysubsubsection{\texorpdfstring{\_msg}{\_msg}} +{\footnotesize\ttfamily std\+::string Com\+Square\+::\+Invalid\+Action\+::\+\_\+msg\hspace{0.3cm}{\ttfamily [private]}} + + + +The documentation for this class was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+Exceptions/\mbox{\hyperlink{InvalidAction_8hpp}{Invalid\+Action.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1InvalidAction__coll__graph.md5 b/docs/latex/classComSquare_1_1InvalidAction__coll__graph.md5 new file mode 100644 index 0000000..f3c3e67 --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidAction__coll__graph.md5 @@ -0,0 +1 @@ +27edfe88ad442e4717afde4684344e9e \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1InvalidAction__coll__graph.pdf b/docs/latex/classComSquare_1_1InvalidAction__coll__graph.pdf new file mode 100644 index 0000000..7ba029b Binary files /dev/null and b/docs/latex/classComSquare_1_1InvalidAction__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1InvalidAction__inherit__graph.md5 b/docs/latex/classComSquare_1_1InvalidAction__inherit__graph.md5 new file mode 100644 index 0000000..f3c3e67 --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidAction__inherit__graph.md5 @@ -0,0 +1 @@ +27edfe88ad442e4717afde4684344e9e \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1InvalidAction__inherit__graph.pdf b/docs/latex/classComSquare_1_1InvalidAction__inherit__graph.pdf new file mode 100644 index 0000000..7ba029b Binary files /dev/null and b/docs/latex/classComSquare_1_1InvalidAction__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1InvalidAddress.tex b/docs/latex/classComSquare_1_1InvalidAddress.tex new file mode 100644 index 0000000..b75201d --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidAddress.tex @@ -0,0 +1,78 @@ +\hypertarget{classComSquare_1_1InvalidAddress}{}\doxysection{Com\+Square\+::Invalid\+Address Class Reference} +\label{classComSquare_1_1InvalidAddress}\index{ComSquare::InvalidAddress@{ComSquare::InvalidAddress}} + + +Exception thrown when trying to read/write to an invalid address. + + + + +{\ttfamily \#include $<$Invalid\+Address.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Invalid\+Address\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=231pt]{classComSquare_1_1InvalidAddress__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Invalid\+Address\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=231pt]{classComSquare_1_1InvalidAddress__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1InvalidAddress_abc4b117e5d9a1b914599f9efdf74f6ab}{Invalid\+Address}} (std\+::string where, int32\+\_\+t addr) +\item +const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$ \mbox{\hyperlink{classComSquare_1_1InvalidAddress_a9ec77b43db78b30dfffdc06e6a117247}{what}} () const noexcept override +\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +std\+::string \mbox{\hyperlink{classComSquare_1_1InvalidAddress_abef5292580bf0d3c65d407be0edec912}{\+\_\+msg}} +\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Exception thrown when trying to read/write to an invalid address. + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidAddress_abc4b117e5d9a1b914599f9efdf74f6ab}\label{classComSquare_1_1InvalidAddress_abc4b117e5d9a1b914599f9efdf74f6ab}} +\index{ComSquare::InvalidAddress@{ComSquare::InvalidAddress}!InvalidAddress@{InvalidAddress}} +\index{InvalidAddress@{InvalidAddress}!ComSquare::InvalidAddress@{ComSquare::InvalidAddress}} +\doxysubsubsection{\texorpdfstring{InvalidAddress()}{InvalidAddress()}} +{\footnotesize\ttfamily Com\+Square\+::\+Invalid\+Address\+::\+Invalid\+Address (\begin{DoxyParamCaption}\item[{std\+::string}]{where, }\item[{int32\+\_\+t}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [inline]}} + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidAddress_a9ec77b43db78b30dfffdc06e6a117247}\label{classComSquare_1_1InvalidAddress_a9ec77b43db78b30dfffdc06e6a117247}} +\index{ComSquare::InvalidAddress@{ComSquare::InvalidAddress}!what@{what}} +\index{what@{what}!ComSquare::InvalidAddress@{ComSquare::InvalidAddress}} +\doxysubsubsection{\texorpdfstring{what()}{what()}} +{\footnotesize\ttfamily const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}}$\ast$ Com\+Square\+::\+Invalid\+Address\+::what (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption}) const\hspace{0.3cm}{\ttfamily [inline]}, {\ttfamily [override]}, {\ttfamily [noexcept]}} + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidAddress_abef5292580bf0d3c65d407be0edec912}\label{classComSquare_1_1InvalidAddress_abef5292580bf0d3c65d407be0edec912}} +\index{ComSquare::InvalidAddress@{ComSquare::InvalidAddress}!\_msg@{\_msg}} +\index{\_msg@{\_msg}!ComSquare::InvalidAddress@{ComSquare::InvalidAddress}} +\doxysubsubsection{\texorpdfstring{\_msg}{\_msg}} +{\footnotesize\ttfamily std\+::string Com\+Square\+::\+Invalid\+Address\+::\+\_\+msg\hspace{0.3cm}{\ttfamily [private]}} + + + +The documentation for this class was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+Exceptions/\mbox{\hyperlink{InvalidAddress_8hpp}{Invalid\+Address.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1InvalidAddress__coll__graph.md5 b/docs/latex/classComSquare_1_1InvalidAddress__coll__graph.md5 new file mode 100644 index 0000000..dafc684 --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidAddress__coll__graph.md5 @@ -0,0 +1 @@ +25cf54573649f7568021736c3ac701a0 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1InvalidAddress__coll__graph.pdf b/docs/latex/classComSquare_1_1InvalidAddress__coll__graph.pdf new file mode 100644 index 0000000..4cdb647 Binary files /dev/null and b/docs/latex/classComSquare_1_1InvalidAddress__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1InvalidAddress__inherit__graph.md5 b/docs/latex/classComSquare_1_1InvalidAddress__inherit__graph.md5 new file mode 100644 index 0000000..dafc684 --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidAddress__inherit__graph.md5 @@ -0,0 +1 @@ +25cf54573649f7568021736c3ac701a0 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1InvalidAddress__inherit__graph.pdf b/docs/latex/classComSquare_1_1InvalidAddress__inherit__graph.pdf new file mode 100644 index 0000000..e84497c Binary files /dev/null and b/docs/latex/classComSquare_1_1InvalidAddress__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1InvalidRomException.tex b/docs/latex/classComSquare_1_1InvalidRomException.tex new file mode 100644 index 0000000..f2c0ee3 --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidRomException.tex @@ -0,0 +1,78 @@ +\hypertarget{classComSquare_1_1InvalidRomException}{}\doxysection{Com\+Square\+::Invalid\+Rom\+Exception Class Reference} +\label{classComSquare_1_1InvalidRomException}\index{ComSquare::InvalidRomException@{ComSquare::InvalidRomException}} + + +Exception thrown when someone tries to load an invalid rom. + + + + +{\ttfamily \#include $<$Invalid\+Rom.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Invalid\+Rom\+Exception\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=262pt]{classComSquare_1_1InvalidRomException__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Invalid\+Rom\+Exception\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=262pt]{classComSquare_1_1InvalidRomException__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1InvalidRomException_a55419aadf4520c674fa4a1b069103b0e}{Invalid\+Rom\+Exception}} (const std\+::string \&msg) +\item +const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$ \mbox{\hyperlink{classComSquare_1_1InvalidRomException_a2aada7245e08876efb32c4706d8b1334}{what}} () const noexcept override +\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +std\+::string \mbox{\hyperlink{classComSquare_1_1InvalidRomException_ae174e316e7eb3a2e73defdeeede8c288}{\+\_\+msg}} +\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Exception thrown when someone tries to load an invalid rom. + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidRomException_a55419aadf4520c674fa4a1b069103b0e}\label{classComSquare_1_1InvalidRomException_a55419aadf4520c674fa4a1b069103b0e}} +\index{ComSquare::InvalidRomException@{ComSquare::InvalidRomException}!InvalidRomException@{InvalidRomException}} +\index{InvalidRomException@{InvalidRomException}!ComSquare::InvalidRomException@{ComSquare::InvalidRomException}} +\doxysubsubsection{\texorpdfstring{InvalidRomException()}{InvalidRomException()}} +{\footnotesize\ttfamily Com\+Square\+::\+Invalid\+Rom\+Exception\+::\+Invalid\+Rom\+Exception (\begin{DoxyParamCaption}\item[{const std\+::string \&}]{msg }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [inline]}, {\ttfamily [explicit]}} + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidRomException_a2aada7245e08876efb32c4706d8b1334}\label{classComSquare_1_1InvalidRomException_a2aada7245e08876efb32c4706d8b1334}} +\index{ComSquare::InvalidRomException@{ComSquare::InvalidRomException}!what@{what}} +\index{what@{what}!ComSquare::InvalidRomException@{ComSquare::InvalidRomException}} +\doxysubsubsection{\texorpdfstring{what()}{what()}} +{\footnotesize\ttfamily const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}}$\ast$ Com\+Square\+::\+Invalid\+Rom\+Exception\+::what (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption}) const\hspace{0.3cm}{\ttfamily [inline]}, {\ttfamily [override]}, {\ttfamily [noexcept]}} + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1InvalidRomException_ae174e316e7eb3a2e73defdeeede8c288}\label{classComSquare_1_1InvalidRomException_ae174e316e7eb3a2e73defdeeede8c288}} +\index{ComSquare::InvalidRomException@{ComSquare::InvalidRomException}!\_msg@{\_msg}} +\index{\_msg@{\_msg}!ComSquare::InvalidRomException@{ComSquare::InvalidRomException}} +\doxysubsubsection{\texorpdfstring{\_msg}{\_msg}} +{\footnotesize\ttfamily std\+::string Com\+Square\+::\+Invalid\+Rom\+Exception\+::\+\_\+msg\hspace{0.3cm}{\ttfamily [private]}} + + + +The documentation for this class was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+Exceptions/\mbox{\hyperlink{InvalidRom_8hpp}{Invalid\+Rom.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1InvalidRomException__coll__graph.md5 b/docs/latex/classComSquare_1_1InvalidRomException__coll__graph.md5 new file mode 100644 index 0000000..18e11f4 --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidRomException__coll__graph.md5 @@ -0,0 +1 @@ +96c09fb4535d689b95e1aa1060663674 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1InvalidRomException__coll__graph.pdf b/docs/latex/classComSquare_1_1InvalidRomException__coll__graph.pdf new file mode 100644 index 0000000..72e699c Binary files /dev/null and b/docs/latex/classComSquare_1_1InvalidRomException__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1InvalidRomException__inherit__graph.md5 b/docs/latex/classComSquare_1_1InvalidRomException__inherit__graph.md5 new file mode 100644 index 0000000..18e11f4 --- /dev/null +++ b/docs/latex/classComSquare_1_1InvalidRomException__inherit__graph.md5 @@ -0,0 +1 @@ +96c09fb4535d689b95e1aa1060663674 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1InvalidRomException__inherit__graph.pdf b/docs/latex/classComSquare_1_1InvalidRomException__inherit__graph.pdf new file mode 100644 index 0000000..bad9247 Binary files /dev/null and b/docs/latex/classComSquare_1_1InvalidRomException__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Memory_1_1IMemory.tex b/docs/latex/classComSquare_1_1Memory_1_1IMemory.tex new file mode 100644 index 0000000..fb612dd --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1IMemory.tex @@ -0,0 +1,198 @@ +\hypertarget{classComSquare_1_1Memory_1_1IMemory}{}\doxysection{Com\+Square\+::Memory\+::I\+Memory Class Reference} +\label{classComSquare_1_1Memory_1_1IMemory}\index{ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}} + + +Common interface implemented by all components mapping memory. + + + + +{\ttfamily \#include $<$I\+Memory.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Memory\+::I\+Memory\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{classComSquare_1_1Memory_1_1IMemory__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Memory\+::I\+Memory\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=205pt]{classComSquare_1_1Memory_1_1IMemory__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +virtual uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr)=0 +\begin{DoxyCompactList}\small\item\em Read data from the component. \end{DoxyCompactList}\item +virtual void \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data)=0 +\begin{DoxyCompactList}\small\item\em Write data to this component. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a67377d426fefea4b20df85302110e884}{set\+Memory\+Region}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} start, \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} end) +\begin{DoxyCompactList}\small\item\em Change starting and ending points of this mapped memory. \end{DoxyCompactList}\item +virtual bool \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a3a7ac0be32c2c42e6421b55719f93f25}{has\+Memory\+At}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) +\begin{DoxyCompactList}\small\item\em Return true if this component has mapped the address. \end{DoxyCompactList}\item +virtual \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_ab8910c303177d212bfca0a563b04c7a8}{get\+Start}} () +\begin{DoxyCompactList}\small\item\em Get the first address mapped to this component. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a2b8eb23d570e8767d98dec6b7f59e06e}{\+\_\+start}} = 0 +\begin{DoxyCompactList}\small\item\em The starting address mapped to this component. \end{DoxyCompactList}\item +\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_add71a507b781d0381c6a4a91cf728cb4}{\+\_\+end}} = 0 +\begin{DoxyCompactList}\small\item\em The last continuous address mapped to this components. For shadows, see the \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow}{Memory\+Shadow}} class. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Common interface implemented by all components mapping memory. + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IMemory_ab8910c303177d212bfca0a563b04c7a8}\label{classComSquare_1_1Memory_1_1IMemory_ab8910c303177d212bfca0a563b04c7a8}} +\index{ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}!getStart@{getStart}} +\index{getStart@{getStart}!ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}} +\doxysubsubsection{\texorpdfstring{getStart()}{getStart()}} +{\footnotesize\ttfamily uint32\+\_\+t Com\+Square\+::\+Memory\+::\+I\+Memory\+::get\+Start (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [virtual]}} + + + +Get the first address mapped to this component. + +\begin{DoxyReturn}{Returns} +the \+\_\+start value. +\end{DoxyReturn} + + +Reimplemented in \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a6b55c812fb38ed7c67d19f32748b5286}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IMemory_a3a7ac0be32c2c42e6421b55719f93f25}\label{classComSquare_1_1Memory_1_1IMemory_a3a7ac0be32c2c42e6421b55719f93f25}} +\index{ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}!hasMemoryAt@{hasMemoryAt}} +\index{hasMemoryAt@{hasMemoryAt}!ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}} +\doxysubsubsection{\texorpdfstring{hasMemoryAt()}{hasMemoryAt()}} +{\footnotesize\ttfamily bool Com\+Square\+::\+Memory\+::\+I\+Memory\+::has\+Memory\+At (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [virtual]}} + + + +Return true if this component has mapped the address. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to check. \\ +\hline +\end{DoxyParams} +\begin{DoxyReturn}{Returns} +True if this address is mapped to the component. False otherwise. +\end{DoxyReturn} + + +Reimplemented in \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_ab165286db6b6c7cea0e635ca49a07824}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}\label{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}} +\index{ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}!read@{read}} +\index{read@{read}!ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily virtual uint8\+\_\+t Com\+Square\+::\+Memory\+::\+I\+Memory\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [pure virtual]}} + + + +Read data from the component. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The local address to read from (0x0 should refer to the first byte of this component). \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em This} & function should thrown an \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}} for address that are not mapped to the component. \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the data at the address given as parameter. +\end{DoxyReturn} + + +Implemented in \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_afb3e0bd3fdeddb091813ef3c36b20607}{Com\+Square\+::\+P\+P\+U\+::\+P\+PU}}, \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_a2f5e100896256e62f1995a0172f3a5e5}{Com\+Square\+::\+C\+P\+U\+::\+C\+PU}}, \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP_acee7abd47b8b5d2f4971ddcfceb26111}{Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+SP}}, \mbox{\hyperlink{classComSquare_1_1APU_1_1APU_acf11685da76ce208cf57a4209cdbd0c2}{Com\+Square\+::\+A\+P\+U\+::\+A\+PU}}, \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a478251bc0c7272712b6f6f25aa17b71a}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}}, \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram_a873f2becaa9b63d8864bb43eaae89fc6}{Com\+Square\+::\+Ram\+::\+Ram}}, and \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow_abc27d0d65cf3f5b4b258a5aa8e1250ff}{Com\+Square\+::\+Memory\+::\+Memory\+Shadow}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IMemory_a67377d426fefea4b20df85302110e884}\label{classComSquare_1_1Memory_1_1IMemory_a67377d426fefea4b20df85302110e884}} +\index{ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}!setMemoryRegion@{setMemoryRegion}} +\index{setMemoryRegion@{setMemoryRegion}!ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}} +\doxysubsubsection{\texorpdfstring{setMemoryRegion()}{setMemoryRegion()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Memory\+::\+I\+Memory\+::set\+Memory\+Region (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{start, }\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{end }\end{DoxyParamCaption})} + + + +Change starting and ending points of this mapped memory. + + +\begin{DoxyParams}{Parameters} +{\em start} & The first address mapped to this component. \\ +\hline +{\em end} & The last address mapped to this component. \\ +\hline +\end{DoxyParams} +\begin{DoxyWarning}{Warning} +The start/end address should be a continuous range. You can\textquotesingle{}t map address 0x0 and 0x2 but not 0x1. To do that, use two \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. +\end{DoxyWarning} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}\label{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}} +\index{ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}!write@{write}} +\index{write@{write}!ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily virtual void Com\+Square\+::\+Memory\+::\+I\+Memory\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [pure virtual]}} + + + +Write data to this component. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The local address to write data (0x0 should refer to the first byte of this component). \\ +\hline +{\em data} & The new data to write. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em This} & function should thrown an \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}} for address that are not mapped to the component. \\ +\hline +\end{DoxyExceptions} + + +Implemented in \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aaf2261c0ef235d3181b038355b97cbe3}{Com\+Square\+::\+P\+P\+U\+::\+P\+PU}}, \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU_a98d7a910393934e63f4ea479cea49f2e}{Com\+Square\+::\+C\+P\+U\+::\+C\+PU}}, \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP_a5dcd5917875b1dbb0e6b9185aa8bfef2}{Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+D\+SP}}, \mbox{\hyperlink{classComSquare_1_1APU_1_1APU_ab77224524520cbad442e89f3663cf67f}{Com\+Square\+::\+A\+P\+U\+::\+A\+PU}}, \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a54b0ace13a17556f6072399ffed9b817}{Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory}}, \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram_a0f42b342ebf151574c1e523719f9cf52}{Com\+Square\+::\+Ram\+::\+Ram}}, and \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow_a885d4559319980e9e5b706f7fe4c3f49}{Com\+Square\+::\+Memory\+::\+Memory\+Shadow}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IMemory_add71a507b781d0381c6a4a91cf728cb4}\label{classComSquare_1_1Memory_1_1IMemory_add71a507b781d0381c6a4a91cf728cb4}} +\index{ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}!\_end@{\_end}} +\index{\_end@{\_end}!ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}} +\doxysubsubsection{\texorpdfstring{\_end}{\_end}} +{\footnotesize\ttfamily \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} Com\+Square\+::\+Memory\+::\+I\+Memory\+::\+\_\+end = 0\hspace{0.3cm}{\ttfamily [private]}} + + + +The last continuous address mapped to this components. For shadows, see the \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow}{Memory\+Shadow}} class. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IMemory_a2b8eb23d570e8767d98dec6b7f59e06e}\label{classComSquare_1_1Memory_1_1IMemory_a2b8eb23d570e8767d98dec6b7f59e06e}} +\index{ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}!\_start@{\_start}} +\index{\_start@{\_start}!ComSquare::Memory::IMemory@{ComSquare::Memory::IMemory}} +\doxysubsubsection{\texorpdfstring{\_start}{\_start}} +{\footnotesize\ttfamily \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} Com\+Square\+::\+Memory\+::\+I\+Memory\+::\+\_\+start = 0\hspace{0.3cm}{\ttfamily [private]}} + + + +The starting address mapped to this component. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+Memory/\mbox{\hyperlink{IMemory_8hpp}{I\+Memory.\+hpp}}\item +sources/\+Memory/\mbox{\hyperlink{IMemory_8cpp}{I\+Memory.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1Memory_1_1IMemory__coll__graph.md5 b/docs/latex/classComSquare_1_1Memory_1_1IMemory__coll__graph.md5 new file mode 100644 index 0000000..082b761 --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1IMemory__coll__graph.md5 @@ -0,0 +1 @@ +2b741f468720385ab4dd24dba47cf650 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Memory_1_1IMemory__coll__graph.pdf b/docs/latex/classComSquare_1_1Memory_1_1IMemory__coll__graph.pdf new file mode 100644 index 0000000..bac6b43 Binary files /dev/null and b/docs/latex/classComSquare_1_1Memory_1_1IMemory__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Memory_1_1IMemory__inherit__graph.md5 b/docs/latex/classComSquare_1_1Memory_1_1IMemory__inherit__graph.md5 new file mode 100644 index 0000000..4fff0d3 --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1IMemory__inherit__graph.md5 @@ -0,0 +1 @@ +97eae1aa2624bed7d0a7b0ce85d974eb \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Memory_1_1IMemory__inherit__graph.pdf b/docs/latex/classComSquare_1_1Memory_1_1IMemory__inherit__graph.pdf new file mode 100644 index 0000000..bc696cb Binary files /dev/null and b/docs/latex/classComSquare_1_1Memory_1_1IMemory__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory.tex b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory.tex new file mode 100644 index 0000000..fd4eb50 --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory.tex @@ -0,0 +1,283 @@ +\hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory}{}\doxysection{Com\+Square\+::Memory\+::I\+Rectangle\+Memory Class Reference} +\label{classComSquare_1_1Memory_1_1IRectangleMemory}\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} + + +Superset of the \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at F\+F\+FF). + + + + +{\ttfamily \#include $<$I\+Rectangle\+Memory.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Memory\+::I\+Rectangle\+Memory\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[height=550pt]{classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Memory\+::I\+Rectangle\+Memory\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=205pt]{classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a478251bc0c7272712b6f6f25aa17b71a}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Read data from the component using the same method as the basic \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a54b0ace13a17556f6072399ffed9b817}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) override +\begin{DoxyCompactList}\small\item\em Write data to this component using the same method as the basic \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. \end{DoxyCompactList}\item +virtual uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a2a239baa265b31e222d4e5b0a9d2d5e0}{read\+\_\+internal}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr)=0 +\begin{DoxyCompactList}\small\item\em Internal component read. Implement this as you would implement a basic \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}\textquotesingle{}s read. \end{DoxyCompactList}\item +virtual void \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_ac37e86292b5e7b0bd099757c2e6263cc}{write\+\_\+internal}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data)=0 +\begin{DoxyCompactList}\small\item\em Internal component write. Implement this as you would implement a basic \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}\textquotesingle{}s write. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_ab165286db6b6c7cea0e635ca49a07824}{has\+Memory\+At}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Return true if this component has mapped the address. \end{DoxyCompactList}\item +\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a6b55c812fb38ed7c67d19f32748b5286}{get\+Start}} () override +\begin{DoxyCompactList}\small\item\em Get the first address mapped to this component. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a90bb7d98b2e8c2da70cc29c36ac70adc}{set\+Memory\+Region}} (uint8\+\_\+t start\+Bank, uint8\+\_\+t end\+Bank, uint16\+\_\+t start\+Page, uint16\+\_\+t end\+Page) +\begin{DoxyCompactList}\small\item\em Change starting and ending points of this mapped memory. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a94658df7460fd7f9f59f22955d93bf6b}{\+\_\+start\+Bank}} = 0 +\begin{DoxyCompactList}\small\item\em The first bank to map to. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_acc2002b644d61a7dc4d40c92e0b93a3d}{\+\_\+end\+Bank}} = 0 +\begin{DoxyCompactList}\small\item\em The last bank to map to. \end{DoxyCompactList}\item +uint16\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_a9178184277528ac54064ca6caacab474}{\+\_\+start\+Page}} = 0 +\begin{DoxyCompactList}\small\item\em The first address of each bank to map. \end{DoxyCompactList}\item +uint16\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory_aece911d747bb326279bc7e661e06a9a3}{\+\_\+end\+Page}} = 0 +\begin{DoxyCompactList}\small\item\em The last address of each bank to map. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Superset of the \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at F\+F\+FF). + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_a6b55c812fb38ed7c67d19f32748b5286}\label{classComSquare_1_1Memory_1_1IRectangleMemory_a6b55c812fb38ed7c67d19f32748b5286}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!getStart@{getStart}} +\index{getStart@{getStart}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{getStart()}{getStart()}} +{\footnotesize\ttfamily \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::get\+Start (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Get the first address mapped to this component. + +\begin{DoxyReturn}{Returns} +the \+\_\+start value. +\end{DoxyReturn} + + +Reimplemented from \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_ab8910c303177d212bfca0a563b04c7a8}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_ab165286db6b6c7cea0e635ca49a07824}\label{classComSquare_1_1Memory_1_1IRectangleMemory_ab165286db6b6c7cea0e635ca49a07824}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!hasMemoryAt@{hasMemoryAt}} +\index{hasMemoryAt@{hasMemoryAt}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{hasMemoryAt()}{hasMemoryAt()}} +{\footnotesize\ttfamily bool Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::has\+Memory\+At (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Return true if this component has mapped the address. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to check. \\ +\hline +\end{DoxyParams} +\begin{DoxyReturn}{Returns} +True if this address is mapped to the component. False otherwise. +\end{DoxyReturn} + + +Reimplemented from \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a3a7ac0be32c2c42e6421b55719f93f25}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_a478251bc0c7272712b6f6f25aa17b71a}\label{classComSquare_1_1Memory_1_1IRectangleMemory_a478251bc0c7272712b6f6f25aa17b71a}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!read@{read}} +\index{read@{read}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Read data from the component using the same method as the basic \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The local address to read from. 0x0 should refer to the first byte of this component on the fist bank. This method is responsible of mapping to the component\textquotesingle{}s read. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & if the address is not mapped to the component. \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the data at the address given as parameter. +\end{DoxyReturn} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_a2a239baa265b31e222d4e5b0a9d2d5e0}\label{classComSquare_1_1Memory_1_1IRectangleMemory_a2a239baa265b31e222d4e5b0a9d2d5e0}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!read\_internal@{read\_internal}} +\index{read\_internal@{read\_internal}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{read\_internal()}{read\_internal()}} +{\footnotesize\ttfamily virtual uint8\+\_\+t Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::read\+\_\+internal (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [pure virtual]}} + + + +Internal component read. Implement this as you would implement a basic \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}\textquotesingle{}s read. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The local address to read from. 0x0 refer to the first byte of your data and the address is in the component\textquotesingle{}s space. That means that you can consider this address as continuous \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em This} & function should thrown an \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}} for address that are not mapped to the component. \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the data at the address given as parameter. +\end{DoxyReturn} + + +Implemented in \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a940771d62cb665381e89d8c841fdad72}{Com\+Square\+::\+Cartridge\+::\+Cartridge}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_a90bb7d98b2e8c2da70cc29c36ac70adc}\label{classComSquare_1_1Memory_1_1IRectangleMemory_a90bb7d98b2e8c2da70cc29c36ac70adc}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!setMemoryRegion@{setMemoryRegion}} +\index{setMemoryRegion@{setMemoryRegion}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{setMemoryRegion()}{setMemoryRegion()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::set\+Memory\+Region (\begin{DoxyParamCaption}\item[{uint8\+\_\+t}]{start\+Bank, }\item[{uint8\+\_\+t}]{end\+Bank, }\item[{uint16\+\_\+t}]{start\+Page, }\item[{uint16\+\_\+t}]{end\+Page }\end{DoxyParamCaption})} + + + +Change starting and ending points of this mapped memory. + + +\begin{DoxyParams}{Parameters} +{\em start\+Bank} & The first bank mapped to this component. \\ +\hline +{\em end\+Bank} & The last bank mapped to this component. \\ +\hline +{\em start\+Page} & The first page mapped to this component (every mapped banks will have this page mapped) \\ +\hline +{\em end\+Page} & The end page mapped to this component (every mapped banks will have this pages lower than this mapped) \\ +\hline +\end{DoxyParams} +\begin{DoxyWarning}{Warning} +The start/end address should be a rectangle. To mirror memory, use the \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow}{Memory\+Shadow}} class and not this one. +\end{DoxyWarning} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_a54b0ace13a17556f6072399ffed9b817}\label{classComSquare_1_1Memory_1_1IRectangleMemory_a54b0ace13a17556f6072399ffed9b817}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!write@{write}} +\index{write@{write}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Write data to this component using the same method as the basic \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The local address to write data 0x0 should refer to the first byte of this component on the fist bank. This method is responsible of mapping to the component\textquotesingle{}s write. \\ +\hline +{\em data} & The new data to write. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & if the address is not mapped to the component. \\ +\hline +\end{DoxyExceptions} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_ac37e86292b5e7b0bd099757c2e6263cc}\label{classComSquare_1_1Memory_1_1IRectangleMemory_ac37e86292b5e7b0bd099757c2e6263cc}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!write\_internal@{write\_internal}} +\index{write\_internal@{write\_internal}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{write\_internal()}{write\_internal()}} +{\footnotesize\ttfamily virtual void Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::write\+\_\+internal (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [pure virtual]}} + + + +Internal component write. Implement this as you would implement a basic \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}\textquotesingle{}s write. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The local address to write to. 0x0 refer to the first byte of your data and the address is in the component\textquotesingle{}s space. That means that you can consider this address as continuous \\ +\hline +{\em data} & The new data to write. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em This} & function should thrown an \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}} for address that are not mapped to the component. \\ +\hline +\end{DoxyExceptions} + + +Implemented in \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge_a02d9c1db34d043234aef35a7357356fd}{Com\+Square\+::\+Cartridge\+::\+Cartridge}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_acc2002b644d61a7dc4d40c92e0b93a3d}\label{classComSquare_1_1Memory_1_1IRectangleMemory_acc2002b644d61a7dc4d40c92e0b93a3d}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!\_endBank@{\_endBank}} +\index{\_endBank@{\_endBank}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{\_endBank}{\_endBank}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::\+\_\+end\+Bank = 0\hspace{0.3cm}{\ttfamily [private]}} + + + +The last bank to map to. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_aece911d747bb326279bc7e661e06a9a3}\label{classComSquare_1_1Memory_1_1IRectangleMemory_aece911d747bb326279bc7e661e06a9a3}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!\_endPage@{\_endPage}} +\index{\_endPage@{\_endPage}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{\_endPage}{\_endPage}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::\+\_\+end\+Page = 0\hspace{0.3cm}{\ttfamily [private]}} + + + +The last address of each bank to map. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_a94658df7460fd7f9f59f22955d93bf6b}\label{classComSquare_1_1Memory_1_1IRectangleMemory_a94658df7460fd7f9f59f22955d93bf6b}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!\_startBank@{\_startBank}} +\index{\_startBank@{\_startBank}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{\_startBank}{\_startBank}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::\+\_\+start\+Bank = 0\hspace{0.3cm}{\ttfamily [private]}} + + + +The first bank to map to. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1IRectangleMemory_a9178184277528ac54064ca6caacab474}\label{classComSquare_1_1Memory_1_1IRectangleMemory_a9178184277528ac54064ca6caacab474}} +\index{ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}!\_startPage@{\_startPage}} +\index{\_startPage@{\_startPage}!ComSquare::Memory::IRectangleMemory@{ComSquare::Memory::IRectangleMemory}} +\doxysubsubsection{\texorpdfstring{\_startPage}{\_startPage}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Memory\+::\+I\+Rectangle\+Memory\+::\+\_\+start\+Page = 0\hspace{0.3cm}{\ttfamily [private]}} + + + +The first address of each bank to map. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+Memory/\mbox{\hyperlink{IRectangleMemory_8hpp}{I\+Rectangle\+Memory.\+hpp}}\item +sources/\+Memory/\mbox{\hyperlink{IRectangleMemory_8cpp}{I\+Rectangle\+Memory.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.md5 b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.md5 new file mode 100644 index 0000000..c45b2db --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.md5 @@ -0,0 +1 @@ +cd0033928198df5ce4537d10d2b8ab58 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.pdf b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.pdf new file mode 100644 index 0000000..6b7fb88 Binary files /dev/null and b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.md5 b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.md5 new file mode 100644 index 0000000..e24b9bf --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.md5 @@ -0,0 +1 @@ +039e28dbaff68820c8dc016db451d925 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.pdf b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.pdf new file mode 100644 index 0000000..16310dc Binary files /dev/null and b/docs/latex/classComSquare_1_1Memory_1_1IRectangleMemory__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Memory_1_1MemoryBus.tex b/docs/latex/classComSquare_1_1Memory_1_1MemoryBus.tex new file mode 100644 index 0000000..4608576 --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1MemoryBus.tex @@ -0,0 +1,164 @@ +\hypertarget{classComSquare_1_1Memory_1_1MemoryBus}{}\doxysection{Com\+Square\+::Memory\+::Memory\+Bus Class Reference} +\label{classComSquare_1_1Memory_1_1MemoryBus}\index{ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}} + + +The memory bus is the component responsible of mapping addresses to components address and transmitting the data. + + + + +{\ttfamily \#include $<$Memory\+Bus.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::Memory\+::Memory\+Bus\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=208pt]{classComSquare_1_1Memory_1_1MemoryBus__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus_a66fe80e0dafb6078eabf809b2ecd6dae}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) +\begin{DoxyCompactList}\small\item\em Read data at a global address. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus_a1387b77513d9e0d077291477faab46cd}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) +\begin{DoxyCompactList}\small\item\em Write a data to a global address. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus_a21e37ae17ad577a34af5ba49fbdf7180}{map\+Components}} (\mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} \&console) +\begin{DoxyCompactList}\small\item\em Map components to the address space using the currently loaded cartridge to set the right mapping mode. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Member Functions} +\begin{DoxyCompactItemize} +\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus_a1b7ba0ca63589d971404e1b7031f26c1}{get\+Accessor}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) +\begin{DoxyCompactList}\small\item\em Helper function to get the components that is responsible of read/write at an address. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus_afa5f49e6918eb466bc9116f042c7c636}{\+\_\+mirror\+Components}} (\mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} \&console, \mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} i) +\begin{DoxyCompactList}\small\item\em W\+Ram, \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}}, \mbox{\hyperlink{namespaceComSquare_1_1PPU}{P\+PU}} \& A\+LU registers are mirrored to all banks of Q1 \& Q3. This function is used for the mirroring. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +std\+::vector$<$ std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$ $>$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus_a2c2385dddba2ec8f143f2d88a58a9431}{\+\_\+memory\+Accessors}} +\begin{DoxyCompactList}\small\item\em The list of components registered inside the bus. Every components that can read/write to a public address should be in this vector. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus_ab55064b581ef9348bc47e0f277a0439d}{\+\_\+openbus}} = 0 +\begin{DoxyCompactList}\small\item\em The last value read via the memory bus. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +The memory bus is the component responsible of mapping addresses to components address and transmitting the data. + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryBus_afa5f49e6918eb466bc9116f042c7c636}\label{classComSquare_1_1Memory_1_1MemoryBus_afa5f49e6918eb466bc9116f042c7c636}} +\index{ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}!\_mirrorComponents@{\_mirrorComponents}} +\index{\_mirrorComponents@{\_mirrorComponents}!ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}} +\doxysubsubsection{\texorpdfstring{\_mirrorComponents()}{\_mirrorComponents()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Memory\+::\+Memory\+Bus\+::\+\_\+mirror\+Components (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} \&}]{console, }\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{i }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [inline]}, {\ttfamily [private]}} + + + +W\+Ram, \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}}, \mbox{\hyperlink{namespaceComSquare_1_1PPU}{P\+PU}} \& A\+LU registers are mirrored to all banks of Q1 \& Q3. This function is used for the mirroring. + + +\begin{DoxyParams}{Parameters} +{\em console} & All the components. \\ +\hline +{\em i} & Base address for the mirrors. \\ +\hline +\end{DoxyParams} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryBus_a1b7ba0ca63589d971404e1b7031f26c1}\label{classComSquare_1_1Memory_1_1MemoryBus_a1b7ba0ca63589d971404e1b7031f26c1}} +\index{ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}!getAccessor@{getAccessor}} +\index{getAccessor@{getAccessor}!ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}} +\doxysubsubsection{\texorpdfstring{getAccessor()}{getAccessor()}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$ Com\+Square\+::\+Memory\+::\+Memory\+Bus\+::get\+Accessor (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [private]}} + + + +Helper function to get the components that is responsible of read/write at an address. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address you want to look for. \\ +\hline +\end{DoxyParams} +\begin{DoxyReturn}{Returns} +The components responsible for the address param or nullptr if none was found. +\end{DoxyReturn} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryBus_a21e37ae17ad577a34af5ba49fbdf7180}\label{classComSquare_1_1Memory_1_1MemoryBus_a21e37ae17ad577a34af5ba49fbdf7180}} +\index{ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}!mapComponents@{mapComponents}} +\index{mapComponents@{mapComponents}!ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}} +\doxysubsubsection{\texorpdfstring{mapComponents()}{mapComponents()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Memory\+::\+Memory\+Bus\+::map\+Components (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} \&}]{console }\end{DoxyParamCaption})} + + + +Map components to the address space using the currently loaded cartridge to set the right mapping mode. + + +\begin{DoxyParams}{Parameters} +{\em console} & All the components. \\ +\hline +\end{DoxyParams} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryBus_a66fe80e0dafb6078eabf809b2ecd6dae}\label{classComSquare_1_1Memory_1_1MemoryBus_a66fe80e0dafb6078eabf809b2ecd6dae}} +\index{ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}!read@{read}} +\index{read@{read}!ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Memory\+::\+Memory\+Bus\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})} + + + +Read data at a global address. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to read from. \\ +\hline +\end{DoxyParams} +\begin{DoxyReturn}{Returns} +The value that the component returned for this address. If the address was mapped to ram, it simply returned the value. If the address was mapped to a register the component returned the register. +\end{DoxyReturn} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryBus_a1387b77513d9e0d077291477faab46cd}\label{classComSquare_1_1Memory_1_1MemoryBus_a1387b77513d9e0d077291477faab46cd}} +\index{ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}!write@{write}} +\index{write@{write}!ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Memory\+::\+Memory\+Bus\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})} + + + +Write a data to a global address. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to write to. \\ +\hline +{\em data} & The data to write. \\ +\hline +\end{DoxyParams} + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryBus_a2c2385dddba2ec8f143f2d88a58a9431}\label{classComSquare_1_1Memory_1_1MemoryBus_a2c2385dddba2ec8f143f2d88a58a9431}} +\index{ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}!\_memoryAccessors@{\_memoryAccessors}} +\index{\_memoryAccessors@{\_memoryAccessors}!ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}} +\doxysubsubsection{\texorpdfstring{\_memoryAccessors}{\_memoryAccessors}} +{\footnotesize\ttfamily std\+::vector$<$std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}$>$ $>$ Com\+Square\+::\+Memory\+::\+Memory\+Bus\+::\+\_\+memory\+Accessors\hspace{0.3cm}{\ttfamily [private]}} + + + +The list of components registered inside the bus. Every components that can read/write to a public address should be in this vector. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryBus_ab55064b581ef9348bc47e0f277a0439d}\label{classComSquare_1_1Memory_1_1MemoryBus_ab55064b581ef9348bc47e0f277a0439d}} +\index{ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}!\_openbus@{\_openbus}} +\index{\_openbus@{\_openbus}!ComSquare::Memory::MemoryBus@{ComSquare::Memory::MemoryBus}} +\doxysubsubsection{\texorpdfstring{\_openbus}{\_openbus}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Memory\+::\+Memory\+Bus\+::\+\_\+openbus = 0\hspace{0.3cm}{\ttfamily [private]}} + + + +The last value read via the memory bus. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+Memory/\mbox{\hyperlink{MemoryBus_8hpp}{Memory\+Bus.\+hpp}}\item +sources/\+Memory/\mbox{\hyperlink{MemoryBus_8cpp}{Memory\+Bus.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.md5 b/docs/latex/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.md5 new file mode 100644 index 0000000..e9f1f31 --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.md5 @@ -0,0 +1 @@ +30651c083850cc19ec19050d9e937ad7 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.pdf b/docs/latex/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.pdf new file mode 100644 index 0000000..3cf52ab Binary files /dev/null and b/docs/latex/classComSquare_1_1Memory_1_1MemoryBus__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow.tex b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow.tex new file mode 100644 index 0000000..2e96cbe --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow.tex @@ -0,0 +1,139 @@ +\hypertarget{classComSquare_1_1Memory_1_1MemoryShadow}{}\doxysection{Com\+Square\+::Memory\+::Memory\+Shadow Class Reference} +\label{classComSquare_1_1Memory_1_1MemoryShadow}\index{ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}} + + +{\ttfamily \#include $<$Memory\+Shadow.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Memory\+::Memory\+Shadow\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=205pt]{classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Memory\+::Memory\+Shadow\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=205pt]{classComSquare_1_1Memory_1_1MemoryShadow__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow_aa73f81426a6ee830656e588518d16191}{Memory\+Shadow}} (std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$ initial, \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} start, \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} end) +\begin{DoxyCompactList}\small\item\em Create a shadow for the memory given as parameter. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow_abc27d0d65cf3f5b4b258a5aa8e1250ff}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Read from the initial \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} given. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow_a885d4559319980e9e5b706f7fe4c3f49}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) override +\begin{DoxyCompactList}\small\item\em Write data to the ram. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Static Public Member Functions} +\begin{DoxyCompactItemize} +\item +static std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow_a613c7768156c3b4c324d6ee2f193f673}{create\+Shadow}} (std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$ initial, \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} start, \mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} end) +\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow_a9ae9c9341461d2dc4ebe8fb1808b2dd1}{\+\_\+initial}} +\begin{DoxyCompactList}\small\item\em \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} to shadow from. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryShadow_aa73f81426a6ee830656e588518d16191}\label{classComSquare_1_1Memory_1_1MemoryShadow_aa73f81426a6ee830656e588518d16191}} +\index{ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}!MemoryShadow@{MemoryShadow}} +\index{MemoryShadow@{MemoryShadow}!ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}} +\doxysubsubsection{\texorpdfstring{MemoryShadow()}{MemoryShadow()}} +{\footnotesize\ttfamily Com\+Square\+::\+Memory\+::\+Memory\+Shadow\+::\+Memory\+Shadow (\begin{DoxyParamCaption}\item[{std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$}]{initial, }\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{start, }\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{end }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [explicit]}} + + + +Create a shadow for the memory given as parameter. + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryShadow_a613c7768156c3b4c324d6ee2f193f673}\label{classComSquare_1_1Memory_1_1MemoryShadow_a613c7768156c3b4c324d6ee2f193f673}} +\index{ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}!createShadow@{createShadow}} +\index{createShadow@{createShadow}!ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}} +\doxysubsubsection{\texorpdfstring{createShadow()}{createShadow()}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$ Com\+Square\+::\+Memory\+::\+Memory\+Shadow\+::create\+Shadow (\begin{DoxyParamCaption}\item[{std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} $>$}]{initial, }\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{start, }\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{end }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [static]}} + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryShadow_abc27d0d65cf3f5b4b258a5aa8e1250ff}\label{classComSquare_1_1Memory_1_1MemoryShadow_abc27d0d65cf3f5b4b258a5aa8e1250ff}} +\index{ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}!read@{read}} +\index{read@{read}!ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Memory\+::\+Memory\+Shadow\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Read from the initial \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} given. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to read from. The address 0x0 should refer to the first byte of the initial \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than the size of the initial \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the data at the address. +\end{DoxyReturn} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryShadow_a885d4559319980e9e5b706f7fe4c3f49}\label{classComSquare_1_1Memory_1_1MemoryShadow_a885d4559319980e9e5b706f7fe4c3f49}} +\index{ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}!write@{write}} +\index{write@{write}!ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Memory\+::\+Memory\+Shadow\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Write data to the ram. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to write to. The address 0x0 should refer to the first byte of the initial \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. \\ +\hline +{\em data} & The data to write. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than the size of the initial \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}. \\ +\hline +\end{DoxyExceptions} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1Memory_1_1MemoryShadow_a9ae9c9341461d2dc4ebe8fb1808b2dd1}\label{classComSquare_1_1Memory_1_1MemoryShadow_a9ae9c9341461d2dc4ebe8fb1808b2dd1}} +\index{ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}!\_initial@{\_initial}} +\index{\_initial@{\_initial}!ComSquare::Memory::MemoryShadow@{ComSquare::Memory::MemoryShadow}} +\doxysubsubsection{\texorpdfstring{\_initial}{\_initial}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}}$>$ Com\+Square\+::\+Memory\+::\+Memory\+Shadow\+::\+\_\+initial\hspace{0.3cm}{\ttfamily [private]}} + + + +\mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} to shadow from. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+Memory/\mbox{\hyperlink{MemoryShadow_8hpp}{Memory\+Shadow.\+hpp}}\item +sources/\+Memory/\mbox{\hyperlink{MemoryShadow_8cpp}{Memory\+Shadow.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.md5 b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.md5 new file mode 100644 index 0000000..e8cd29b --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.md5 @@ -0,0 +1 @@ +f55d3f5449d06e7b6b57c1473e517c19 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.pdf b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.pdf new file mode 100644 index 0000000..ae8e804 Binary files /dev/null and b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.md5 b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.md5 new file mode 100644 index 0000000..e8cd29b --- /dev/null +++ b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.md5 @@ -0,0 +1 @@ +f55d3f5449d06e7b6b57c1473e517c19 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.pdf b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.pdf new file mode 100644 index 0000000..a53ab96 Binary files /dev/null and b/docs/latex/classComSquare_1_1Memory_1_1MemoryShadow__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1NotImplementedException.tex b/docs/latex/classComSquare_1_1NotImplementedException.tex new file mode 100644 index 0000000..abfc746 --- /dev/null +++ b/docs/latex/classComSquare_1_1NotImplementedException.tex @@ -0,0 +1,64 @@ +\hypertarget{classComSquare_1_1NotImplementedException}{}\doxysection{Com\+Square\+::Not\+Implemented\+Exception Class Reference} +\label{classComSquare_1_1NotImplementedException}\index{ComSquare::NotImplementedException@{ComSquare::NotImplementedException}} + + +When this is thrown, it means that we should work more. + + + + +{\ttfamily \#include $<$Not\+Implemented\+Exception.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Not\+Implemented\+Exception\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=246pt]{classComSquare_1_1NotImplementedException__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Not\+Implemented\+Exception\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=246pt]{classComSquare_1_1NotImplementedException__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1NotImplementedException_a3405a9c8a25093bdbf8fc130e928cba8}{Not\+Implemented\+Exception}} ()=default +\item +const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$ \mbox{\hyperlink{classComSquare_1_1NotImplementedException_a2df6b41298f1b569fb90055e95051647}{what}} () const noexcept override +\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +When this is thrown, it means that we should work more. + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1NotImplementedException_a3405a9c8a25093bdbf8fc130e928cba8}\label{classComSquare_1_1NotImplementedException_a3405a9c8a25093bdbf8fc130e928cba8}} +\index{ComSquare::NotImplementedException@{ComSquare::NotImplementedException}!NotImplementedException@{NotImplementedException}} +\index{NotImplementedException@{NotImplementedException}!ComSquare::NotImplementedException@{ComSquare::NotImplementedException}} +\doxysubsubsection{\texorpdfstring{NotImplementedException()}{NotImplementedException()}} +{\footnotesize\ttfamily Com\+Square\+::\+Not\+Implemented\+Exception\+::\+Not\+Implemented\+Exception (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [explicit]}, {\ttfamily [default]}} + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1NotImplementedException_a2df6b41298f1b569fb90055e95051647}\label{classComSquare_1_1NotImplementedException_a2df6b41298f1b569fb90055e95051647}} +\index{ComSquare::NotImplementedException@{ComSquare::NotImplementedException}!what@{what}} +\index{what@{what}!ComSquare::NotImplementedException@{ComSquare::NotImplementedException}} +\doxysubsubsection{\texorpdfstring{what()}{what()}} +{\footnotesize\ttfamily const \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}}$\ast$ Com\+Square\+::\+Not\+Implemented\+Exception\+::what (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption}) const\hspace{0.3cm}{\ttfamily [inline]}, {\ttfamily [override]}, {\ttfamily [noexcept]}} + + + +The documentation for this class was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+Exceptions/\mbox{\hyperlink{NotImplementedException_8hpp}{Not\+Implemented\+Exception.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1NotImplementedException__coll__graph.md5 b/docs/latex/classComSquare_1_1NotImplementedException__coll__graph.md5 new file mode 100644 index 0000000..170c5d0 --- /dev/null +++ b/docs/latex/classComSquare_1_1NotImplementedException__coll__graph.md5 @@ -0,0 +1 @@ +c38ebe435bdf861ef4699f598e17e5ef \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1NotImplementedException__coll__graph.pdf b/docs/latex/classComSquare_1_1NotImplementedException__coll__graph.pdf new file mode 100644 index 0000000..ef73e3b Binary files /dev/null and b/docs/latex/classComSquare_1_1NotImplementedException__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1NotImplementedException__inherit__graph.md5 b/docs/latex/classComSquare_1_1NotImplementedException__inherit__graph.md5 new file mode 100644 index 0000000..170c5d0 --- /dev/null +++ b/docs/latex/classComSquare_1_1NotImplementedException__inherit__graph.md5 @@ -0,0 +1 @@ +c38ebe435bdf861ef4699f598e17e5ef \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1NotImplementedException__inherit__graph.pdf b/docs/latex/classComSquare_1_1NotImplementedException__inherit__graph.pdf new file mode 100644 index 0000000..6f9b27d Binary files /dev/null and b/docs/latex/classComSquare_1_1NotImplementedException__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1PPU_1_1PPU.tex b/docs/latex/classComSquare_1_1PPU_1_1PPU.tex new file mode 100644 index 0000000..9657e13 --- /dev/null +++ b/docs/latex/classComSquare_1_1PPU_1_1PPU.tex @@ -0,0 +1,1605 @@ +\hypertarget{classComSquare_1_1PPU_1_1PPU}{}\doxysection{Com\+Square\+::P\+PU\+::P\+PU Class Reference} +\label{classComSquare_1_1PPU_1_1PPU}\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} + + +The struct containing all the registers the \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}}. + + + + +{\ttfamily \#include $<$P\+P\+U.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::P\+PU\+::P\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[height=550pt]{classComSquare_1_1PPU_1_1PPU__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::P\+PU\+::P\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[height=550pt]{classComSquare_1_1PPU_1_1PPU__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a4fd2ca883c859d709883f2c096e39bcf}{P\+PU}} ()=default +\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_afb3e0bd3fdeddb091813ef3c36b20607}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Read data from the component. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aaf2261c0ef235d3181b038355b97cbe3}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) override +\begin{DoxyCompactList}\small\item\em Write data to this component. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3abfcd686ae28fc4d255bb76ac14f9e1}{update}} (\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} cycles) +\begin{DoxyCompactList}\small\item\em Update the \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}} of n cycles. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a20010d73cee9fe25b536dc3cf1af6dcd}{fblank}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6fee836aeef61e1ef5905306b6a01efe}{\_}}: 3\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa8db6a11d518a6dca8381005c5ee4168}{brightness}}: 4\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aee65c3ef332592745f5423a61c433374}{inidisp}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em I\+N\+I\+D\+I\+SP Register (F-\/blank and Brightness) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_affb09d2bee7fafdc75eef3e8cd75f036}{objectSize}}: 3\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a2c5dcb02bdea2fbe50da49c4f58328a5}{nameSelect}}: 2\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a9ce3180c43a55f6d009b24baadbe0f0a}{baseSelect}}: 3\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aadf87ba48318535f51985a294630955b}{obsel}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em O\+B\+S\+EL Register (Object Size and Character Address) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3d5dd60e5ec94cf9583c9c2e85939056}{objPriorityActivationBit}}: 1\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 6\\ +\>\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aba3a743234981a6f62a20ef2f4832841}{oamAddress}}: 9\\ +\>\} \\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a27b2c72e20d387880a7562701b902cc4}{oamaddh}}\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a99b3af5840819335595620cb2f875aa4}{oamaddl}}\\ +\>\} \\ +\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa077c9fc8b001817bc4de5f4a6ee6013}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a4029d5b571e23ff0d78ec81d3b6179b7}{oamadd}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em O\+A\+M\+A\+DD Register (O\+AM Address and Obj Priority) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a20e74973ca868554e2bcc139b96bbbd8}{oamdata}} +\begin{DoxyCompactList}\small\item\em O\+A\+M\+D\+A\+TA Register (Data for O\+AM write) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ae1467b859e161568d49c48f251b40df1}{characterSizeBg4}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a033a358fb63f3ec9252b1c531e05c6ff}{characterSizeBg3}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a738b9662f70916330b7d1181d1199d39}{characterSizeBg2}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a106343cca3de05c11976017c454ab4c2}{characterSizeBg1}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a49ef1474d2b09b989e1808ae6a677b23}{mode1Bg3PriorityBit}}: 1\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad31830ea1540d0fcb6b93cd815839dfc}{bgMode}}: 3\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a568c9e5a4bd11a465f723aa37dfdd9ab}{bgmode}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G\+M\+O\+DE Register (O\+AM Address and Obj Priority) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa328d9626498061e58c55fe9635049e2}{pixelSize}}: 4\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_abbebe9a22587d4abd5c5735855349344}{affectBg4}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a4307e93f303ac9a58e00f3fd0dc5181a}{affectBg3}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_afb56625172bf542ac92557a996f2fc58}{affectBg2}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a75bf4d4f2c16960c67afd64d5893de8f}{affectBg1}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a8f495356953452cba784c7ca5a8bf00e}{mosaic}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em M\+O\+S\+A\+IC Register (Screen Pixelation) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6db4b1553f6f2162988dc27bb0c46047}{tilemapAddress}}: 6\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a62fc6e0855f7e75884839aa170e5c769}{tilemapHorizontalMirroring}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad85fad2c65c7169762734726b093b71a}{tilemapVerticalMirroring}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_afada168e444b66b66e5163a5c8094210}{bg1sc}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G1\+SC Register (B\+G1 Tilemap Address and Size) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6db4b1553f6f2162988dc27bb0c46047}{tilemapAddress}}: 6\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a62fc6e0855f7e75884839aa170e5c769}{tilemapHorizontalMirroring}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad85fad2c65c7169762734726b093b71a}{tilemapVerticalMirroring}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa7fd0c2bb6aae15a535cf1e78f53f417}{bg2sc}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G2\+SC Register (B\+G2 Tilemap Address and Size) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6db4b1553f6f2162988dc27bb0c46047}{tilemapAddress}}: 6\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a62fc6e0855f7e75884839aa170e5c769}{tilemapHorizontalMirroring}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad85fad2c65c7169762734726b093b71a}{tilemapVerticalMirroring}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_afd9df043d7aa12ead546e273b1b686ad}{bg3sc}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G3\+SC Register (B\+G3 Tilemap Address and Size) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6db4b1553f6f2162988dc27bb0c46047}{tilemapAddress}}: 6\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a62fc6e0855f7e75884839aa170e5c769}{tilemapHorizontalMirroring}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad85fad2c65c7169762734726b093b71a}{tilemapVerticalMirroring}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a7d663927222627004c83a09a29f5634d}{bg4sc}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G4\+SC Register (B\+G4 Tilemap Address and Size) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac06bb413a8b7317a095f2905cf34f09c}{baseAddressBg2a4}}: 4\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a714f3b3a8e14bb5923f423b8fa0430e6}{baseAddressBg1a3}}: 4\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a7c3f52bc06c607d365158358ed9ad68c}{bg12nba}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G12\+N\+BA Register (B\+G1 and 2 Chr Address) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac06bb413a8b7317a095f2905cf34f09c}{baseAddressBg2a4}}: 4\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a714f3b3a8e14bb5923f423b8fa0430e6}{baseAddressBg1a3}}: 4\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa84c3f7fb538b727b506cc867f1eb399}{bg34nba}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G34\+N\+BA Register (B\+G3 and 4 Chr Address) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 6\\ +\>\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3732e3f10e2ba6d78b6f29750a7da2ea}{offsetBg}}: 10\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a729f84219f7bf306b456809247f794e8}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_afdc673c4bb77091e0a0277f5ff4b600e}{bg1ofs}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G1\+H\+O\+FS Register (B\+G1 Horizontal Scroll) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3732e3f10e2ba6d78b6f29750a7da2ea}{offsetBg}}: 13\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_af6c4596ba682a867608d4587db646774}{m7ofs}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em M7\+H\+O\+FS Register (Mode 7 BG Horizontal Scroll) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 6\\ +\>\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3732e3f10e2ba6d78b6f29750a7da2ea}{offsetBg}}: 10\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a5a31b91f72d4980d173fa98139adbe48}{bg2ofs}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G2\+H\+O\+FS Register (B\+G2 Horizontal Scroll) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 6\\ +\>\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3732e3f10e2ba6d78b6f29750a7da2ea}{offsetBg}}: 10\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a269afc32fa34d89a96e08176f57c0068}{bg3ofs}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G3\+H\+O\+FS Register (B\+G3 Horizontal Scroll) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3732e3f10e2ba6d78b6f29750a7da2ea}{offsetBg}}: 10\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad518d3bb96a873c906337af590f2d595}{bg4ofs}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em B\+G4\+H\+O\+FS Register (B\+G4 Horizontal Scroll) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac1073ec630f6dd0dcf7ad2473a9e8b5f}{address}}: 1\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a92d75bc828ef7802b61ba1ea98af67a1}{addressRemapping}}: 2\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ab97032aaacecb7108fd1c57ca7b74698}{incrementCount}}: 2\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a1adabe810b31f6564f6f9c79eabf0d67}{vmain}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em V\+M\+A\+IN Register (Video Port Control) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aae0095b0bc2acb3e641e27c33324ac14}{vmaddh}}\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_abe9b64666b8205577325b764553e9c62}{vmaddl}}\\ +\>\} \\ +\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac9f3d4274faf79b60af40ea8e15a2251}{vmadd}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a9c87dbe97c8c56cad37519e535fb8c49}{vmadd}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em V\+M\+A\+DD Register (V\+R\+AM Address) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a51cfaef5269b1d865e9b537488bde460}{vmdatah}}\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a9510fc6b0b614235468dc4e9a495717c}{vmdatal}}\\ +\>\} \\ +\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_af3d7ceab8adce20636a5e52a5c4c770d}{vmdata}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a8bd73719c6be1a7b5b961a6d3265b30b}{vmdata}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em V\+M\+D\+A\+TA Register (V\+R\+AM Data Write) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a1f40052c6f5cfc34702af785535d7382}{playingFieldSize}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_acb734a1496f19c0a14bb105fc45c16c9}{emptySpaceFill}}: 1\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 4\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a8b15d07cd3696c70bc77d2dc8ffde395}{horizontalMirroring}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a1630dc302a60891d669a55832af43358}{verticalMirroring}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a1915ae2586d7f0e7ad3f0046e98c4082}{m7sel}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em M7\+S\+EL Register (Mode 7 Settings) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa85a69028133e60a065901426bac6830}{value}}\\ +\>\} \\ +\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a77506c8796f2e46d0954efc56059b833}{center}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aac2fb2ec8798b7e268d5a1ab87239fc5}{m7x}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em M7X Register (Mode 7 Center X) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa85a69028133e60a065901426bac6830}{value}}\\ +\>\} \\ +\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a77506c8796f2e46d0954efc56059b833}{center}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a9747502f5efe506045c43fcfc425a3ff}{m7y}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em M7Y Register (Mode 7 Center Y) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac5e2e9d688235ab74813521770959653}{cgadd}} +\begin{DoxyCompactList}\small\item\em C\+G\+A\+DD Register (C\+G\+R\+AM Address) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6fee836aeef61e1ef5905306b6a01efe}{\_}}: 1\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ae6f175ebd7dcf26b459633be7d039573}{blue}}: 5\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a145abd657ed3417f2ee62bf4a1ab76ec}{green}}: 5\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa777979e58b018eadc15c498c51ee847}{red}}: 5\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a729f84219f7bf306b456809247f794e8}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac3e7cd5393b06f731e5b6f9bcf9a9fc3}{cgdata}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em C\+G\+D\+A\+TA Register (C\+G\+R\+AM Data write) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac9ec49ed0a18bb100869abbab1aa7aea}{enableWindow2ForBg2Bg4Color}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_abbe9ead425d92e0d1ef388814aa57cbe}{window2InversionForBg2Bg4Color}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a87915d3d5be3b10ef105e8b7fa719a8a}{enableWindow1ForBg2Bg4Color}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a129f2bf67320366e542cd6ef94391cb5}{window1InversionForBg2Bg4Color}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a854bb2c6161b9ba31ccf8c6d3046ba9a}{enableWindow2ForBg1Bg3Obj}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_acb25a221f7810763d688c841abeda905}{window2InversionForBg1Bg3Obj}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a8375c7e013ad00c7b3d95cc692d7daae}{enableWindow1ForBg1Bg2Obj}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a733fa4df9087069bce693d5d30c48cdb}{window1InversionForBg1Bg2Obj}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a8bf7ac4696cf2dbf46c87fa79ef09cfd}{wsel}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em W12\+S\+EL -\/ W34\+S\+EL Registers (Window Mask Settings for B\+Gs) and W\+O\+B\+J\+S\+EL Register (Window Mask Settings for O\+BJ and Color Window) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a030f8be9d159d8cc98bdf23bb7c5629b}{wh0}} +\begin{DoxyCompactList}\small\item\em W\+H0 Register (C\+Window 1 Left Position) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a023dc000412b5921dfdc36a7b3f2b593}{wh1}} +\begin{DoxyCompactList}\small\item\em W\+H1 Register (C\+Window 1 Right Position) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ae5dadf61772bbd3b6b36db6a6c7d9bca}{wh2}} +\begin{DoxyCompactList}\small\item\em W\+H2 Register (C\+Window 2 Left Position) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a9cb95f907fd28664d2ef35c2ddb6bdf4}{wh3}} +\begin{DoxyCompactList}\small\item\em W\+H3 Register (C\+Window 2 Right Position) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a2669489183ca59bc595b329106c96468}{maskLogicBg1}}: 2\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_adfcac6cbf978a53ee7f5ef17f20791a3}{maskLogicBg2}}: 2\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a263e369937c0bf00ad3de6d787dadca3}{maskLogicBg3}}: 2\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a4fe985a2879f5fa8b29bf8ac04bd299e}{maskLogicBg4}}: 2\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa03fbd9e9b3db49d10318c6eb1863b5d}{wbglog}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em W\+B\+G\+L\+OG Register (Window mask logic for B\+Gs) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 4\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aca316d3992c29cf4b61e3a440ff289e8}{maskLogicObj}}: 2\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_af69397dbda6c4b8a7228e3559148a11d}{maskLogicColor}}: 2\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a416cfb3e30589d51ba671fd157e9d755}{wobjlog}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em W\+O\+B\+J\+L\+OG Register (Window mask logic for O\+B\+Js and Color Window) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3fef9a20586f4667e70be158e9cf4c49}{enableWindowDisplayObj}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a80b5f1858b503dca7142a3b4a1b77ed0}{enableWindowDisplayBg4}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad6afcb4335d686d8dc77dff5cee9b3de}{enableWindowDisplayBg3}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3874cb31b794a9ae92266dfc201f1791}{enableWindowDisplayBg2}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_af7216991b1369e315ad7fed901c23b80}{enableWindowDisplayBg1}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a671e2987746847e07236d567d50bbcaf}{tm}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em TM Register (Main Screen Designation) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3fef9a20586f4667e70be158e9cf4c49}{enableWindowDisplayObj}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a80b5f1858b503dca7142a3b4a1b77ed0}{enableWindowDisplayBg4}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad6afcb4335d686d8dc77dff5cee9b3de}{enableWindowDisplayBg3}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3874cb31b794a9ae92266dfc201f1791}{enableWindowDisplayBg2}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_af7216991b1369e315ad7fed901c23b80}{enableWindowDisplayBg1}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aae1ddaa8c3aa82ff67ba455f33402a2c}{ts}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em TS Register (Sub Screen Designation) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a62961df0de47fd2e01b8ff85dda42f06}{enableWindowMaskingObj}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a2f744e622b177e23ad49b6f3c268b08c}{enableWindowMaskingBg4}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad0a1c374d382cbc492ae1cbb2cb68311}{enableWindowMaskingBg3}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad12b53cfd3e51e3e6aa3b8de737249e3}{enableWindowMaskingBg2}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ae1d160863aeffcfa4efc4d74512b5325}{enableWindowMaskingBg1}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6f6e5d62cfb23980484d825ee3649770}{tmw}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em T\+MW Register (Window Mask Designation for the Main Screen) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 3\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a62961df0de47fd2e01b8ff85dda42f06}{enableWindowMaskingObj}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a2f744e622b177e23ad49b6f3c268b08c}{enableWindowMaskingBg4}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad0a1c374d382cbc492ae1cbb2cb68311}{enableWindowMaskingBg3}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad12b53cfd3e51e3e6aa3b8de737249e3}{enableWindowMaskingBg2}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ae1d160863aeffcfa4efc4d74512b5325}{enableWindowMaskingBg1}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3d43dbc62128fed929d1bb423724f642}{tsw}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em T\+SW Register (Window Mask Designation for the Sub Screen) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_af7d7b2b470817c568e12e7c8b5f08da4}{clipColorToBlackBeforeMath}}: 2\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a43d44c71261ab53daa5ae6029485cee3}{preventColorMath}}: 2\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 2\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a74324151c6968d01c6892cbc36ef3381}{addSubscreen}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a69114422a412d228e4bff08ef28740cb}{directColorMode}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a92b2521550cb261058557ae93c095616}{cgwsel}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em C\+G\+W\+S\+EL Register (Color Addition Select) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a5c63ed11a105bed5d6d83ebe45d5da50}{addSubtractSelect}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aa8016d4a4974fd63451515ff5aaa116a}{halfColorMath}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a27b547b7778635cc2a2bbe3f1bbb3631}{enableColorMathBackdrop}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_aae89376e67859c253032d021aaf4ccbb}{enableColorMathObj}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a01959b3d68fc53370b4b8f678651ca34}{enableColorMathBg4}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a8b4e84d876320cc04c091d3fd26d2794}{enableColorMathBg3}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ae2898774a90b01d666ced97285a02f2c}{enableColorMathBg2}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac0a304abc8eb072b4e6579992a50a7af}{enableColorMathBg1}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6753c9e539e707a14e5c21c875026397}{cgadsub}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em C\+G\+A\+D\+S\+UB Register (Color Math designation) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a920267b08b737762495b6caa4d9afa36}{blue}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ac924d3c9890799e337aa631ec36d2182}{green}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a544f9c495c06aa343dfdef5bd01d51ba}{red}}: 1\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a9ef196aeb6a1d02a8d0745f20377b11b}{colorIntensity}}: 5\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ab5873fc397e76c583db67ccc437c2641}{coldata}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em C\+O\+L\+D\+A\+TA Register (Fixed Color Data) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_af526da3fb8cb495912a7e69624148d7e}{externalSync}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a2cae28db6862f00a4f5a4ad26cc5136e}{mode7ExtBg}}: 1\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}{\_}}: 2\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a5d99a0fcb0df3393e80c5ee7bc37a9d6}{enablePseudoHiresMode}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a2ccd92237a540d6bdcb4d2989c1154ec}{overscanMode}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a6168eb8399a3a65e9d9ad24324698f60}{objInterlace}}: 1\\ +\>\>bool \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_ad3fcfe5a70b23c1e7ff60e1f6430f8ed}{screenInterlace}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a3d3d56f6bd419dc37bd702a4ca38a398}{setini}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em S\+E\+T\+I\+NI Register (Screen Mode/\+Video Select) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a7f80541c6cb23566093b7691f69a3897}{mpyl}}\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a2384fae273a111db47ae26955758bd82}{mpym}}\\ +\>\>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a423b411c84f74a091c5ea531f40e4c81}{mpyh}}\\ +\>\} \\ +\>uint32\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a09f0557e762ec93e438058b2cdd5d043}{mpy}}\\ +\} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a16b95a7ac433073c45e7d173d89fb569}{mpy}}\\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em M\+P\+YL -\/ M\+P\+YM -\/ M\+P\+YH Registers (Multiplication Result) \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +The struct containing all the registers the \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}}. + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a4fd2ca883c859d709883f2c096e39bcf}\label{classComSquare_1_1PPU_1_1PPU_a4fd2ca883c859d709883f2c096e39bcf}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!PPU@{PPU}} +\index{PPU@{PPU}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{PPU()}{PPU()}} +{\footnotesize\ttfamily Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::\+P\+PU (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [explicit]}, {\ttfamily [default]}} + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_afb3e0bd3fdeddb091813ef3c36b20607}\label{classComSquare_1_1PPU_1_1PPU_afb3e0bd3fdeddb091813ef3c36b20607}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!read@{read}} +\index{read@{read}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Read data from the component. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The local address to read from (0x0 should refer to the first byte of this component). \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em This} & function should thrown an \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}} for address that are not mapped to the component. \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the data at the address given as parameter. +\end{DoxyReturn} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a3abfcd686ae28fc4d255bb76ac14f9e1}\label{classComSquare_1_1PPU_1_1PPU_a3abfcd686ae28fc4d255bb76ac14f9e1}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!update@{update}} +\index{update@{update}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{update()}{update()}} +{\footnotesize\ttfamily void Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::update (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{cycles }\end{DoxyParamCaption})} + + + +Update the \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}} of n cycles. + + +\begin{DoxyParams}{Parameters} +{\em The} & number of cycles to update. \\ +\hline +\end{DoxyParams} +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aaf2261c0ef235d3181b038355b97cbe3}\label{classComSquare_1_1PPU_1_1PPU_aaf2261c0ef235d3181b038355b97cbe3}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!write@{write}} +\index{write@{write}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily void Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Write data to this component. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The local address to write data (0x0 should refer to the first byte of this component). \\ +\hline +{\em data} & The new data to write. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em This} & function should thrown an \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}} for address that are not mapped to the component. \\ +\hline +\end{DoxyExceptions} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a6fee836aeef61e1ef5905306b6a01efe}\label{classComSquare_1_1PPU_1_1PPU_a6fee836aeef61e1ef5905306b6a01efe}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!\_@{\_}} +\index{\_@{\_}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{\_}{\_}\hspace{0.1cm}{\footnotesize\ttfamily [1/2]}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::\+\_\+} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}\label{classComSquare_1_1PPU_1_1PPU_a811b3a90904c69d316319f431b21fb64}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!\_@{\_}} +\index{\_@{\_}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{\_}{\_}\hspace{0.1cm}{\footnotesize\ttfamily [2/2]}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::\+\_\+} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ac1073ec630f6dd0dcf7ad2473a9e8b5f}\label{classComSquare_1_1PPU_1_1PPU_ac1073ec630f6dd0dcf7ad2473a9e8b5f}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!address@{address}} +\index{address@{address}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{address}{address}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::address} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a92d75bc828ef7802b61ba1ea98af67a1}\label{classComSquare_1_1PPU_1_1PPU_a92d75bc828ef7802b61ba1ea98af67a1}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!addressRemapping@{addressRemapping}} +\index{addressRemapping@{addressRemapping}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{addressRemapping}{addressRemapping}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::address\+Remapping} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a74324151c6968d01c6892cbc36ef3381}\label{classComSquare_1_1PPU_1_1PPU_a74324151c6968d01c6892cbc36ef3381}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!addSubscreen@{addSubscreen}} +\index{addSubscreen@{addSubscreen}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{addSubscreen}{addSubscreen}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::add\+Subscreen} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a5c63ed11a105bed5d6d83ebe45d5da50}\label{classComSquare_1_1PPU_1_1PPU_a5c63ed11a105bed5d6d83ebe45d5da50}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!addSubtractSelect@{addSubtractSelect}} +\index{addSubtractSelect@{addSubtractSelect}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{addSubtractSelect}{addSubtractSelect}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::add\+Subtract\+Select} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a75bf4d4f2c16960c67afd64d5893de8f}\label{classComSquare_1_1PPU_1_1PPU_a75bf4d4f2c16960c67afd64d5893de8f}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!affectBg1@{affectBg1}} +\index{affectBg1@{affectBg1}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{affectBg1}{affectBg1}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::affect\+Bg1} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_afb56625172bf542ac92557a996f2fc58}\label{classComSquare_1_1PPU_1_1PPU_afb56625172bf542ac92557a996f2fc58}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!affectBg2@{affectBg2}} +\index{affectBg2@{affectBg2}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{affectBg2}{affectBg2}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::affect\+Bg2} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a4307e93f303ac9a58e00f3fd0dc5181a}\label{classComSquare_1_1PPU_1_1PPU_a4307e93f303ac9a58e00f3fd0dc5181a}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!affectBg3@{affectBg3}} +\index{affectBg3@{affectBg3}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{affectBg3}{affectBg3}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::affect\+Bg3} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_abbebe9a22587d4abd5c5735855349344}\label{classComSquare_1_1PPU_1_1PPU_abbebe9a22587d4abd5c5735855349344}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!affectBg4@{affectBg4}} +\index{affectBg4@{affectBg4}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{affectBg4}{affectBg4}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::affect\+Bg4} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a714f3b3a8e14bb5923f423b8fa0430e6}\label{classComSquare_1_1PPU_1_1PPU_a714f3b3a8e14bb5923f423b8fa0430e6}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!baseAddressBg1a3@{baseAddressBg1a3}} +\index{baseAddressBg1a3@{baseAddressBg1a3}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{baseAddressBg1a3}{baseAddressBg1a3}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::base\+Address\+Bg1a3} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ac06bb413a8b7317a095f2905cf34f09c}\label{classComSquare_1_1PPU_1_1PPU_ac06bb413a8b7317a095f2905cf34f09c}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!baseAddressBg2a4@{baseAddressBg2a4}} +\index{baseAddressBg2a4@{baseAddressBg2a4}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{baseAddressBg2a4}{baseAddressBg2a4}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::base\+Address\+Bg2a4} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a9ce3180c43a55f6d009b24baadbe0f0a}\label{classComSquare_1_1PPU_1_1PPU_a9ce3180c43a55f6d009b24baadbe0f0a}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!baseSelect@{baseSelect}} +\index{baseSelect@{baseSelect}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{baseSelect}{baseSelect}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::base\+Select} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a7c3f52bc06c607d365158358ed9ad68c}\label{classComSquare_1_1PPU_1_1PPU_a7c3f52bc06c607d365158358ed9ad68c}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg12nba@{bg12nba}} +\index{bg12nba@{bg12nba}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg12nba}{bg12nba}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg12nba\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G12\+N\+BA Register (B\+G1 and 2 Chr Address) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_afdc673c4bb77091e0a0277f5ff4b600e}\label{classComSquare_1_1PPU_1_1PPU_afdc673c4bb77091e0a0277f5ff4b600e}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg1ofs@{bg1ofs}} +\index{bg1ofs@{bg1ofs}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg1ofs}{bg1ofs}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg1ofs\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G1\+H\+O\+FS Register (B\+G1 Horizontal Scroll) + +B\+G1\+V\+O\+FS Register (B\+G1 Vertical Scroll) \mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_afada168e444b66b66e5163a5c8094210}\label{classComSquare_1_1PPU_1_1PPU_afada168e444b66b66e5163a5c8094210}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg1sc@{bg1sc}} +\index{bg1sc@{bg1sc}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg1sc}{bg1sc}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg1sc\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G1\+SC Register (B\+G1 Tilemap Address and Size) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a5a31b91f72d4980d173fa98139adbe48}\label{classComSquare_1_1PPU_1_1PPU_a5a31b91f72d4980d173fa98139adbe48}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg2ofs@{bg2ofs}} +\index{bg2ofs@{bg2ofs}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg2ofs}{bg2ofs}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg2ofs\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G2\+H\+O\+FS Register (B\+G2 Horizontal Scroll) + +B\+G2\+V\+O\+FS Register (B\+G2 Vertical Scroll) \mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aa7fd0c2bb6aae15a535cf1e78f53f417}\label{classComSquare_1_1PPU_1_1PPU_aa7fd0c2bb6aae15a535cf1e78f53f417}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg2sc@{bg2sc}} +\index{bg2sc@{bg2sc}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg2sc}{bg2sc}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg2sc\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G2\+SC Register (B\+G2 Tilemap Address and Size) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aa84c3f7fb538b727b506cc867f1eb399}\label{classComSquare_1_1PPU_1_1PPU_aa84c3f7fb538b727b506cc867f1eb399}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg34nba@{bg34nba}} +\index{bg34nba@{bg34nba}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg34nba}{bg34nba}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg34nba\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G34\+N\+BA Register (B\+G3 and 4 Chr Address) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a269afc32fa34d89a96e08176f57c0068}\label{classComSquare_1_1PPU_1_1PPU_a269afc32fa34d89a96e08176f57c0068}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg3ofs@{bg3ofs}} +\index{bg3ofs@{bg3ofs}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg3ofs}{bg3ofs}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg3ofs\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G3\+H\+O\+FS Register (B\+G3 Horizontal Scroll) + +B\+G3\+V\+O\+FS Register (B\+G3 Vertical Scroll) \mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_afd9df043d7aa12ead546e273b1b686ad}\label{classComSquare_1_1PPU_1_1PPU_afd9df043d7aa12ead546e273b1b686ad}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg3sc@{bg3sc}} +\index{bg3sc@{bg3sc}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg3sc}{bg3sc}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg3sc\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G3\+SC Register (B\+G3 Tilemap Address and Size) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ad518d3bb96a873c906337af590f2d595}\label{classComSquare_1_1PPU_1_1PPU_ad518d3bb96a873c906337af590f2d595}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg4ofs@{bg4ofs}} +\index{bg4ofs@{bg4ofs}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg4ofs}{bg4ofs}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg4ofs\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G4\+H\+O\+FS Register (B\+G4 Horizontal Scroll) + +B\+G4\+V\+O\+FS Register (B\+G4 Vertical Scroll) \mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a7d663927222627004c83a09a29f5634d}\label{classComSquare_1_1PPU_1_1PPU_a7d663927222627004c83a09a29f5634d}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bg4sc@{bg4sc}} +\index{bg4sc@{bg4sc}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bg4sc}{bg4sc}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg4sc\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G4\+SC Register (B\+G4 Tilemap Address and Size) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ad31830ea1540d0fcb6b93cd815839dfc}\label{classComSquare_1_1PPU_1_1PPU_ad31830ea1540d0fcb6b93cd815839dfc}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bgMode@{bgMode}} +\index{bgMode@{bgMode}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bgMode}{bgMode}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bg\+Mode} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a568c9e5a4bd11a465f723aa37dfdd9ab}\label{classComSquare_1_1PPU_1_1PPU_a568c9e5a4bd11a465f723aa37dfdd9ab}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!bgmode@{bgmode}} +\index{bgmode@{bgmode}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{bgmode}{bgmode}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::bgmode\hspace{0.3cm}{\ttfamily [private]}} + + + +B\+G\+M\+O\+DE Register (O\+AM Address and Obj Priority) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ae6f175ebd7dcf26b459633be7d039573}\label{classComSquare_1_1PPU_1_1PPU_ae6f175ebd7dcf26b459633be7d039573}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!blue@{blue}} +\index{blue@{blue}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{blue}{blue}\hspace{0.1cm}{\footnotesize\ttfamily [1/2]}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::blue} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a920267b08b737762495b6caa4d9afa36}\label{classComSquare_1_1PPU_1_1PPU_a920267b08b737762495b6caa4d9afa36}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!blue@{blue}} +\index{blue@{blue}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{blue}{blue}\hspace{0.1cm}{\footnotesize\ttfamily [2/2]}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::blue} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aa8db6a11d518a6dca8381005c5ee4168}\label{classComSquare_1_1PPU_1_1PPU_aa8db6a11d518a6dca8381005c5ee4168}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!brightness@{brightness}} +\index{brightness@{brightness}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{brightness}{brightness}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::brightness} + 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+{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::enable\+Window\+Masking\+Bg3} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a2f744e622b177e23ad49b6f3c268b08c}\label{classComSquare_1_1PPU_1_1PPU_a2f744e622b177e23ad49b6f3c268b08c}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!enableWindowMaskingBg4@{enableWindowMaskingBg4}} +\index{enableWindowMaskingBg4@{enableWindowMaskingBg4}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{enableWindowMaskingBg4}{enableWindowMaskingBg4}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::enable\+Window\+Masking\+Bg4} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a62961df0de47fd2e01b8ff85dda42f06}\label{classComSquare_1_1PPU_1_1PPU_a62961df0de47fd2e01b8ff85dda42f06}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!enableWindowMaskingObj@{enableWindowMaskingObj}} +\index{enableWindowMaskingObj@{enableWindowMaskingObj}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{enableWindowMaskingObj}{enableWindowMaskingObj}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::enable\+Window\+Masking\+Obj} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_af526da3fb8cb495912a7e69624148d7e}\label{classComSquare_1_1PPU_1_1PPU_af526da3fb8cb495912a7e69624148d7e}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!externalSync@{externalSync}} +\index{externalSync@{externalSync}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{externalSync}{externalSync}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::external\+Sync} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a20010d73cee9fe25b536dc3cf1af6dcd}\label{classComSquare_1_1PPU_1_1PPU_a20010d73cee9fe25b536dc3cf1af6dcd}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!fblank@{fblank}} +\index{fblank@{fblank}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{fblank}{fblank}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::fblank} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a145abd657ed3417f2ee62bf4a1ab76ec}\label{classComSquare_1_1PPU_1_1PPU_a145abd657ed3417f2ee62bf4a1ab76ec}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!green@{green}} +\index{green@{green}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{green}{green}\hspace{0.1cm}{\footnotesize\ttfamily [1/2]}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::green} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ac924d3c9890799e337aa631ec36d2182}\label{classComSquare_1_1PPU_1_1PPU_ac924d3c9890799e337aa631ec36d2182}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!green@{green}} +\index{green@{green}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{green}{green}\hspace{0.1cm}{\footnotesize\ttfamily [2/2]}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::green} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aa8016d4a4974fd63451515ff5aaa116a}\label{classComSquare_1_1PPU_1_1PPU_aa8016d4a4974fd63451515ff5aaa116a}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!halfColorMath@{halfColorMath}} +\index{halfColorMath@{halfColorMath}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{halfColorMath}{halfColorMath}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::half\+Color\+Math} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a8b15d07cd3696c70bc77d2dc8ffde395}\label{classComSquare_1_1PPU_1_1PPU_a8b15d07cd3696c70bc77d2dc8ffde395}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!horizontalMirroring@{horizontalMirroring}} +\index{horizontalMirroring@{horizontalMirroring}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{horizontalMirroring}{horizontalMirroring}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::horizontal\+Mirroring} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ab97032aaacecb7108fd1c57ca7b74698}\label{classComSquare_1_1PPU_1_1PPU_ab97032aaacecb7108fd1c57ca7b74698}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!incrementCount@{incrementCount}} +\index{incrementCount@{incrementCount}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{incrementCount}{incrementCount}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::increment\+Count} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aee65c3ef332592745f5423a61c433374}\label{classComSquare_1_1PPU_1_1PPU_aee65c3ef332592745f5423a61c433374}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!inidisp@{inidisp}} +\index{inidisp@{inidisp}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{inidisp}{inidisp}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::inidisp\hspace{0.3cm}{\ttfamily [private]}} + + + +I\+N\+I\+D\+I\+SP Register (F-\/blank and Brightness) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_af6c4596ba682a867608d4587db646774}\label{classComSquare_1_1PPU_1_1PPU_af6c4596ba682a867608d4587db646774}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!m7ofs@{m7ofs}} +\index{m7ofs@{m7ofs}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{m7ofs}{m7ofs}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::m7ofs\hspace{0.3cm}{\ttfamily [private]}} + + + +M7\+H\+O\+FS Register (Mode 7 BG Horizontal Scroll) + +M7\+V\+O\+FS Register (Mode 7 BG Vertical Scroll) \mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a1915ae2586d7f0e7ad3f0046e98c4082}\label{classComSquare_1_1PPU_1_1PPU_a1915ae2586d7f0e7ad3f0046e98c4082}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!m7sel@{m7sel}} +\index{m7sel@{m7sel}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{m7sel}{m7sel}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::m7sel\hspace{0.3cm}{\ttfamily [private]}} + + + +M7\+S\+EL Register (Mode 7 Settings) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aac2fb2ec8798b7e268d5a1ab87239fc5}\label{classComSquare_1_1PPU_1_1PPU_aac2fb2ec8798b7e268d5a1ab87239fc5}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!m7x@{m7x}} +\index{m7x@{m7x}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{m7x}{m7x}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::m7x\hspace{0.3cm}{\ttfamily [private]}} + + + +M7X Register (Mode 7 Center X) + +M7A M7B M7C M7D i didn\textquotesingle{}t understand how they works so they will be added later. \mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a9747502f5efe506045c43fcfc425a3ff}\label{classComSquare_1_1PPU_1_1PPU_a9747502f5efe506045c43fcfc425a3ff}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!m7y@{m7y}} +\index{m7y@{m7y}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{m7y}{m7y}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::m7y\hspace{0.3cm}{\ttfamily [private]}} + + + +M7Y Register (Mode 7 Center Y) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a2669489183ca59bc595b329106c96468}\label{classComSquare_1_1PPU_1_1PPU_a2669489183ca59bc595b329106c96468}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!maskLogicBg1@{maskLogicBg1}} +\index{maskLogicBg1@{maskLogicBg1}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{maskLogicBg1}{maskLogicBg1}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::mask\+Logic\+Bg1} + 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+\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aca316d3992c29cf4b61e3a440ff289e8}\label{classComSquare_1_1PPU_1_1PPU_aca316d3992c29cf4b61e3a440ff289e8}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!maskLogicObj@{maskLogicObj}} +\index{maskLogicObj@{maskLogicObj}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{maskLogicObj}{maskLogicObj}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::mask\+Logic\+Obj} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a49ef1474d2b09b989e1808ae6a677b23}\label{classComSquare_1_1PPU_1_1PPU_a49ef1474d2b09b989e1808ae6a677b23}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!mode1Bg3PriorityBit@{mode1Bg3PriorityBit}} +\index{mode1Bg3PriorityBit@{mode1Bg3PriorityBit}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{mode1Bg3PriorityBit}{mode1Bg3PriorityBit}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::mode1\+Bg3\+Priority\+Bit} + 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(Multiplication Result) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a423b411c84f74a091c5ea531f40e4c81}\label{classComSquare_1_1PPU_1_1PPU_a423b411c84f74a091c5ea531f40e4c81}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!mpyh@{mpyh}} +\index{mpyh@{mpyh}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{mpyh}{mpyh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::mpyh} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a7f80541c6cb23566093b7691f69a3897}\label{classComSquare_1_1PPU_1_1PPU_a7f80541c6cb23566093b7691f69a3897}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!mpyl@{mpyl}} +\index{mpyl@{mpyl}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{mpyl}{mpyl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::mpyl} + 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+\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a99b3af5840819335595620cb2f875aa4}\label{classComSquare_1_1PPU_1_1PPU_a99b3af5840819335595620cb2f875aa4}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!oamaddl@{oamaddl}} +\index{oamaddl@{oamaddl}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{oamaddl}{oamaddl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::oamaddl} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aba3a743234981a6f62a20ef2f4832841}\label{classComSquare_1_1PPU_1_1PPU_aba3a743234981a6f62a20ef2f4832841}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!oamAddress@{oamAddress}} +\index{oamAddress@{oamAddress}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{oamAddress}{oamAddress}} +{\footnotesize\ttfamily uint32\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::oam\+Address} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a20e74973ca868554e2bcc139b96bbbd8}\label{classComSquare_1_1PPU_1_1PPU_a20e74973ca868554e2bcc139b96bbbd8}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!oamdata@{oamdata}} +\index{oamdata@{oamdata}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{oamdata}{oamdata}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::oamdata\hspace{0.3cm}{\ttfamily [private]}} + + + +O\+A\+M\+D\+A\+TA Register (Data for O\+AM write) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_affb09d2bee7fafdc75eef3e8cd75f036}\label{classComSquare_1_1PPU_1_1PPU_affb09d2bee7fafdc75eef3e8cd75f036}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!objectSize@{objectSize}} +\index{objectSize@{objectSize}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{objectSize}{objectSize}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::object\+Size} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a6168eb8399a3a65e9d9ad24324698f60}\label{classComSquare_1_1PPU_1_1PPU_a6168eb8399a3a65e9d9ad24324698f60}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!objInterlace@{objInterlace}} +\index{objInterlace@{objInterlace}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{objInterlace}{objInterlace}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::obj\+Interlace} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a3d5dd60e5ec94cf9583c9c2e85939056}\label{classComSquare_1_1PPU_1_1PPU_a3d5dd60e5ec94cf9583c9c2e85939056}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!objPriorityActivationBit@{objPriorityActivationBit}} +\index{objPriorityActivationBit@{objPriorityActivationBit}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{objPriorityActivationBit}{objPriorityActivationBit}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::obj\+Priority\+Activation\+Bit} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aadf87ba48318535f51985a294630955b}\label{classComSquare_1_1PPU_1_1PPU_aadf87ba48318535f51985a294630955b}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!obsel@{obsel}} +\index{obsel@{obsel}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{obsel}{obsel}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::obsel\hspace{0.3cm}{\ttfamily [private]}} + + + +O\+B\+S\+EL Register (Object Size and Character Address) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a3732e3f10e2ba6d78b6f29750a7da2ea}\label{classComSquare_1_1PPU_1_1PPU_a3732e3f10e2ba6d78b6f29750a7da2ea}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!offsetBg@{offsetBg}} +\index{offsetBg@{offsetBg}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{offsetBg}{offsetBg}} +{\footnotesize\ttfamily uint32\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::offset\+Bg} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a2ccd92237a540d6bdcb4d2989c1154ec}\label{classComSquare_1_1PPU_1_1PPU_a2ccd92237a540d6bdcb4d2989c1154ec}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!overscanMode@{overscanMode}} +\index{overscanMode@{overscanMode}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{overscanMode}{overscanMode}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::overscan\+Mode} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aa328d9626498061e58c55fe9635049e2}\label{classComSquare_1_1PPU_1_1PPU_aa328d9626498061e58c55fe9635049e2}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!pixelSize@{pixelSize}} +\index{pixelSize@{pixelSize}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{pixelSize}{pixelSize}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::pixel\+Size} + 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+ +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}\label{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!raw@{raw}} +\index{raw@{raw}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{raw}{raw}\hspace{0.1cm}{\footnotesize\ttfamily [1/3]}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::raw} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aa077c9fc8b001817bc4de5f4a6ee6013}\label{classComSquare_1_1PPU_1_1PPU_aa077c9fc8b001817bc4de5f4a6ee6013}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!raw@{raw}} +\index{raw@{raw}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{raw}{raw}\hspace{0.1cm}{\footnotesize\ttfamily [2/3]}} +{\footnotesize\ttfamily uint32\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::raw} + 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+\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a544f9c495c06aa343dfdef5bd01d51ba}\label{classComSquare_1_1PPU_1_1PPU_a544f9c495c06aa343dfdef5bd01d51ba}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!red@{red}} +\index{red@{red}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{red}{red}\hspace{0.1cm}{\footnotesize\ttfamily [2/2]}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::red} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ad3fcfe5a70b23c1e7ff60e1f6430f8ed}\label{classComSquare_1_1PPU_1_1PPU_ad3fcfe5a70b23c1e7ff60e1f6430f8ed}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!screenInterlace@{screenInterlace}} +\index{screenInterlace@{screenInterlace}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{screenInterlace}{screenInterlace}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::screen\+Interlace} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a3d3d56f6bd419dc37bd702a4ca38a398}\label{classComSquare_1_1PPU_1_1PPU_a3d3d56f6bd419dc37bd702a4ca38a398}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!setini@{setini}} +\index{setini@{setini}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{setini}{setini}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::setini\hspace{0.3cm}{\ttfamily [private]}} + + + +S\+E\+T\+I\+NI Register (Screen Mode/\+Video Select) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a6db4b1553f6f2162988dc27bb0c46047}\label{classComSquare_1_1PPU_1_1PPU_a6db4b1553f6f2162988dc27bb0c46047}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!tilemapAddress@{tilemapAddress}} +\index{tilemapAddress@{tilemapAddress}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{tilemapAddress}{tilemapAddress}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::tilemap\+Address} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a62fc6e0855f7e75884839aa170e5c769}\label{classComSquare_1_1PPU_1_1PPU_a62fc6e0855f7e75884839aa170e5c769}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!tilemapHorizontalMirroring@{tilemapHorizontalMirroring}} +\index{tilemapHorizontalMirroring@{tilemapHorizontalMirroring}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{tilemapHorizontalMirroring}{tilemapHorizontalMirroring}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::tilemap\+Horizontal\+Mirroring} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ad85fad2c65c7169762734726b093b71a}\label{classComSquare_1_1PPU_1_1PPU_ad85fad2c65c7169762734726b093b71a}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!tilemapVerticalMirroring@{tilemapVerticalMirroring}} +\index{tilemapVerticalMirroring@{tilemapVerticalMirroring}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{tilemapVerticalMirroring}{tilemapVerticalMirroring}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::tilemap\+Vertical\+Mirroring} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a671e2987746847e07236d567d50bbcaf}\label{classComSquare_1_1PPU_1_1PPU_a671e2987746847e07236d567d50bbcaf}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!tm@{tm}} +\index{tm@{tm}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{tm}{tm}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::tm\hspace{0.3cm}{\ttfamily [private]}} + + + +TM Register (Main Screen Designation) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a6f6e5d62cfb23980484d825ee3649770}\label{classComSquare_1_1PPU_1_1PPU_a6f6e5d62cfb23980484d825ee3649770}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!tmw@{tmw}} +\index{tmw@{tmw}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{tmw}{tmw}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::tmw\hspace{0.3cm}{\ttfamily [private]}} + + + +T\+MW Register (Window Mask Designation for the Main Screen) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aae1ddaa8c3aa82ff67ba455f33402a2c}\label{classComSquare_1_1PPU_1_1PPU_aae1ddaa8c3aa82ff67ba455f33402a2c}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!ts@{ts}} +\index{ts@{ts}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{ts}{ts}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::ts\hspace{0.3cm}{\ttfamily [private]}} + + + +TS Register (Sub Screen Designation) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a3d43dbc62128fed929d1bb423724f642}\label{classComSquare_1_1PPU_1_1PPU_a3d43dbc62128fed929d1bb423724f642}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!tsw@{tsw}} +\index{tsw@{tsw}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{tsw}{tsw}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::tsw\hspace{0.3cm}{\ttfamily [private]}} + + + +T\+SW Register (Window Mask Designation for the Sub Screen) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aa85a69028133e60a065901426bac6830}\label{classComSquare_1_1PPU_1_1PPU_aa85a69028133e60a065901426bac6830}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!value@{value}} +\index{value@{value}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{value}{value}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::value} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a1630dc302a60891d669a55832af43358}\label{classComSquare_1_1PPU_1_1PPU_a1630dc302a60891d669a55832af43358}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!verticalMirroring@{verticalMirroring}} +\index{verticalMirroring@{verticalMirroring}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{verticalMirroring}{verticalMirroring}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vertical\+Mirroring} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ac9f3d4274faf79b60af40ea8e15a2251}\label{classComSquare_1_1PPU_1_1PPU_ac9f3d4274faf79b60af40ea8e15a2251}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmadd@{vmadd}} +\index{vmadd@{vmadd}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmadd}{vmadd}\hspace{0.1cm}{\footnotesize\ttfamily [1/2]}} +{\footnotesize\ttfamily uint32\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmadd} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a9c87dbe97c8c56cad37519e535fb8c49}\label{classComSquare_1_1PPU_1_1PPU_a9c87dbe97c8c56cad37519e535fb8c49}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmadd@{vmadd}} +\index{vmadd@{vmadd}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmadd}{vmadd}\hspace{0.1cm}{\footnotesize\ttfamily [2/2]}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmadd\hspace{0.3cm}{\ttfamily [private]}} + + + +V\+M\+A\+DD Register (V\+R\+AM Address) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aae0095b0bc2acb3e641e27c33324ac14}\label{classComSquare_1_1PPU_1_1PPU_aae0095b0bc2acb3e641e27c33324ac14}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmaddh@{vmaddh}} +\index{vmaddh@{vmaddh}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmaddh}{vmaddh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmaddh} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_abe9b64666b8205577325b764553e9c62}\label{classComSquare_1_1PPU_1_1PPU_abe9b64666b8205577325b764553e9c62}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmaddl@{vmaddl}} +\index{vmaddl@{vmaddl}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmaddl}{vmaddl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmaddl} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a1adabe810b31f6564f6f9c79eabf0d67}\label{classComSquare_1_1PPU_1_1PPU_a1adabe810b31f6564f6f9c79eabf0d67}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmain@{vmain}} +\index{vmain@{vmain}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmain}{vmain}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmain\hspace{0.3cm}{\ttfamily [private]}} + + + +V\+M\+A\+IN Register (Video Port Control) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_af3d7ceab8adce20636a5e52a5c4c770d}\label{classComSquare_1_1PPU_1_1PPU_af3d7ceab8adce20636a5e52a5c4c770d}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmdata@{vmdata}} +\index{vmdata@{vmdata}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmdata}{vmdata}\hspace{0.1cm}{\footnotesize\ttfamily [1/2]}} +{\footnotesize\ttfamily uint32\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmdata} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a8bd73719c6be1a7b5b961a6d3265b30b}\label{classComSquare_1_1PPU_1_1PPU_a8bd73719c6be1a7b5b961a6d3265b30b}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmdata@{vmdata}} +\index{vmdata@{vmdata}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmdata}{vmdata}\hspace{0.1cm}{\footnotesize\ttfamily [2/2]}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmdata\hspace{0.3cm}{\ttfamily [private]}} + + + +V\+M\+D\+A\+TA Register (V\+R\+AM Data Write) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a51cfaef5269b1d865e9b537488bde460}\label{classComSquare_1_1PPU_1_1PPU_a51cfaef5269b1d865e9b537488bde460}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmdatah@{vmdatah}} +\index{vmdatah@{vmdatah}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmdatah}{vmdatah}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmdatah} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a9510fc6b0b614235468dc4e9a495717c}\label{classComSquare_1_1PPU_1_1PPU_a9510fc6b0b614235468dc4e9a495717c}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!vmdatal@{vmdatal}} +\index{vmdatal@{vmdatal}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{vmdatal}{vmdatal}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::vmdatal} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_aa03fbd9e9b3db49d10318c6eb1863b5d}\label{classComSquare_1_1PPU_1_1PPU_aa03fbd9e9b3db49d10318c6eb1863b5d}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!wbglog@{wbglog}} +\index{wbglog@{wbglog}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{wbglog}{wbglog}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::wbglog\hspace{0.3cm}{\ttfamily [private]}} + + + +W\+B\+G\+L\+OG Register (Window mask logic for B\+Gs) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a030f8be9d159d8cc98bdf23bb7c5629b}\label{classComSquare_1_1PPU_1_1PPU_a030f8be9d159d8cc98bdf23bb7c5629b}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!wh0@{wh0}} +\index{wh0@{wh0}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{wh0}{wh0}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::wh0\hspace{0.3cm}{\ttfamily [private]}} + + + +W\+H0 Register (C\+Window 1 Left Position) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a023dc000412b5921dfdc36a7b3f2b593}\label{classComSquare_1_1PPU_1_1PPU_a023dc000412b5921dfdc36a7b3f2b593}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!wh1@{wh1}} +\index{wh1@{wh1}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{wh1}{wh1}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::wh1\hspace{0.3cm}{\ttfamily [private]}} + + + +W\+H1 Register (C\+Window 1 Right Position) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_ae5dadf61772bbd3b6b36db6a6c7d9bca}\label{classComSquare_1_1PPU_1_1PPU_ae5dadf61772bbd3b6b36db6a6c7d9bca}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!wh2@{wh2}} +\index{wh2@{wh2}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{wh2}{wh2}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::wh2\hspace{0.3cm}{\ttfamily [private]}} + + + +W\+H2 Register (C\+Window 2 Left Position) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a9cb95f907fd28664d2ef35c2ddb6bdf4}\label{classComSquare_1_1PPU_1_1PPU_a9cb95f907fd28664d2ef35c2ddb6bdf4}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!wh3@{wh3}} +\index{wh3@{wh3}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{wh3}{wh3}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::wh3\hspace{0.3cm}{\ttfamily [private]}} + + + +W\+H3 Register (C\+Window 2 Right Position) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a733fa4df9087069bce693d5d30c48cdb}\label{classComSquare_1_1PPU_1_1PPU_a733fa4df9087069bce693d5d30c48cdb}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!window1InversionForBg1Bg2Obj@{window1InversionForBg1Bg2Obj}} +\index{window1InversionForBg1Bg2Obj@{window1InversionForBg1Bg2Obj}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{window1InversionForBg1Bg2Obj}{window1InversionForBg1Bg2Obj}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::window1\+Inversion\+For\+Bg1\+Bg2\+Obj} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a129f2bf67320366e542cd6ef94391cb5}\label{classComSquare_1_1PPU_1_1PPU_a129f2bf67320366e542cd6ef94391cb5}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!window1InversionForBg2Bg4Color@{window1InversionForBg2Bg4Color}} +\index{window1InversionForBg2Bg4Color@{window1InversionForBg2Bg4Color}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{window1InversionForBg2Bg4Color}{window1InversionForBg2Bg4Color}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::window1\+Inversion\+For\+Bg2\+Bg4\+Color} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_acb25a221f7810763d688c841abeda905}\label{classComSquare_1_1PPU_1_1PPU_acb25a221f7810763d688c841abeda905}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!window2InversionForBg1Bg3Obj@{window2InversionForBg1Bg3Obj}} +\index{window2InversionForBg1Bg3Obj@{window2InversionForBg1Bg3Obj}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{window2InversionForBg1Bg3Obj}{window2InversionForBg1Bg3Obj}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::window2\+Inversion\+For\+Bg1\+Bg3\+Obj} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_abbe9ead425d92e0d1ef388814aa57cbe}\label{classComSquare_1_1PPU_1_1PPU_abbe9ead425d92e0d1ef388814aa57cbe}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!window2InversionForBg2Bg4Color@{window2InversionForBg2Bg4Color}} +\index{window2InversionForBg2Bg4Color@{window2InversionForBg2Bg4Color}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{window2InversionForBg2Bg4Color}{window2InversionForBg2Bg4Color}} +{\footnotesize\ttfamily bool Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::window2\+Inversion\+For\+Bg2\+Bg4\+Color} + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a416cfb3e30589d51ba671fd157e9d755}\label{classComSquare_1_1PPU_1_1PPU_a416cfb3e30589d51ba671fd157e9d755}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!wobjlog@{wobjlog}} +\index{wobjlog@{wobjlog}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{wobjlog}{wobjlog}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::wobjlog\hspace{0.3cm}{\ttfamily [private]}} + + + +W\+O\+B\+J\+L\+OG Register (Window mask logic for O\+B\+Js and Color Window) + +\mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a8bf7ac4696cf2dbf46c87fa79ef09cfd}\label{classComSquare_1_1PPU_1_1PPU_a8bf7ac4696cf2dbf46c87fa79ef09cfd}} +\index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!wsel@{wsel}} +\index{wsel@{wsel}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}} +\doxysubsubsection{\texorpdfstring{wsel}{wsel}} +{\footnotesize\ttfamily union \{ ... \} Com\+Square\+::\+P\+P\+U\+::\+P\+P\+U\+::wsel\hspace{0.3cm}{\ttfamily [private]}} + + + +W12\+S\+EL -\/ W34\+S\+EL Registers (Window Mask Settings for B\+Gs) and W\+O\+B\+J\+S\+EL Register (Window Mask Settings for O\+BJ and Color Window) + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+P\+P\+U/\mbox{\hyperlink{PPU_8hpp}{P\+P\+U.\+hpp}}\item +sources/\+P\+P\+U/\mbox{\hyperlink{PPU_8cpp}{P\+P\+U.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1PPU_1_1PPU__coll__graph.md5 b/docs/latex/classComSquare_1_1PPU_1_1PPU__coll__graph.md5 new file mode 100644 index 0000000..cfb0aa5 --- /dev/null +++ b/docs/latex/classComSquare_1_1PPU_1_1PPU__coll__graph.md5 @@ -0,0 +1 @@ +713570fe9a35e9b48af8800d3e631af7 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1PPU_1_1PPU__coll__graph.pdf b/docs/latex/classComSquare_1_1PPU_1_1PPU__coll__graph.pdf new file mode 100644 index 0000000..ef3f195 Binary files /dev/null and b/docs/latex/classComSquare_1_1PPU_1_1PPU__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1PPU_1_1PPU__inherit__graph.md5 b/docs/latex/classComSquare_1_1PPU_1_1PPU__inherit__graph.md5 new file mode 100644 index 0000000..cfb0aa5 --- /dev/null +++ b/docs/latex/classComSquare_1_1PPU_1_1PPU__inherit__graph.md5 @@ -0,0 +1 @@ +713570fe9a35e9b48af8800d3e631af7 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1PPU_1_1PPU__inherit__graph.pdf b/docs/latex/classComSquare_1_1PPU_1_1PPU__inherit__graph.pdf new file mode 100644 index 0000000..7851e86 Binary files /dev/null and b/docs/latex/classComSquare_1_1PPU_1_1PPU__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Ram_1_1Ram.tex b/docs/latex/classComSquare_1_1Ram_1_1Ram.tex new file mode 100644 index 0000000..e40f9da --- /dev/null +++ b/docs/latex/classComSquare_1_1Ram_1_1Ram.tex @@ -0,0 +1,152 @@ +\hypertarget{classComSquare_1_1Ram_1_1Ram}{}\doxysection{Com\+Square\+::Ram\+::Ram Class Reference} +\label{classComSquare_1_1Ram_1_1Ram}\index{ComSquare::Ram::Ram@{ComSquare::Ram::Ram}} + + +{\ttfamily \#include $<$Ram.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Ram\+::Ram\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=210pt]{classComSquare_1_1Ram_1_1Ram__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Ram\+::Ram\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=210pt]{classComSquare_1_1Ram_1_1Ram__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram_a7361a1d93a70c54c5d08404edbb323c2}{Ram}} (size\+\_\+t size) +\begin{DoxyCompactList}\small\item\em Load a rom from it\textquotesingle{}s path. \end{DoxyCompactList}\item +\mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram_a54fa93f64b12fc852458acf1c6895cf7}{$\sim$\+Ram}} () +\begin{DoxyCompactList}\small\item\em Destructor that free the ram. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram_a873f2becaa9b63d8864bb43eaae89fc6}{read}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr) override +\begin{DoxyCompactList}\small\item\em Read from the ram. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram_a0f42b342ebf151574c1e523719f9cf52}{write}} (\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}} addr, uint8\+\_\+t data) override +\begin{DoxyCompactList}\small\item\em Write data to the ram. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t $\ast$ \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram_a305d5bb1e067213b35173f0888ed13d4}{\+\_\+data}} +\begin{DoxyCompactList}\small\item\em The ram. (Can be used for W\+Ram, S\+Ram, V\+Ram etc) \end{DoxyCompactList}\item +size\+\_\+t \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram_ae184636dc9066b2032aff4a76578f1b1}{\+\_\+size}} +\begin{DoxyCompactList}\small\item\em The size of the ram. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{classComSquare_1_1Ram_1_1Ram_a7361a1d93a70c54c5d08404edbb323c2}\label{classComSquare_1_1Ram_1_1Ram_a7361a1d93a70c54c5d08404edbb323c2}} +\index{ComSquare::Ram::Ram@{ComSquare::Ram::Ram}!Ram@{Ram}} +\index{Ram@{Ram}!ComSquare::Ram::Ram@{ComSquare::Ram::Ram}} +\doxysubsubsection{\texorpdfstring{Ram()}{Ram()}} +{\footnotesize\ttfamily Com\+Square\+::\+Ram\+::\+Ram\+::\+Ram (\begin{DoxyParamCaption}\item[{size\+\_\+t}]{size }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [explicit]}} + + + +Load a rom from it\textquotesingle{}s path. + +\mbox{\Hypertarget{classComSquare_1_1Ram_1_1Ram_a54fa93f64b12fc852458acf1c6895cf7}\label{classComSquare_1_1Ram_1_1Ram_a54fa93f64b12fc852458acf1c6895cf7}} +\index{ComSquare::Ram::Ram@{ComSquare::Ram::Ram}!````~Ram@{$\sim$Ram}} +\index{````~Ram@{$\sim$Ram}!ComSquare::Ram::Ram@{ComSquare::Ram::Ram}} +\doxysubsubsection{\texorpdfstring{$\sim$Ram()}{~Ram()}} +{\footnotesize\ttfamily Com\+Square\+::\+Ram\+::\+Ram\+::$\sim$\+Ram (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})} + + + +Destructor that free the ram. + + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1Ram_1_1Ram_a873f2becaa9b63d8864bb43eaae89fc6}\label{classComSquare_1_1Ram_1_1Ram_a873f2becaa9b63d8864bb43eaae89fc6}} +\index{ComSquare::Ram::Ram@{ComSquare::Ram::Ram}!read@{read}} +\index{read@{read}!ComSquare::Ram::Ram@{ComSquare::Ram::Ram}} +\doxysubsubsection{\texorpdfstring{read()}{read()}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Ram\+::\+Ram\+::read (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Read from the ram. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to read from. The address 0x0 should refer to the first byte of this ram. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than the size of the ram. \\ +\hline +\end{DoxyExceptions} +\begin{DoxyReturn}{Returns} +Return the data at the address. +\end{DoxyReturn} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a8459ed12c4172ee29ecdc84330f99ff7}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + +\mbox{\Hypertarget{classComSquare_1_1Ram_1_1Ram_a0f42b342ebf151574c1e523719f9cf52}\label{classComSquare_1_1Ram_1_1Ram_a0f42b342ebf151574c1e523719f9cf52}} +\index{ComSquare::Ram::Ram@{ComSquare::Ram::Ram}!write@{write}} +\index{write@{write}!ComSquare::Ram::Ram@{ComSquare::Ram::Ram}} +\doxysubsubsection{\texorpdfstring{write()}{write()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Ram\+::\+Ram\+::write (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{Ints_8hpp_a89f009aaf5d1964a000f44f09fa0bcf8}{uint24\+\_\+t}}}]{addr, }\item[{uint8\+\_\+t}]{data }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Write data to the ram. + + +\begin{DoxyParams}{Parameters} +{\em addr} & The address to write to. The address 0x0 should refer to the first byte of this ram. \\ +\hline +{\em data} & The data to write. \\ +\hline +\end{DoxyParams} + +\begin{DoxyExceptions}{Exceptions} +{\em \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}}} & will be thrown if the address is more than the size of the ram. \\ +\hline +\end{DoxyExceptions} + + +Implements \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory_a449bc89798a0b86028bb0413106514d9}{Com\+Square\+::\+Memory\+::\+I\+Memory}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1Ram_1_1Ram_a305d5bb1e067213b35173f0888ed13d4}\label{classComSquare_1_1Ram_1_1Ram_a305d5bb1e067213b35173f0888ed13d4}} +\index{ComSquare::Ram::Ram@{ComSquare::Ram::Ram}!\_data@{\_data}} +\index{\_data@{\_data}!ComSquare::Ram::Ram@{ComSquare::Ram::Ram}} +\doxysubsubsection{\texorpdfstring{\_data}{\_data}} +{\footnotesize\ttfamily uint8\+\_\+t$\ast$ Com\+Square\+::\+Ram\+::\+Ram\+::\+\_\+data\hspace{0.3cm}{\ttfamily [private]}} + + + +The ram. (Can be used for W\+Ram, S\+Ram, V\+Ram etc) + +\mbox{\Hypertarget{classComSquare_1_1Ram_1_1Ram_ae184636dc9066b2032aff4a76578f1b1}\label{classComSquare_1_1Ram_1_1Ram_ae184636dc9066b2032aff4a76578f1b1}} +\index{ComSquare::Ram::Ram@{ComSquare::Ram::Ram}!\_size@{\_size}} +\index{\_size@{\_size}!ComSquare::Ram::Ram@{ComSquare::Ram::Ram}} +\doxysubsubsection{\texorpdfstring{\_size}{\_size}} +{\footnotesize\ttfamily size\+\_\+t Com\+Square\+::\+Ram\+::\+Ram\+::\+\_\+size\hspace{0.3cm}{\ttfamily [private]}} + + + +The size of the ram. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+Ram/\mbox{\hyperlink{Ram_8hpp}{Ram.\+hpp}}\item +sources/\+Ram/\mbox{\hyperlink{Ram_8cpp}{Ram.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1Ram_1_1Ram__coll__graph.md5 b/docs/latex/classComSquare_1_1Ram_1_1Ram__coll__graph.md5 new file mode 100644 index 0000000..1422f3c --- /dev/null +++ b/docs/latex/classComSquare_1_1Ram_1_1Ram__coll__graph.md5 @@ -0,0 +1 @@ +ca22b7d51cb5e83ac503b2c23bd0189b \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Ram_1_1Ram__coll__graph.pdf b/docs/latex/classComSquare_1_1Ram_1_1Ram__coll__graph.pdf new file mode 100644 index 0000000..8c722a1 Binary files /dev/null and b/docs/latex/classComSquare_1_1Ram_1_1Ram__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Ram_1_1Ram__inherit__graph.md5 b/docs/latex/classComSquare_1_1Ram_1_1Ram__inherit__graph.md5 new file mode 100644 index 0000000..1422f3c --- /dev/null +++ b/docs/latex/classComSquare_1_1Ram_1_1Ram__inherit__graph.md5 @@ -0,0 +1 @@ +ca22b7d51cb5e83ac503b2c23bd0189b \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Ram_1_1Ram__inherit__graph.pdf b/docs/latex/classComSquare_1_1Ram_1_1Ram__inherit__graph.pdf new file mode 100644 index 0000000..adc1817 Binary files /dev/null and b/docs/latex/classComSquare_1_1Ram_1_1Ram__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Renderer_1_1IRenderer.tex b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer.tex new file mode 100644 index 0000000..66bb44c --- /dev/null +++ b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer.tex @@ -0,0 +1,103 @@ +\hypertarget{classComSquare_1_1Renderer_1_1IRenderer}{}\doxysection{Com\+Square\+::Renderer\+::I\+Renderer Class Reference} +\label{classComSquare_1_1Renderer_1_1IRenderer}\index{ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}} + + +{\ttfamily \#include $<$I\+Renderer.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Renderer\+::I\+Renderer\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=203pt]{classComSquare_1_1Renderer_1_1IRenderer__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Renderer\+::I\+Renderer\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=203pt]{classComSquare_1_1Renderer_1_1IRenderer__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +virtual void \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer_ae0b7871e27c4d7596efd49a66bcf43ec}{set\+Window\+Name}} (std\+::string)=0 +\begin{DoxyCompactList}\small\item\em Set a new name to the window, if there is already a name it will be overwrite. \end{DoxyCompactList}\item +virtual void \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer_a371328d98efeded3a12adf92267b1287}{draw\+Screen}} ()=0 +\begin{DoxyCompactList}\small\item\em Render the buffer to the window. \end{DoxyCompactList}\item +virtual void \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer_a397dfb4eebf6ebf7425c6022d4c3c32a}{put\+Pixel}} (\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} x, \mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} y, uint8\+\_\+t rgba)=0 +\begin{DoxyCompactList}\small\item\em Set a pixel to the coordinates x, y with the color rgba. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +bool \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer_aff55e56ae1bac1e205c819b400d46cca}{should\+Exit}} +\begin{DoxyCompactList}\small\item\em Tells to the program if the window has been closed, and therefore if he should stop. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1IRenderer_a371328d98efeded3a12adf92267b1287}\label{classComSquare_1_1Renderer_1_1IRenderer_a371328d98efeded3a12adf92267b1287}} +\index{ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}!drawScreen@{drawScreen}} +\index{drawScreen@{drawScreen}!ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}} +\doxysubsubsection{\texorpdfstring{drawScreen()}{drawScreen()}} +{\footnotesize\ttfamily virtual void Com\+Square\+::\+Renderer\+::\+I\+Renderer\+::draw\+Screen (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [pure virtual]}} + + + +Render the buffer to the window. + + + +Implemented in \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer_a9487851a2313bb0e4e8ebccbc6f839e6}{Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer}}. + +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1IRenderer_a397dfb4eebf6ebf7425c6022d4c3c32a}\label{classComSquare_1_1Renderer_1_1IRenderer_a397dfb4eebf6ebf7425c6022d4c3c32a}} +\index{ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}!putPixel@{putPixel}} +\index{putPixel@{putPixel}!ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}} +\doxysubsubsection{\texorpdfstring{putPixel()}{putPixel()}} +{\footnotesize\ttfamily virtual void Com\+Square\+::\+Renderer\+::\+I\+Renderer\+::put\+Pixel (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{x, }\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{y, }\item[{uint8\+\_\+t}]{rgba }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [pure virtual]}} + + + +Set a pixel to the coordinates x, y with the color rgba. + + + +Implemented in \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer_a103480c82b522e4497bb078eb8eade47}{Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer}}. + +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1IRenderer_ae0b7871e27c4d7596efd49a66bcf43ec}\label{classComSquare_1_1Renderer_1_1IRenderer_ae0b7871e27c4d7596efd49a66bcf43ec}} +\index{ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}!setWindowName@{setWindowName}} +\index{setWindowName@{setWindowName}!ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}} +\doxysubsubsection{\texorpdfstring{setWindowName()}{setWindowName()}} +{\footnotesize\ttfamily virtual void Com\+Square\+::\+Renderer\+::\+I\+Renderer\+::set\+Window\+Name (\begin{DoxyParamCaption}\item[{std\+::string}]{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [pure virtual]}} + + + +Set a new name to the window, if there is already a name it will be overwrite. + + + +Implemented in \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer_a72a26c80dbd8008825a809a3cc22918b}{Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1IRenderer_aff55e56ae1bac1e205c819b400d46cca}\label{classComSquare_1_1Renderer_1_1IRenderer_aff55e56ae1bac1e205c819b400d46cca}} +\index{ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}!shouldExit@{shouldExit}} +\index{shouldExit@{shouldExit}!ComSquare::Renderer::IRenderer@{ComSquare::Renderer::IRenderer}} +\doxysubsubsection{\texorpdfstring{shouldExit}{shouldExit}} +{\footnotesize\ttfamily bool Com\+Square\+::\+Renderer\+::\+I\+Renderer\+::should\+Exit} + + + +Tells to the program if the window has been closed, and therefore if he should stop. + + + +The documentation for this class was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+Renderer/\mbox{\hyperlink{IRenderer_8hpp}{I\+Renderer.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.md5 b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.md5 new file mode 100644 index 0000000..98eaa90 --- /dev/null +++ b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.md5 @@ -0,0 +1 @@ +2d93bbc8da7823f02076cda65766454f \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.pdf b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.pdf new file mode 100644 index 0000000..406d230 Binary files /dev/null and b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.md5 b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.md5 new file mode 100644 index 0000000..799a0ef --- /dev/null +++ b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.md5 @@ -0,0 +1 @@ +e2ffdab30259dda681da09e85e6a1804 \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.pdf b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.pdf new file mode 100644 index 0000000..37b3d07 Binary files /dev/null and b/docs/latex/classComSquare_1_1Renderer_1_1IRenderer__inherit__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer.tex b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer.tex new file mode 100644 index 0000000..f0e57cb --- /dev/null +++ b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer.tex @@ -0,0 +1,131 @@ +\hypertarget{classComSquare_1_1Renderer_1_1SFRenderer}{}\doxysection{Com\+Square\+::Renderer\+::S\+F\+Renderer Class Reference} +\label{classComSquare_1_1Renderer_1_1SFRenderer}\index{ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}} + + +{\ttfamily \#include $<$S\+F\+Renderer.\+hpp$>$} + + + +Inheritance diagram for Com\+Square\+::Renderer\+::S\+F\+Renderer\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=203pt]{classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph} +\end{center} +\end{figure} + + +Collaboration diagram for Com\+Square\+::Renderer\+::S\+F\+Renderer\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=203pt]{classComSquare_1_1Renderer_1_1SFRenderer__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +void \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer_a72a26c80dbd8008825a809a3cc22918b}{set\+Window\+Name}} (std\+::string) override +\begin{DoxyCompactList}\small\item\em Set a new name to the window, if there is already a name it will be overwrite. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer_a9487851a2313bb0e4e8ebccbc6f839e6}{draw\+Screen}} () override +\begin{DoxyCompactList}\small\item\em Update the screen by printing the buffer. \end{DoxyCompactList}\item +void \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer_a103480c82b522e4497bb078eb8eade47}{put\+Pixel}} (\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} x, \mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} y, uint8\+\_\+t rgba) override +\begin{DoxyCompactList}\small\item\em Add a pixel to the buffer to the coordinates x, y with the color rgba. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Private Attributes} +\begin{DoxyCompactItemize} +\item +sf\+::\+Window \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer_a8f0a8fb3bba373624d4a264ae7cb4b24}{window}} +\begin{DoxyCompactList}\small\item\em The main Window. \end{DoxyCompactList}\item +sf\+::\+Video\+Mode \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer_a3a272535b5348bed457f0d06d7ec25d6}{video\+Mode}} +\begin{DoxyCompactList}\small\item\em Video Mode containing the height and width of the window. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Additional Inherited Members} + + +\doxysubsection{Member Function Documentation} +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1SFRenderer_a9487851a2313bb0e4e8ebccbc6f839e6}\label{classComSquare_1_1Renderer_1_1SFRenderer_a9487851a2313bb0e4e8ebccbc6f839e6}} +\index{ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}!drawScreen@{drawScreen}} +\index{drawScreen@{drawScreen}!ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}} +\doxysubsubsection{\texorpdfstring{drawScreen()}{drawScreen()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer\+::draw\+Screen (\begin{DoxyParamCaption}{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Update the screen by printing the buffer. + + + +Implements \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer_a371328d98efeded3a12adf92267b1287}{Com\+Square\+::\+Renderer\+::\+I\+Renderer}}. + +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1SFRenderer_a103480c82b522e4497bb078eb8eade47}\label{classComSquare_1_1Renderer_1_1SFRenderer_a103480c82b522e4497bb078eb8eade47}} +\index{ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}!putPixel@{putPixel}} +\index{putPixel@{putPixel}!ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}} +\doxysubsubsection{\texorpdfstring{putPixel()}{putPixel()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer\+::put\+Pixel (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{x, }\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{y, }\item[{uint8\+\_\+t}]{rgba }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Add a pixel to the buffer to the coordinates x, y with the color rgba. + + +\begin{DoxyParams}{Parameters} +{\em X} & horizontal index. \\ +\hline +{\em Y} & vertical index. \\ +\hline +{\em rgba} & \+: The color of the pixel. \\ +\hline +\end{DoxyParams} + + +Implements \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer_a397dfb4eebf6ebf7425c6022d4c3c32a}{Com\+Square\+::\+Renderer\+::\+I\+Renderer}}. + +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1SFRenderer_a72a26c80dbd8008825a809a3cc22918b}\label{classComSquare_1_1Renderer_1_1SFRenderer_a72a26c80dbd8008825a809a3cc22918b}} +\index{ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}!setWindowName@{setWindowName}} +\index{setWindowName@{setWindowName}!ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}} +\doxysubsubsection{\texorpdfstring{setWindowName()}{setWindowName()}} +{\footnotesize\ttfamily void Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer\+::set\+Window\+Name (\begin{DoxyParamCaption}\item[{std\+::string}]{ }\end{DoxyParamCaption})\hspace{0.3cm}{\ttfamily [override]}, {\ttfamily [virtual]}} + + + +Set a new name to the window, if there is already a name it will be overwrite. + + +\begin{DoxyParams}{Parameters} +{\em A} & new title for the window. \\ +\hline +\end{DoxyParams} + + +Implements \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer_ae0b7871e27c4d7596efd49a66bcf43ec}{Com\+Square\+::\+Renderer\+::\+I\+Renderer}}. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1SFRenderer_a3a272535b5348bed457f0d06d7ec25d6}\label{classComSquare_1_1Renderer_1_1SFRenderer_a3a272535b5348bed457f0d06d7ec25d6}} +\index{ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}!videoMode@{videoMode}} +\index{videoMode@{videoMode}!ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}} +\doxysubsubsection{\texorpdfstring{videoMode}{videoMode}} +{\footnotesize\ttfamily sf\+::\+Video\+Mode Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer\+::video\+Mode\hspace{0.3cm}{\ttfamily [private]}} + + + +Video Mode containing the height and width of the window. + +\mbox{\Hypertarget{classComSquare_1_1Renderer_1_1SFRenderer_a8f0a8fb3bba373624d4a264ae7cb4b24}\label{classComSquare_1_1Renderer_1_1SFRenderer_a8f0a8fb3bba373624d4a264ae7cb4b24}} +\index{ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}!window@{window}} +\index{window@{window}!ComSquare::Renderer::SFRenderer@{ComSquare::Renderer::SFRenderer}} +\doxysubsubsection{\texorpdfstring{window}{window}} +{\footnotesize\ttfamily sf\+::\+Window Com\+Square\+::\+Renderer\+::\+S\+F\+Renderer\+::window\hspace{0.3cm}{\ttfamily [private]}} + + + +The main Window. + + + +The documentation for this class was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\+Renderer/\mbox{\hyperlink{SFRenderer_8hpp}{S\+F\+Renderer.\+hpp}}\item +sources/\+Renderer/\mbox{\hyperlink{SFRenderer_8cpp}{S\+F\+Renderer.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.md5 b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.md5 new file mode 100644 index 0000000..85f9253 --- /dev/null +++ b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.md5 @@ -0,0 +1 @@ +65c55adcc19680d4b3ef59c0c200edcc \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.pdf b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.pdf new file mode 100644 index 0000000..184740c Binary files /dev/null and b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__coll__graph.pdf differ diff --git a/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.md5 b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.md5 new file mode 100644 index 0000000..85f9253 --- /dev/null +++ b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.md5 @@ -0,0 +1 @@ +65c55adcc19680d4b3ef59c0c200edcc \ No newline at end of file diff --git a/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.pdf b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.pdf new file mode 100644 index 0000000..184740c Binary files /dev/null and b/docs/latex/classComSquare_1_1Renderer_1_1SFRenderer__inherit__graph.pdf differ diff --git a/docs/latex/clion-environment_8txt.tex b/docs/latex/clion-environment_8txt.tex new file mode 100644 index 0000000..9e54852 --- /dev/null +++ b/docs/latex/clion-environment_8txt.tex @@ -0,0 +1,2 @@ +\hypertarget{clion-environment_8txt}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/clion-\/environment.txt File Reference} +\label{clion-environment_8txt}\index{cmake-\/build-\/debug/CMakeFiles/clion-\/environment.txt@{cmake-\/build-\/debug/CMakeFiles/clion-\/environment.txt}} diff --git a/docs/latex/clion-log_8txt.tex b/docs/latex/clion-log_8txt.tex new file mode 100644 index 0000000..6014bf9 --- /dev/null +++ b/docs/latex/clion-log_8txt.tex @@ -0,0 +1,2 @@ +\hypertarget{clion-log_8txt}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/clion-\/log.txt File Reference} +\label{clion-log_8txt}\index{cmake-\/build-\/debug/CMakeFiles/clion-\/log.txt@{cmake-\/build-\/debug/CMakeFiles/clion-\/log.txt}} diff --git a/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1.tex b/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1.tex new file mode 100644 index 0000000..94506b4 --- /dev/null +++ b/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1.tex @@ -0,0 +1,17 @@ +\hypertarget{dir_034dfdc496c3d677a4f0ad2a0426d1b1}{}\doxysection{sources/\+D\+SP Directory Reference} +\label{dir_034dfdc496c3d677a4f0ad2a0426d1b1}\index{sources/DSP Directory Reference@{sources/DSP Directory Reference}} +Directory dependency graph for D\+SP\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=181pt]{dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep} +\end{center} +\end{figure} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{DSP_8cpp}{D\+S\+P.\+cpp}} +\item +file \mbox{\hyperlink{DSP_8hpp}{D\+S\+P.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.md5 b/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.md5 new file mode 100644 index 0000000..ef0857f --- /dev/null +++ b/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.md5 @@ -0,0 +1 @@ +46b0329c343d4e2f996d3c9665a961e2 \ No newline at end of file diff --git a/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.pdf b/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.pdf new file mode 100644 index 0000000..223b9cb Binary files /dev/null and b/docs/latex/dir_034dfdc496c3d677a4f0ad2a0426d1b1_dep.pdf differ diff --git a/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc.tex b/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc.tex new file mode 100644 index 0000000..374d3e7 --- /dev/null +++ b/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc.tex @@ -0,0 +1,40 @@ +\hypertarget{dir_08d237fc27d4ecd563f71c5d52f2fecc}{}\doxysection{sources Directory Reference} +\label{dir_08d237fc27d4ecd563f71c5d52f2fecc}\index{sources Directory Reference@{sources Directory Reference}} +Directory dependency graph for sources\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{dir_08d237fc27d4ecd563f71c5d52f2fecc_dep} +\end{center} +\end{figure} +\doxysubsection*{Directories} +\begin{DoxyCompactItemize} +\item +directory \mbox{\hyperlink{dir_c023b0da1327801e33139c8f2715cbe5}{A\+PU}} +\item +directory \mbox{\hyperlink{dir_acbfe30a39643d3dad4cea6c4be60bc9}{Cartridge}} +\item +directory \mbox{\hyperlink{dir_a65246f7a5288ee65248a0302198d58d}{C\+PU}} +\item +directory \mbox{\hyperlink{dir_034dfdc496c3d677a4f0ad2a0426d1b1}{D\+SP}} +\item +directory \mbox{\hyperlink{dir_5da686cefd6752aaaa3bcabf1d868d88}{Exceptions}} +\item +directory \mbox{\hyperlink{dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6}{Memory}} +\item +directory \mbox{\hyperlink{dir_5cb6e1a8c8be2c39561c895666c60a3e}{Models}} +\item +directory \mbox{\hyperlink{dir_596bfb3d48f2f085998f77aaf2d42ecf}{P\+PU}} +\item +directory \mbox{\hyperlink{dir_96c90ef27c711de2cda20e988f4ab9d6}{Ram}} +\item +directory \mbox{\hyperlink{dir_9d8b0bd023ebe51fb4b8ffcd38d3f5ed}{Renderer}} +\end{DoxyCompactItemize} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{SNES_8cpp}{S\+N\+E\+S.\+cpp}} +\item +file \mbox{\hyperlink{SNES_8hpp}{S\+N\+E\+S.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc_dep.md5 b/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc_dep.md5 new file mode 100644 index 0000000..706565c --- /dev/null +++ b/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc_dep.md5 @@ -0,0 +1 @@ +9d0a3482101d7fe94be914c2f6c92580 \ No newline at end of file diff --git a/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc_dep.pdf b/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc_dep.pdf new file mode 100644 index 0000000..e8d7fd5 Binary files /dev/null and b/docs/latex/dir_08d237fc27d4ecd563f71c5d52f2fecc_dep.pdf differ diff --git a/docs/latex/dir_44ea9ed243d3740341f2efeb45271ac4.tex b/docs/latex/dir_44ea9ed243d3740341f2efeb45271ac4.tex new file mode 100644 index 0000000..f28e773 --- /dev/null +++ b/docs/latex/dir_44ea9ed243d3740341f2efeb45271ac4.tex @@ -0,0 +1,7 @@ +\hypertarget{dir_44ea9ed243d3740341f2efeb45271ac4}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/3.15.3/\+Compiler\+IdC Directory Reference} +\label{dir_44ea9ed243d3740341f2efeb45271ac4}\index{cmake-\/build-\/debug/CMakeFiles/3.15.3/CompilerIdC Directory Reference@{cmake-\/build-\/debug/CMakeFiles/3.15.3/CompilerIdC Directory Reference}} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{CMakeCCompilerId_8c}{C\+Make\+C\+Compiler\+Id.\+c}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_4c29f6c5e99ca759d1475628ee9d55fb.tex b/docs/latex/dir_4c29f6c5e99ca759d1475628ee9d55fb.tex new file mode 100644 index 0000000..10fd1c3 --- /dev/null +++ b/docs/latex/dir_4c29f6c5e99ca759d1475628ee9d55fb.tex @@ -0,0 +1,7 @@ +\hypertarget{dir_4c29f6c5e99ca759d1475628ee9d55fb}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/3.15.3/\+Compiler\+Id\+C\+XX Directory Reference} +\label{dir_4c29f6c5e99ca759d1475628ee9d55fb}\index{cmake-\/build-\/debug/CMakeFiles/3.15.3/CompilerIdCXX Directory Reference@{cmake-\/build-\/debug/CMakeFiles/3.15.3/CompilerIdCXX Directory Reference}} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{CMakeCXXCompilerId_8cpp}{C\+Make\+C\+X\+X\+Compiler\+Id.\+cpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_59425e443f801f1f2fd8bbe4959a3ccf.tex b/docs/latex/dir_59425e443f801f1f2fd8bbe4959a3ccf.tex new file mode 100644 index 0000000..890189a --- /dev/null +++ b/docs/latex/dir_59425e443f801f1f2fd8bbe4959a3ccf.tex @@ -0,0 +1,7 @@ +\hypertarget{dir_59425e443f801f1f2fd8bbe4959a3ccf}{}\doxysection{tests Directory Reference} +\label{dir_59425e443f801f1f2fd8bbe4959a3ccf}\index{tests Directory Reference@{tests Directory Reference}} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{testCPU_8cpp}{test\+C\+P\+U.\+cpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf.tex b/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf.tex new file mode 100644 index 0000000..0dcaba4 --- /dev/null +++ b/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf.tex @@ -0,0 +1,17 @@ +\hypertarget{dir_596bfb3d48f2f085998f77aaf2d42ecf}{}\doxysection{sources/\+P\+PU Directory Reference} +\label{dir_596bfb3d48f2f085998f77aaf2d42ecf}\index{sources/PPU Directory Reference@{sources/PPU Directory Reference}} +Directory dependency graph for P\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=181pt]{dir_596bfb3d48f2f085998f77aaf2d42ecf_dep} +\end{center} +\end{figure} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{PPU_8cpp}{P\+P\+U.\+cpp}} +\item +file \mbox{\hyperlink{PPU_8hpp}{P\+P\+U.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf_dep.md5 b/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf_dep.md5 new file mode 100644 index 0000000..0b3e83f --- /dev/null +++ b/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf_dep.md5 @@ -0,0 +1 @@ +84287696e17e528803148b0ad6b1b284 \ No newline at end of file diff --git a/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf_dep.pdf b/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf_dep.pdf new file mode 100644 index 0000000..05ba406 Binary files /dev/null and b/docs/latex/dir_596bfb3d48f2f085998f77aaf2d42ecf_dep.pdf differ diff --git a/docs/latex/dir_5cb6e1a8c8be2c39561c895666c60a3e.tex b/docs/latex/dir_5cb6e1a8c8be2c39561c895666c60a3e.tex new file mode 100644 index 0000000..6661027 --- /dev/null +++ b/docs/latex/dir_5cb6e1a8c8be2c39561c895666c60a3e.tex @@ -0,0 +1,7 @@ +\hypertarget{dir_5cb6e1a8c8be2c39561c895666c60a3e}{}\doxysection{sources/\+Models Directory Reference} +\label{dir_5cb6e1a8c8be2c39561c895666c60a3e}\index{sources/Models Directory Reference@{sources/Models Directory Reference}} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{Ints_8hpp}{Ints.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_5da686cefd6752aaaa3bcabf1d868d88.tex b/docs/latex/dir_5da686cefd6752aaaa3bcabf1d868d88.tex new file mode 100644 index 0000000..776d941 --- /dev/null +++ b/docs/latex/dir_5da686cefd6752aaaa3bcabf1d868d88.tex @@ -0,0 +1,13 @@ +\hypertarget{dir_5da686cefd6752aaaa3bcabf1d868d88}{}\doxysection{sources/\+Exceptions Directory Reference} +\label{dir_5da686cefd6752aaaa3bcabf1d868d88}\index{sources/Exceptions Directory Reference@{sources/Exceptions Directory Reference}} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{InvalidAction_8hpp}{Invalid\+Action.\+hpp}} +\item +file \mbox{\hyperlink{InvalidAddress_8hpp}{Invalid\+Address.\+hpp}} +\item +file \mbox{\hyperlink{InvalidRom_8hpp}{Invalid\+Rom.\+hpp}} +\item +file \mbox{\hyperlink{NotImplementedException_8hpp}{Not\+Implemented\+Exception.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_95e29a8b8ee7c54052c171a88bb95675.tex b/docs/latex/dir_95e29a8b8ee7c54052c171a88bb95675.tex new file mode 100644 index 0000000..a130a4a --- /dev/null +++ b/docs/latex/dir_95e29a8b8ee7c54052c171a88bb95675.tex @@ -0,0 +1,7 @@ +\hypertarget{dir_95e29a8b8ee7c54052c171a88bb95675}{}\doxysection{cmake-\/build-\/debug Directory Reference} +\label{dir_95e29a8b8ee7c54052c171a88bb95675}\index{cmake-\/build-\/debug Directory Reference@{cmake-\/build-\/debug Directory Reference}} +\doxysubsection*{Directories} +\begin{DoxyCompactItemize} +\item +directory \mbox{\hyperlink{dir_f89abcb304c928c7d889aa5625570de5}{C\+Make\+Files}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6.tex b/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6.tex new file mode 100644 index 0000000..5ad0185 --- /dev/null +++ b/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6.tex @@ -0,0 +1,17 @@ +\hypertarget{dir_96c90ef27c711de2cda20e988f4ab9d6}{}\doxysection{sources/\+Ram Directory Reference} +\label{dir_96c90ef27c711de2cda20e988f4ab9d6}\index{sources/Ram Directory Reference@{sources/Ram Directory Reference}} +Directory dependency graph for Ram\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=181pt]{dir_96c90ef27c711de2cda20e988f4ab9d6_dep} +\end{center} +\end{figure} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{Ram_8cpp}{Ram.\+cpp}} +\item +file \mbox{\hyperlink{Ram_8hpp}{Ram.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6_dep.md5 b/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6_dep.md5 new file mode 100644 index 0000000..f118c18 --- /dev/null +++ b/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6_dep.md5 @@ -0,0 +1 @@ +f7fda72dc8e9a6f8499770e0c02ccb0b \ No newline at end of file diff --git a/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6_dep.pdf b/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6_dep.pdf new file mode 100644 index 0000000..59bc392 Binary files /dev/null and b/docs/latex/dir_96c90ef27c711de2cda20e988f4ab9d6_dep.pdf differ diff --git a/docs/latex/dir_9d8b0bd023ebe51fb4b8ffcd38d3f5ed.tex b/docs/latex/dir_9d8b0bd023ebe51fb4b8ffcd38d3f5ed.tex new file mode 100644 index 0000000..9e54c86 --- /dev/null +++ b/docs/latex/dir_9d8b0bd023ebe51fb4b8ffcd38d3f5ed.tex @@ -0,0 +1,11 @@ +\hypertarget{dir_9d8b0bd023ebe51fb4b8ffcd38d3f5ed}{}\doxysection{sources/\+Renderer Directory Reference} +\label{dir_9d8b0bd023ebe51fb4b8ffcd38d3f5ed}\index{sources/Renderer Directory Reference@{sources/Renderer Directory Reference}} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{IRenderer_8hpp}{I\+Renderer.\+hpp}} +\item +file \mbox{\hyperlink{SFRenderer_8cpp}{S\+F\+Renderer.\+cpp}} +\item +file \mbox{\hyperlink{SFRenderer_8hpp}{S\+F\+Renderer.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_a263888238a9c257b68d42fb7f4e6ed1.tex b/docs/latex/dir_a263888238a9c257b68d42fb7f4e6ed1.tex new file mode 100644 index 0000000..f65b496 --- /dev/null +++ b/docs/latex/dir_a263888238a9c257b68d42fb7f4e6ed1.tex @@ -0,0 +1,2 @@ +\hypertarget{dir_a263888238a9c257b68d42fb7f4e6ed1}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/\+Com\+Square.dir Directory Reference} +\label{dir_a263888238a9c257b68d42fb7f4e6ed1}\index{cmake-\/build-\/debug/CMakeFiles/ComSquare.dir Directory Reference@{cmake-\/build-\/debug/CMakeFiles/ComSquare.dir Directory Reference}} diff --git a/docs/latex/dir_a65246f7a5288ee65248a0302198d58d.tex b/docs/latex/dir_a65246f7a5288ee65248a0302198d58d.tex new file mode 100644 index 0000000..e6e1533 --- /dev/null +++ b/docs/latex/dir_a65246f7a5288ee65248a0302198d58d.tex @@ -0,0 +1,17 @@ +\hypertarget{dir_a65246f7a5288ee65248a0302198d58d}{}\doxysection{sources/\+C\+PU Directory Reference} +\label{dir_a65246f7a5288ee65248a0302198d58d}\index{sources/CPU Directory Reference@{sources/CPU Directory Reference}} +Directory dependency graph for C\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=230pt]{dir_a65246f7a5288ee65248a0302198d58d_dep} +\end{center} +\end{figure} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{CPU_8cpp}{C\+P\+U.\+cpp}} +\item +file \mbox{\hyperlink{CPU_8hpp}{C\+P\+U.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_a65246f7a5288ee65248a0302198d58d_dep.md5 b/docs/latex/dir_a65246f7a5288ee65248a0302198d58d_dep.md5 new file mode 100644 index 0000000..3280d79 --- /dev/null +++ b/docs/latex/dir_a65246f7a5288ee65248a0302198d58d_dep.md5 @@ -0,0 +1 @@ +02834e6eb805ace5f63d778507dd6310 \ No newline at end of file diff --git a/docs/latex/dir_a65246f7a5288ee65248a0302198d58d_dep.pdf b/docs/latex/dir_a65246f7a5288ee65248a0302198d58d_dep.pdf new file mode 100644 index 0000000..48d1676 Binary files /dev/null and b/docs/latex/dir_a65246f7a5288ee65248a0302198d58d_dep.pdf differ diff --git a/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9.tex b/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9.tex new file mode 100644 index 0000000..d4b22b2 --- /dev/null +++ b/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9.tex @@ -0,0 +1,19 @@ +\hypertarget{dir_acbfe30a39643d3dad4cea6c4be60bc9}{}\doxysection{sources/\+Cartridge Directory Reference} +\label{dir_acbfe30a39643d3dad4cea6c4be60bc9}\index{sources/Cartridge Directory Reference@{sources/Cartridge Directory Reference}} +Directory dependency graph for Cartridge\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=230pt]{dir_acbfe30a39643d3dad4cea6c4be60bc9_dep} +\end{center} +\end{figure} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{Cartridge_8cpp}{Cartridge.\+cpp}} +\item +file \mbox{\hyperlink{Cartridge_8hpp}{Cartridge.\+hpp}} +\item +file \mbox{\hyperlink{InterruptVectors_8hpp}{Interrupt\+Vectors.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9_dep.md5 b/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9_dep.md5 new file mode 100644 index 0000000..dd3cad1 --- /dev/null +++ b/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9_dep.md5 @@ -0,0 +1 @@ +0cae1921e050fa8d54c17bd02dbefd15 \ No newline at end of file diff --git a/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9_dep.pdf b/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9_dep.pdf new file mode 100644 index 0000000..e22f09c Binary files /dev/null and b/docs/latex/dir_acbfe30a39643d3dad4cea6c4be60bc9_dep.pdf differ diff --git a/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6.tex b/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6.tex new file mode 100644 index 0000000..ad6aecf --- /dev/null +++ b/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6.tex @@ -0,0 +1,29 @@ +\hypertarget{dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6}{}\doxysection{sources/\+Memory Directory Reference} +\label{dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6}\index{sources/Memory Directory Reference@{sources/Memory Directory Reference}} +Directory dependency graph for Memory\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=222pt]{dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6_dep} +\end{center} +\end{figure} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{IMemory_8cpp}{I\+Memory.\+cpp}} +\item +file \mbox{\hyperlink{IMemory_8hpp}{I\+Memory.\+hpp}} +\item +file \mbox{\hyperlink{IRectangleMemory_8cpp}{I\+Rectangle\+Memory.\+cpp}} +\item +file \mbox{\hyperlink{IRectangleMemory_8hpp}{I\+Rectangle\+Memory.\+hpp}} +\item +file \mbox{\hyperlink{MemoryBus_8cpp}{Memory\+Bus.\+cpp}} +\item +file \mbox{\hyperlink{MemoryBus_8hpp}{Memory\+Bus.\+hpp}} +\item +file \mbox{\hyperlink{MemoryShadow_8cpp}{Memory\+Shadow.\+cpp}} +\item +file \mbox{\hyperlink{MemoryShadow_8hpp}{Memory\+Shadow.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6_dep.md5 b/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6_dep.md5 new file mode 100644 index 0000000..198dd1b --- /dev/null +++ b/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6_dep.md5 @@ -0,0 +1 @@ +103256dd4aa3e67ec572fb60913e0156 \ No newline at end of file diff --git a/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6_dep.pdf b/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6_dep.pdf new file mode 100644 index 0000000..f925e96 Binary files /dev/null and b/docs/latex/dir_b6b0f0b7471b46e8c4cfc0f00c8af2f6_dep.pdf differ diff --git a/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5.tex b/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5.tex new file mode 100644 index 0000000..090bc85 --- /dev/null +++ b/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5.tex @@ -0,0 +1,17 @@ +\hypertarget{dir_c023b0da1327801e33139c8f2715cbe5}{}\doxysection{sources/\+A\+PU Directory Reference} +\label{dir_c023b0da1327801e33139c8f2715cbe5}\index{sources/APU Directory Reference@{sources/APU Directory Reference}} +Directory dependency graph for A\+PU\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=201pt]{dir_c023b0da1327801e33139c8f2715cbe5_dep} +\end{center} +\end{figure} +\doxysubsection*{Files} +\begin{DoxyCompactItemize} +\item +file \mbox{\hyperlink{APU_8cpp}{A\+P\+U.\+cpp}} +\item +file \mbox{\hyperlink{APU_8hpp}{A\+P\+U.\+hpp}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5_dep.md5 b/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5_dep.md5 new file mode 100644 index 0000000..58e3728 --- /dev/null +++ b/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5_dep.md5 @@ -0,0 +1 @@ +dc9083f0ffb4da6eb7cc15ae0c4e4351 \ No newline at end of file diff --git a/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5_dep.pdf b/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5_dep.pdf new file mode 100644 index 0000000..07d6924 Binary files /dev/null and b/docs/latex/dir_c023b0da1327801e33139c8f2715cbe5_dep.pdf differ diff --git a/docs/latex/dir_c97dd66fe183941100f309891005a720.tex b/docs/latex/dir_c97dd66fe183941100f309891005a720.tex new file mode 100644 index 0000000..c3b7728 --- /dev/null +++ b/docs/latex/dir_c97dd66fe183941100f309891005a720.tex @@ -0,0 +1,2 @@ +\hypertarget{dir_c97dd66fe183941100f309891005a720}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/unit\+\_\+tests.dir Directory Reference} +\label{dir_c97dd66fe183941100f309891005a720}\index{cmake-\/build-\/debug/CMakeFiles/unit\_tests.dir Directory Reference@{cmake-\/build-\/debug/CMakeFiles/unit\_tests.dir Directory Reference}} diff --git a/docs/latex/dir_f89abcb304c928c7d889aa5625570de5.tex b/docs/latex/dir_f89abcb304c928c7d889aa5625570de5.tex new file mode 100644 index 0000000..b45be30 --- /dev/null +++ b/docs/latex/dir_f89abcb304c928c7d889aa5625570de5.tex @@ -0,0 +1,11 @@ +\hypertarget{dir_f89abcb304c928c7d889aa5625570de5}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files Directory Reference} +\label{dir_f89abcb304c928c7d889aa5625570de5}\index{cmake-\/build-\/debug/CMakeFiles Directory Reference@{cmake-\/build-\/debug/CMakeFiles Directory Reference}} +\doxysubsection*{Directories} +\begin{DoxyCompactItemize} +\item +directory \mbox{\hyperlink{dir_f942a7a73394fda25d4213a70555b3f8}{3.\+15.\+3}} +\item +directory \mbox{\hyperlink{dir_a263888238a9c257b68d42fb7f4e6ed1}{Com\+Square.\+dir}} +\item +directory \mbox{\hyperlink{dir_c97dd66fe183941100f309891005a720}{unit\+\_\+tests.\+dir}} +\end{DoxyCompactItemize} diff --git a/docs/latex/dir_f942a7a73394fda25d4213a70555b3f8.tex b/docs/latex/dir_f942a7a73394fda25d4213a70555b3f8.tex new file mode 100644 index 0000000..de94816 --- /dev/null +++ b/docs/latex/dir_f942a7a73394fda25d4213a70555b3f8.tex @@ -0,0 +1,9 @@ +\hypertarget{dir_f942a7a73394fda25d4213a70555b3f8}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/3.15.3 Directory Reference} +\label{dir_f942a7a73394fda25d4213a70555b3f8}\index{cmake-\/build-\/debug/CMakeFiles/3.15.3 Directory Reference@{cmake-\/build-\/debug/CMakeFiles/3.15.3 Directory Reference}} +\doxysubsection*{Directories} +\begin{DoxyCompactItemize} +\item +directory \mbox{\hyperlink{dir_44ea9ed243d3740341f2efeb45271ac4}{Compiler\+IdC}} +\item +directory \mbox{\hyperlink{dir_4c29f6c5e99ca759d1475628ee9d55fb}{Compiler\+Id\+C\+XX}} +\end{DoxyCompactItemize} diff --git a/docs/latex/doxygen.sty b/docs/latex/doxygen.sty new file mode 100644 index 0000000..78a5254 --- /dev/null +++ b/docs/latex/doxygen.sty @@ -0,0 +1,576 @@ +\NeedsTeXFormat{LaTeX2e} +\ProvidesPackage{doxygen} + +% Packages used by this style file +\RequirePackage{alltt} +%%\RequirePackage{array} %% moved to refman.tex due to workaround for LaTex 2019 version and unmaintained tabu package +\RequirePackage{calc} +\RequirePackage{float} +%%\RequirePackage{ifthen} %% moved to refman.tex due to workaround for LaTex 2019 version and unmaintained tabu package +\RequirePackage{verbatim} +\RequirePackage[table]{xcolor} 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+\definecolor{charliteral}{rgb}{0.0,0.5,0.5} +\definecolor{vhdldigit}{rgb}{1.0,0.0,1.0} +\definecolor{vhdlkeyword}{rgb}{0.43,0.0,0.43} +\definecolor{vhdllogic}{rgb}{1.0,0.0,0.0} +\definecolor{vhdlchar}{rgb}{0.0,0.0,0.0} + +% Color used for table heading +\newcommand{\tableheadbgcolor}{lightgray}% + +% Version of hypertarget with correct landing location +\newcommand{\Hypertarget}[1]{\Hy@raisedlink{\hypertarget{#1}{}}} + +% possibility to have sections etc. be within the margins +% unfortunately had to copy part of book.cls and add \raggedright +\makeatletter +\newcommand\doxysection{\@startsection {section}{1}{\z@}% + {-3.5ex \@plus -1ex \@minus -.2ex}% + {2.3ex \@plus.2ex}% + {\raggedright\normalfont\Large\bfseries}} +\newcommand\doxysubsection{\@startsection{subsection}{2}{\z@}% + {-3.25ex\@plus -1ex \@minus -.2ex}% + {1.5ex \@plus .2ex}% + {\raggedright\normalfont\large\bfseries}} +\newcommand\doxysubsubsection{\@startsection{subsubsection}{3}{\z@}% + {-3.25ex\@plus -1ex \@minus -.2ex}% + {1.5ex \@plus .2ex}% + {\raggedright\normalfont\normalsize\bfseries}} +\newcommand\doxyparagraph{\@startsection{paragraph}{4}{\z@}% + {3.25ex \@plus1ex \@minus.2ex}% + {-1em}% + {\raggedright\normalfont\normalsize\bfseries}} +\newcommand\doxysubparagraph{\@startsection{subparagraph}{5}{\parindent}% + {3.25ex \@plus1ex \@minus .2ex}% + {-1em}% + {\raggedright\normalfont\normalsize\bfseries}} +\makeatother +% Define caption that is also suitable in a table +\makeatletter +\def\doxyfigcaption{% +\refstepcounter{figure}% +\@dblarg{\@caption{figure}}} +\makeatother diff --git a/docs/latex/files.tex b/docs/latex/files.tex new file mode 100644 index 0000000..ad03e4d --- /dev/null +++ b/docs/latex/files.tex @@ -0,0 +1,38 @@ +\doxysection{File List} +Here is a list of all files with brief descriptions\+:\begin{DoxyCompactList} +\item\contentsline{section}{\mbox{\hyperlink{main_8cpp}{main.\+cpp}} }{\pageref{main_8cpp}}{} +\item\contentsline{section}{cmake-\/build-\/debug/\+C\+Make\+Files/3.\+15.\+3/\+Compiler\+Id\+C/\mbox{\hyperlink{CMakeCCompilerId_8c}{C\+Make\+C\+Compiler\+Id.\+c}} }{\pageref{CMakeCCompilerId_8c}}{} +\item\contentsline{section}{cmake-\/build-\/debug/\+C\+Make\+Files/3.\+15.\+3/\+Compiler\+Id\+C\+X\+X/\mbox{\hyperlink{CMakeCXXCompilerId_8cpp}{C\+Make\+C\+X\+X\+Compiler\+Id.\+cpp}} }{\pageref{CMakeCXXCompilerId_8cpp}}{} +\item\contentsline{section}{sources/\mbox{\hyperlink{SNES_8cpp}{S\+N\+E\+S.\+cpp}} }{\pageref{SNES_8cpp}}{} +\item\contentsline{section}{sources/\mbox{\hyperlink{SNES_8hpp}{S\+N\+E\+S.\+hpp}} }{\pageref{SNES_8hpp}}{} +\item\contentsline{section}{sources/\+A\+P\+U/\mbox{\hyperlink{APU_8cpp}{A\+P\+U.\+cpp}} }{\pageref{APU_8cpp}}{} +\item\contentsline{section}{sources/\+A\+P\+U/\mbox{\hyperlink{APU_8hpp}{A\+P\+U.\+hpp}} }{\pageref{APU_8hpp}}{} +\item\contentsline{section}{sources/\+Cartridge/\mbox{\hyperlink{Cartridge_8cpp}{Cartridge.\+cpp}} }{\pageref{Cartridge_8cpp}}{} +\item\contentsline{section}{sources/\+Cartridge/\mbox{\hyperlink{Cartridge_8hpp}{Cartridge.\+hpp}} }{\pageref{Cartridge_8hpp}}{} +\item\contentsline{section}{sources/\+Cartridge/\mbox{\hyperlink{InterruptVectors_8hpp}{Interrupt\+Vectors.\+hpp}} }{\pageref{InterruptVectors_8hpp}}{} +\item\contentsline{section}{sources/\+C\+P\+U/\mbox{\hyperlink{CPU_8cpp}{C\+P\+U.\+cpp}} }{\pageref{CPU_8cpp}}{} +\item\contentsline{section}{sources/\+C\+P\+U/\mbox{\hyperlink{CPU_8hpp}{C\+P\+U.\+hpp}} }{\pageref{CPU_8hpp}}{} +\item\contentsline{section}{sources/\+D\+S\+P/\mbox{\hyperlink{DSP_8cpp}{D\+S\+P.\+cpp}} }{\pageref{DSP_8cpp}}{} +\item\contentsline{section}{sources/\+D\+S\+P/\mbox{\hyperlink{DSP_8hpp}{D\+S\+P.\+hpp}} }{\pageref{DSP_8hpp}}{} +\item\contentsline{section}{sources/\+Exceptions/\mbox{\hyperlink{InvalidAction_8hpp}{Invalid\+Action.\+hpp}} }{\pageref{InvalidAction_8hpp}}{} +\item\contentsline{section}{sources/\+Exceptions/\mbox{\hyperlink{InvalidAddress_8hpp}{Invalid\+Address.\+hpp}} }{\pageref{InvalidAddress_8hpp}}{} +\item\contentsline{section}{sources/\+Exceptions/\mbox{\hyperlink{InvalidRom_8hpp}{Invalid\+Rom.\+hpp}} }{\pageref{InvalidRom_8hpp}}{} +\item\contentsline{section}{sources/\+Exceptions/\mbox{\hyperlink{NotImplementedException_8hpp}{Not\+Implemented\+Exception.\+hpp}} }{\pageref{NotImplementedException_8hpp}}{} +\item\contentsline{section}{sources/\+Memory/\mbox{\hyperlink{IMemory_8cpp}{I\+Memory.\+cpp}} }{\pageref{IMemory_8cpp}}{} +\item\contentsline{section}{sources/\+Memory/\mbox{\hyperlink{IMemory_8hpp}{I\+Memory.\+hpp}} }{\pageref{IMemory_8hpp}}{} +\item\contentsline{section}{sources/\+Memory/\mbox{\hyperlink{IRectangleMemory_8cpp}{I\+Rectangle\+Memory.\+cpp}} }{\pageref{IRectangleMemory_8cpp}}{} +\item\contentsline{section}{sources/\+Memory/\mbox{\hyperlink{IRectangleMemory_8hpp}{I\+Rectangle\+Memory.\+hpp}} }{\pageref{IRectangleMemory_8hpp}}{} +\item\contentsline{section}{sources/\+Memory/\mbox{\hyperlink{MemoryBus_8cpp}{Memory\+Bus.\+cpp}} }{\pageref{MemoryBus_8cpp}}{} +\item\contentsline{section}{sources/\+Memory/\mbox{\hyperlink{MemoryBus_8hpp}{Memory\+Bus.\+hpp}} }{\pageref{MemoryBus_8hpp}}{} +\item\contentsline{section}{sources/\+Memory/\mbox{\hyperlink{MemoryShadow_8cpp}{Memory\+Shadow.\+cpp}} }{\pageref{MemoryShadow_8cpp}}{} +\item\contentsline{section}{sources/\+Memory/\mbox{\hyperlink{MemoryShadow_8hpp}{Memory\+Shadow.\+hpp}} }{\pageref{MemoryShadow_8hpp}}{} +\item\contentsline{section}{sources/\+Models/\mbox{\hyperlink{Ints_8hpp}{Ints.\+hpp}} }{\pageref{Ints_8hpp}}{} +\item\contentsline{section}{sources/\+P\+P\+U/\mbox{\hyperlink{PPU_8cpp}{P\+P\+U.\+cpp}} }{\pageref{PPU_8cpp}}{} +\item\contentsline{section}{sources/\+P\+P\+U/\mbox{\hyperlink{PPU_8hpp}{P\+P\+U.\+hpp}} }{\pageref{PPU_8hpp}}{} +\item\contentsline{section}{sources/\+Ram/\mbox{\hyperlink{Ram_8cpp}{Ram.\+cpp}} }{\pageref{Ram_8cpp}}{} +\item\contentsline{section}{sources/\+Ram/\mbox{\hyperlink{Ram_8hpp}{Ram.\+hpp}} }{\pageref{Ram_8hpp}}{} +\item\contentsline{section}{sources/\+Renderer/\mbox{\hyperlink{IRenderer_8hpp}{I\+Renderer.\+hpp}} }{\pageref{IRenderer_8hpp}}{} +\item\contentsline{section}{sources/\+Renderer/\mbox{\hyperlink{SFRenderer_8cpp}{S\+F\+Renderer.\+cpp}} }{\pageref{SFRenderer_8cpp}}{} +\item\contentsline{section}{sources/\+Renderer/\mbox{\hyperlink{SFRenderer_8hpp}{S\+F\+Renderer.\+hpp}} }{\pageref{SFRenderer_8hpp}}{} +\item\contentsline{section}{tests/\mbox{\hyperlink{testCPU_8cpp}{test\+C\+P\+U.\+cpp}} }{\pageref{testCPU_8cpp}}{} +\end{DoxyCompactList} diff --git a/docs/latex/hierarchy.tex b/docs/latex/hierarchy.tex new file mode 100644 index 0000000..1f3c88e --- /dev/null +++ b/docs/latex/hierarchy.tex @@ -0,0 +1,37 @@ +\doxysection{Class Hierarchy} +This inheritance list is sorted roughly, but not completely, alphabetically\+:\begin{DoxyCompactList} +\item exception\begin{DoxyCompactList} +\item \contentsline{section}{Com\+Square\+::Invalid\+Action}{\pageref{classComSquare_1_1InvalidAction}}{} +\item \contentsline{section}{Com\+Square\+::Invalid\+Address}{\pageref{classComSquare_1_1InvalidAddress}}{} +\item \contentsline{section}{Com\+Square\+::Invalid\+Rom\+Exception}{\pageref{classComSquare_1_1InvalidRomException}}{} +\item \contentsline{section}{Com\+Square\+::Not\+Implemented\+Exception}{\pageref{classComSquare_1_1NotImplementedException}}{} +\end{DoxyCompactList} +\item \contentsline{section}{Com\+Square\+::Cartridge\+::Header}{\pageref{structComSquare_1_1Cartridge_1_1Header}}{} +\item \contentsline{section}{Com\+Square\+::Memory\+::I\+Memory}{\pageref{classComSquare_1_1Memory_1_1IMemory}}{} +\begin{DoxyCompactList} +\item \contentsline{section}{Com\+Square\+::A\+PU\+::A\+PU}{\pageref{classComSquare_1_1APU_1_1APU}}{} +\item \contentsline{section}{Com\+Square\+::A\+PU\+::D\+SP\+::D\+SP}{\pageref{classComSquare_1_1APU_1_1DSP_1_1DSP}}{} +\item \contentsline{section}{Com\+Square\+::C\+PU\+::C\+PU}{\pageref{classComSquare_1_1CPU_1_1CPU}}{} +\item \contentsline{section}{Com\+Square\+::Memory\+::I\+Rectangle\+Memory}{\pageref{classComSquare_1_1Memory_1_1IRectangleMemory}}{} +\begin{DoxyCompactList} +\item \contentsline{section}{Com\+Square\+::Cartridge\+::Cartridge}{\pageref{classComSquare_1_1Cartridge_1_1Cartridge}}{} +\end{DoxyCompactList} +\item \contentsline{section}{Com\+Square\+::Memory\+::Memory\+Shadow}{\pageref{classComSquare_1_1Memory_1_1MemoryShadow}}{} +\item \contentsline{section}{Com\+Square\+::P\+PU\+::P\+PU}{\pageref{classComSquare_1_1PPU_1_1PPU}}{} +\item \contentsline{section}{Com\+Square\+::Ram\+::Ram}{\pageref{classComSquare_1_1Ram_1_1Ram}}{} +\end{DoxyCompactList} +\item \contentsline{section}{Com\+Square\+::A\+PU\+::Internal\+Registers}{\pageref{structComSquare_1_1APU_1_1InternalRegisters}}{} +\item \contentsline{section}{Com\+Square\+::C\+PU\+::Internal\+Registers}{\pageref{structComSquare_1_1CPU_1_1InternalRegisters}}{} +\item \contentsline{section}{Com\+Square\+::Cartridge\+::Interrupt\+Vectors}{\pageref{structComSquare_1_1Cartridge_1_1InterruptVectors}}{} +\item \contentsline{section}{Com\+Square\+::Renderer\+::I\+Renderer}{\pageref{classComSquare_1_1Renderer_1_1IRenderer}}{} +\begin{DoxyCompactList} +\item \contentsline{section}{Com\+Square\+::Renderer\+::S\+F\+Renderer}{\pageref{classComSquare_1_1Renderer_1_1SFRenderer}}{} +\end{DoxyCompactList} +\item \contentsline{section}{Com\+Square\+::Memory\+::Memory\+Bus}{\pageref{classComSquare_1_1Memory_1_1MemoryBus}}{} +\item \contentsline{section}{Com\+Square\+::C\+PU\+::Registers\+::p}{\pageref{unionComSquare_1_1CPU_1_1Registers_1_1p}}{} +\item \contentsline{section}{Com\+Square\+::A\+PU\+::Internal\+Registers\+::psw}{\pageref{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}}{} +\item \contentsline{section}{Com\+Square\+::A\+PU\+::D\+SP\+::Registers}{\pageref{structComSquare_1_1APU_1_1DSP_1_1Registers}}{} +\item \contentsline{section}{Com\+Square\+::A\+PU\+::Registers}{\pageref{structComSquare_1_1APU_1_1Registers}}{} +\item \contentsline{section}{Com\+Square\+::C\+PU\+::Registers}{\pageref{structComSquare_1_1CPU_1_1Registers}}{} +\item \contentsline{section}{Com\+Square\+::S\+N\+ES}{\pageref{structComSquare_1_1SNES}}{} +\end{DoxyCompactList} diff --git a/docs/latex/longtable_doxygen.sty b/docs/latex/longtable_doxygen.sty new file mode 100644 index 0000000..a0eb314 --- /dev/null +++ b/docs/latex/longtable_doxygen.sty @@ -0,0 +1,448 @@ +%% +%% This is file `longtable.sty', +%% generated with the docstrip utility. +%% +%% The original source files were: +%% +%% longtable.dtx (with options: `package') +%% +%% This is a generated file. +%% +%% The source is maintained by the LaTeX Project team and bug +%% reports for it can be opened at http://latex-project.org/bugs.html +%% (but please observe conditions on bug reports sent to that address!) +%% +%% Copyright 1993-2016 +%% The LaTeX3 Project and any individual authors listed elsewhere +%% in this file. +%% +%% This file was generated from file(s) of the Standard LaTeX `Tools Bundle'. +%% -------------------------------------------------------------------------- +%% +%% It may be distributed and/or modified under the +%% conditions of the LaTeX Project Public License, either version 1.3c +%% of this license or (at your option) any later version. +%% The latest version of this license is in +%% http://www.latex-project.org/lppl.txt +%% and version 1.3c or later is part of all distributions of LaTeX +%% version 2005/12/01 or later. +%% +%% This file may only be distributed together with a copy of the LaTeX +%% `Tools Bundle'. You may however distribute the LaTeX `Tools Bundle' +%% without such generated files. +%% +%% The list of all files belonging to the LaTeX `Tools Bundle' is +%% given in the file `manifest.txt'. +%% +%% File: longtable.dtx Copyright (C) 1990-2001 David Carlisle +\NeedsTeXFormat{LaTeX2e}[1995/06/01] +\ProvidesPackage{longtable_doxygen} + [2014/10/28 v4.11 Multi-page Table package (DPC) - frozen version for doxygen] +\def\LT@err{\PackageError{longtable}} +\def\LT@warn{\PackageWarning{longtable}} +\def\LT@final@warn{% + \AtEndDocument{% + \LT@warn{Table \@width s have changed. Rerun LaTeX.\@gobbletwo}}% + \global\let\LT@final@warn\relax} +\DeclareOption{errorshow}{% + \def\LT@warn{\PackageInfo{longtable}}} +\DeclareOption{pausing}{% + \def\LT@warn#1{% + \LT@err{#1}{This is not really an error}}} +\DeclareOption{set}{} +\DeclareOption{final}{} +\ProcessOptions +\newskip\LTleft \LTleft=\fill +\newskip\LTright \LTright=\fill +\newskip\LTpre \LTpre=\bigskipamount +\newskip\LTpost \LTpost=\bigskipamount +\newcount\LTchunksize \LTchunksize=20 +\let\c@LTchunksize\LTchunksize +\newdimen\LTcapwidth \LTcapwidth=4in +\newbox\LT@head +\newbox\LT@firsthead +\newbox\LT@foot +\newbox\LT@lastfoot +\newcount\LT@cols +\newcount\LT@rows +\newcounter{LT@tables} +\newcounter{LT@chunks}[LT@tables] +\ifx\c@table\undefined + \newcounter{table} + \def\fnum@table{\tablename~\thetable} +\fi +\ifx\tablename\undefined + \def\tablename{Table} +\fi +\newtoks\LT@p@ftn +\mathchardef\LT@end@pen=30000 +\def\longtable{% + \par + \ifx\multicols\@undefined + \else + \ifnum\col@number>\@ne + \@twocolumntrue + \fi + \fi + \if@twocolumn + \LT@err{longtable not in 1-column mode}\@ehc + \fi + \begingroup + \@ifnextchar[\LT@array{\LT@array[x]}} +\def\LT@array[#1]#2{% + \refstepcounter{table}\stepcounter{LT@tables}% + \if l#1% + \LTleft\z@ \LTright\fill + \else\if r#1% + \LTleft\fill \LTright\z@ + \else\if c#1% + \LTleft\fill \LTright\fill + \fi\fi\fi + \let\LT@mcol\multicolumn + \let\LT@@tabarray\@tabarray + \let\LT@@hl\hline + \def\@tabarray{% + \let\hline\LT@@hl + \LT@@tabarray}% + \let\\\LT@tabularcr\let\tabularnewline\\% + \def\newpage{\noalign{\break}}% + \def\pagebreak{\noalign{\ifnum`}=0\fi\@testopt{\LT@no@pgbk-}4}% + \def\nopagebreak{\noalign{\ifnum`}=0\fi\@testopt\LT@no@pgbk4}% + \let\hline\LT@hline \let\kill\LT@kill\let\caption\LT@caption + \@tempdima\ht\strutbox + \let\@endpbox\LT@endpbox + \ifx\extrarowheight\@undefined + \let\@acol\@tabacol + \let\@classz\@tabclassz \let\@classiv\@tabclassiv + \def\@startpbox{\vtop\LT@startpbox}% + \let\@@startpbox\@startpbox + \let\@@endpbox\@endpbox + \let\LT@LL@FM@cr\@tabularcr + \else + \advance\@tempdima\extrarowheight + \col@sep\tabcolsep + \let\@startpbox\LT@startpbox\let\LT@LL@FM@cr\@arraycr + \fi + \setbox\@arstrutbox\hbox{\vrule + \@height \arraystretch \@tempdima + \@depth \arraystretch \dp \strutbox + \@width \z@}% + \let\@sharp##\let\protect\relax + \begingroup + \@mkpream{#2}% + \xdef\LT@bchunk{% + \global\advance\c@LT@chunks\@ne + \global\LT@rows\z@\setbox\z@\vbox\bgroup + \LT@setprevdepth + \tabskip\LTleft \noexpand\halign to\hsize\bgroup + \tabskip\z@ \@arstrut \@preamble \tabskip\LTright \cr}% + \endgroup + \expandafter\LT@nofcols\LT@bchunk&\LT@nofcols + \LT@make@row + \m@th\let\par\@empty + \everycr{}\lineskip\z@\baselineskip\z@ + \LT@bchunk} +\def\LT@no@pgbk#1[#2]{\penalty #1\@getpen{#2}\ifnum`{=0\fi}} +\def\LT@start{% + \let\LT@start\endgraf + \endgraf\penalty\z@\vskip\LTpre + \dimen@\pagetotal + \advance\dimen@ \ht\ifvoid\LT@firsthead\LT@head\else\LT@firsthead\fi + \advance\dimen@ \dp\ifvoid\LT@firsthead\LT@head\else\LT@firsthead\fi + \advance\dimen@ \ht\LT@foot + \dimen@ii\vfuzz + \vfuzz\maxdimen + \setbox\tw@\copy\z@ + \setbox\tw@\vsplit\tw@ to \ht\@arstrutbox + \setbox\tw@\vbox{\unvbox\tw@}% + \vfuzz\dimen@ii + \advance\dimen@ \ht + \ifdim\ht\@arstrutbox>\ht\tw@\@arstrutbox\else\tw@\fi + \advance\dimen@\dp + \ifdim\dp\@arstrutbox>\dp\tw@\@arstrutbox\else\tw@\fi + \advance\dimen@ -\pagegoal + \ifdim \dimen@>\z@\vfil\break\fi + \global\@colroom\@colht + \ifvoid\LT@foot\else + \advance\vsize-\ht\LT@foot + \global\advance\@colroom-\ht\LT@foot + \dimen@\pagegoal\advance\dimen@-\ht\LT@foot\pagegoal\dimen@ + \maxdepth\z@ + \fi + \ifvoid\LT@firsthead\copy\LT@head\else\box\LT@firsthead\fi\nobreak + \output{\LT@output}} +\def\endlongtable{% + \crcr + \noalign{% + \let\LT@entry\LT@entry@chop + \xdef\LT@save@row{\LT@save@row}}% + \LT@echunk + \LT@start + \unvbox\z@ + \LT@get@widths + \if@filesw + {\let\LT@entry\LT@entry@write\immediate\write\@auxout{% + \gdef\expandafter\noexpand + \csname LT@\romannumeral\c@LT@tables\endcsname + {\LT@save@row}}}% + \fi + \ifx\LT@save@row\LT@@save@row + \else + \LT@warn{Column \@width s have changed\MessageBreak + in table \thetable}% + \LT@final@warn + \fi + \endgraf\penalty -\LT@end@pen + \endgroup + \global\@mparbottom\z@ + \pagegoal\vsize + \endgraf\penalty\z@\addvspace\LTpost + \ifvoid\footins\else\insert\footins{}\fi} +\def\LT@nofcols#1&{% + \futurelet\@let@token\LT@n@fcols} +\def\LT@n@fcols{% + \advance\LT@cols\@ne + \ifx\@let@token\LT@nofcols + \expandafter\@gobble + \else + \expandafter\LT@nofcols + \fi} +\def\LT@tabularcr{% + \relax\iffalse{\fi\ifnum0=`}\fi + \@ifstar + {\def\crcr{\LT@crcr\noalign{\nobreak}}\let\cr\crcr + \LT@t@bularcr}% + {\LT@t@bularcr}} +\let\LT@crcr\crcr +\let\LT@setprevdepth\relax +\def\LT@t@bularcr{% + \global\advance\LT@rows\@ne + \ifnum\LT@rows=\LTchunksize + \gdef\LT@setprevdepth{% + \prevdepth\z@\global + \global\let\LT@setprevdepth\relax}% + \expandafter\LT@xtabularcr + \else + \ifnum0=`{}\fi + \expandafter\LT@LL@FM@cr + \fi} +\def\LT@xtabularcr{% + \@ifnextchar[\LT@argtabularcr\LT@ntabularcr} +\def\LT@ntabularcr{% + \ifnum0=`{}\fi + \LT@echunk + \LT@start + \unvbox\z@ + \LT@get@widths + \LT@bchunk} +\def\LT@argtabularcr[#1]{% + \ifnum0=`{}\fi + \ifdim #1>\z@ + \unskip\@xargarraycr{#1}% + \else + \@yargarraycr{#1}% + \fi + \LT@echunk + \LT@start + \unvbox\z@ + \LT@get@widths + \LT@bchunk} +\def\LT@echunk{% + \crcr\LT@save@row\cr\egroup + \global\setbox\@ne\lastbox + \unskip + \egroup} +\def\LT@entry#1#2{% + \ifhmode\@firstofone{&}\fi\omit + \ifnum#1=\c@LT@chunks + \else + \kern#2\relax + \fi} +\def\LT@entry@chop#1#2{% + \noexpand\LT@entry + {\ifnum#1>\c@LT@chunks + 1}{0pt% + \else + #1}{#2% + \fi}} +\def\LT@entry@write{% + \noexpand\LT@entry^^J% + \@spaces} +\def\LT@kill{% + \LT@echunk + \LT@get@widths + \expandafter\LT@rebox\LT@bchunk} +\def\LT@rebox#1\bgroup{% + #1\bgroup + \unvbox\z@ + \unskip + \setbox\z@\lastbox} +\def\LT@blank@row{% + \xdef\LT@save@row{\expandafter\LT@build@blank + \romannumeral\number\LT@cols 001 }} +\def\LT@build@blank#1{% + \if#1m% + \noexpand\LT@entry{1}{0pt}% + \expandafter\LT@build@blank + \fi} +\def\LT@make@row{% + \global\expandafter\let\expandafter\LT@save@row + \csname LT@\romannumeral\c@LT@tables\endcsname + \ifx\LT@save@row\relax + \LT@blank@row + \else + {\let\LT@entry\or + \if!% + \ifcase\expandafter\expandafter\expandafter\LT@cols + \expandafter\@gobble\LT@save@row + \or + \else + \relax + \fi + !% + \else + \aftergroup\LT@blank@row + \fi}% + \fi} +\let\setlongtables\relax +\def\LT@get@widths{% + \setbox\tw@\hbox{% + \unhbox\@ne + \let\LT@old@row\LT@save@row + \global\let\LT@save@row\@empty + \count@\LT@cols + \loop + \unskip + \setbox\tw@\lastbox + \ifhbox\tw@ + \LT@def@row + \advance\count@\m@ne + \repeat}% + \ifx\LT@@save@row\@undefined + \let\LT@@save@row\LT@save@row + \fi} +\def\LT@def@row{% + \let\LT@entry\or + \edef\@tempa{% + \ifcase\expandafter\count@\LT@old@row + \else + {1}{0pt}% + \fi}% + \let\LT@entry\relax + \xdef\LT@save@row{% + \LT@entry + \expandafter\LT@max@sel\@tempa + \LT@save@row}} +\def\LT@max@sel#1#2{% + {\ifdim#2=\wd\tw@ + #1% + \else + \number\c@LT@chunks + \fi}% + {\the\wd\tw@}} +\def\LT@hline{% + \noalign{\ifnum0=`}\fi + \penalty\@M + \futurelet\@let@token\LT@@hline} +\def\LT@@hline{% + \ifx\@let@token\hline + \global\let\@gtempa\@gobble + \gdef\LT@sep{\penalty-\@medpenalty\vskip\doublerulesep}% + \else + \global\let\@gtempa\@empty + \gdef\LT@sep{\penalty-\@lowpenalty\vskip-\arrayrulewidth}% + \fi + \ifnum0=`{\fi}% + \multispan\LT@cols + \unskip\leaders\hrule\@height\arrayrulewidth\hfill\cr + \noalign{\LT@sep}% + \multispan\LT@cols + \unskip\leaders\hrule\@height\arrayrulewidth\hfill\cr + \noalign{\penalty\@M}% + \@gtempa} +\def\LT@caption{% + \noalign\bgroup + \@ifnextchar[{\egroup\LT@c@ption\@firstofone}\LT@capti@n} +\def\LT@c@ption#1[#2]#3{% + \LT@makecaption#1\fnum@table{#3}% + \def\@tempa{#2}% + \ifx\@tempa\@empty\else + {\let\\\space + \addcontentsline{lot}{table}{\protect\numberline{\thetable}{#2}}}% + \fi} +\def\LT@capti@n{% + \@ifstar + {\egroup\LT@c@ption\@gobble[]}% + {\egroup\@xdblarg{\LT@c@ption\@firstofone}}} +\def\LT@makecaption#1#2#3{% + \LT@mcol\LT@cols c{\hbox to\z@{\hss\parbox[t]\LTcapwidth{% + \sbox\@tempboxa{#1{#2: }#3}% + \ifdim\wd\@tempboxa>\hsize + #1{#2: }#3% + \else + \hbox to\hsize{\hfil\box\@tempboxa\hfil}% + \fi + \endgraf\vskip\baselineskip}% + \hss}}} +\def\LT@output{% + \ifnum\outputpenalty <-\@Mi + \ifnum\outputpenalty > -\LT@end@pen + \LT@err{floats and marginpars not allowed in a longtable}\@ehc + \else + \setbox\z@\vbox{\unvbox\@cclv}% + \ifdim \ht\LT@lastfoot>\ht\LT@foot + \dimen@\pagegoal + \advance\dimen@-\ht\LT@lastfoot + \ifdim\dimen@<\ht\z@ + \setbox\@cclv\vbox{\unvbox\z@\copy\LT@foot\vss}% + \@makecol + \@outputpage + \setbox\z@\vbox{\box\LT@head}% + \fi + \fi + \global\@colroom\@colht + \global\vsize\@colht + \vbox + {\unvbox\z@\box\ifvoid\LT@lastfoot\LT@foot\else\LT@lastfoot\fi}% + \fi + \else + \setbox\@cclv\vbox{\unvbox\@cclv\copy\LT@foot\vss}% + \@makecol + \@outputpage + \global\vsize\@colroom + \copy\LT@head\nobreak + \fi} +\def\LT@end@hd@ft#1{% + \LT@echunk + \ifx\LT@start\endgraf + \LT@err + {Longtable head or foot not at start of table}% + {Increase LTchunksize}% + \fi + \setbox#1\box\z@ + \LT@get@widths + \LT@bchunk} +\def\endfirsthead{\LT@end@hd@ft\LT@firsthead} +\def\endhead{\LT@end@hd@ft\LT@head} +\def\endfoot{\LT@end@hd@ft\LT@foot} +\def\endlastfoot{\LT@end@hd@ft\LT@lastfoot} +\def\LT@startpbox#1{% + \bgroup + \let\@footnotetext\LT@p@ftntext + \setlength\hsize{#1}% + \@arrayparboxrestore + \vrule \@height \ht\@arstrutbox \@width \z@} +\def\LT@endpbox{% + \@finalstrut\@arstrutbox + \egroup + \the\LT@p@ftn + \global\LT@p@ftn{}% + \hfil} +\def\LT@p@ftntext#1{% + \edef\@tempa{\the\LT@p@ftn\noexpand\footnotetext[\the\c@footnote]}% + \global\LT@p@ftn\expandafter{\@tempa{#1}}}% + +\@namedef{ver@longtable.sty}{2014/10/28 v4.11 Multi-page Table package (DPC) - frozen version for doxygen} +\endinput +%% +%% End of file `longtable.sty'. diff --git a/docs/latex/main_8cpp.tex b/docs/latex/main_8cpp.tex new file mode 100644 index 0000000..e722191 --- /dev/null +++ b/docs/latex/main_8cpp.tex @@ -0,0 +1,27 @@ +\hypertarget{main_8cpp}{}\doxysection{main.\+cpp File Reference} +\label{main_8cpp}\index{main.cpp@{main.cpp}} +{\ttfamily \#include $<$iostream$>$}\newline +{\ttfamily \#include $<$string$>$}\newline +{\ttfamily \#include \char`\"{}sources/\+S\+N\+E\+S.\+hpp\char`\"{}}\newline +Include dependency graph for main.\+cpp\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=350pt]{main_8cpp__incl} +\end{center} +\end{figure} +\doxysubsection*{Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} \mbox{\hyperlink{main_8cpp_a3c04138a5bfe5d72780bb7e82a18e627}{main}} (\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} argc, \mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$$\ast$argv) +\end{DoxyCompactItemize} + + +\doxysubsection{Function Documentation} +\mbox{\Hypertarget{main_8cpp_a3c04138a5bfe5d72780bb7e82a18e627}\label{main_8cpp_a3c04138a5bfe5d72780bb7e82a18e627}} +\index{main.cpp@{main.cpp}!main@{main}} +\index{main@{main}!main.cpp@{main.cpp}} +\doxysubsubsection{\texorpdfstring{main()}{main()}} +{\footnotesize\ttfamily \mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}} main (\begin{DoxyParamCaption}\item[{\mbox{\hyperlink{CMakeCache_8txt_a79a3d8790b2588b09777910863574e09}{int}}}]{argc, }\item[{\mbox{\hyperlink{CMakeCache_8txt_afe71f11dacb15682cdc012f7208e6e09}{char}} $\ast$$\ast$}]{argv }\end{DoxyParamCaption})} + diff --git a/docs/latex/main_8cpp__incl.md5 b/docs/latex/main_8cpp__incl.md5 new file mode 100644 index 0000000..bf85695 --- /dev/null +++ b/docs/latex/main_8cpp__incl.md5 @@ -0,0 +1 @@ +e2203977dce6bf481070972a25db5497 \ No newline at end of file diff --git a/docs/latex/main_8cpp__incl.pdf b/docs/latex/main_8cpp__incl.pdf new file mode 100644 index 0000000..07d8b34 Binary files /dev/null and b/docs/latex/main_8cpp__incl.pdf differ diff --git a/docs/latex/md_README.tex b/docs/latex/md_README.tex new file mode 100644 index 0000000..1758405 --- /dev/null +++ b/docs/latex/md_README.tex @@ -0,0 +1,21 @@ + + + + + + +\href{./LICENSE}{\texttt{ }} \href{https://github.com/AnonymusRaccoon/ComSquare/issues}{\texttt{ }} \href{https://github.com/AnonymusRaccoon/ComSquare/actions?query=workflow\%3A\%22Build+commit+artifact\%22}{\texttt{ }} \href{https://github.com/AnonymusRaccoon/ComSquare/actions?query=workflow\%3A\%22Testing+current+commit\%22}{\texttt{ }} \href{https://codecov.io/gh/AnonymusRaccoon/ComSquare}{\texttt{ }} + +Com² is a S\+N\+ES emulator for Linux built in C++ by 3 friends. + +\DoxyHorRuler{0} +\hypertarget{md_README_autotoc_md0}{}\doxysubsection{Installation}\label{md_README_autotoc_md0} +You can use an artifact from latest commit by selecting ✔️ and {\ttfamily Build commit artifact}. You will have an option, if the commit is correct, to download the artifact which you have to unzip. + +Overwhise, you can build yourself the program by cloning the repository \+: {\ttfamily git clone \href{https://github.com/AnonymusRaccoon/ComSquare.git}{\texttt{ https\+://github.\+com/\+Anonymus\+Raccoon/\+Com\+Square.\+git}}} + +You need the \href{https://www.sfml-dev.org/download.php}{\texttt{ S\+F\+ML library}}. + +After going inside the repository directory, create a build folder {\ttfamily mkdir build}, go inside and make {\ttfamily cmake ..} to finally make {\ttfamily make}. If you\textquotesingle{}ve done nothing wrong, you should have the program compiled!\hypertarget{md_README_autotoc_md1}{}\doxysubsection{Informations}\label{md_README_autotoc_md1} +During the development we will update and create documentations about the S\+N\+ES and the emulator, we will use \href{https://github.com/AnonymusRaccoon/ComSquare/projects}{\texttt{ Git\+Hub Projects}} page and \href{https://github.com/AnonymusRaccoon/ComSquare/wiki}{\texttt{ Git\+Hub Wiki}} to inform you about \char`\"{}everything\char`\"{}.\hypertarget{md_README_autotoc_md2}{}\doxysubsubsection{Licence}\label{md_README_autotoc_md2} +As seen on the badge, we use \href{./LICENSE}{\texttt{ G\+P\+Lv3 license}}, so you\textquotesingle{}re free to use, fork and modify our program freely, we are 100\% Open Source! \ No newline at end of file diff --git a/docs/latex/namespaceComSquare.tex b/docs/latex/namespaceComSquare.tex new file mode 100644 index 0000000..c787391 --- /dev/null +++ b/docs/latex/namespaceComSquare.tex @@ -0,0 +1,32 @@ +\hypertarget{namespaceComSquare}{}\doxysection{Com\+Square Namespace Reference} +\label{namespaceComSquare}\index{ComSquare@{ComSquare}} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare_1_1APU}{A\+PU}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Cartridge}{Cartridge}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1PPU}{P\+PU}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Ram}{Ram}} +\item + \mbox{\hyperlink{namespaceComSquare_1_1Renderer}{Renderer}} +\end{DoxyCompactItemize} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1InvalidAction}{Invalid\+Action}} +\begin{DoxyCompactList}\small\item\em Exception thrown when someone tries to load an invalid rom. \end{DoxyCompactList}\item +class \mbox{\hyperlink{classComSquare_1_1InvalidAddress}{Invalid\+Address}} +\begin{DoxyCompactList}\small\item\em Exception thrown when trying to read/write to an invalid address. \end{DoxyCompactList}\item +class \mbox{\hyperlink{classComSquare_1_1InvalidRomException}{Invalid\+Rom\+Exception}} +\begin{DoxyCompactList}\small\item\em Exception thrown when someone tries to load an invalid rom. \end{DoxyCompactList}\item +class \mbox{\hyperlink{classComSquare_1_1NotImplementedException}{Not\+Implemented\+Exception}} +\begin{DoxyCompactList}\small\item\em When this is thrown, it means that we should work more. \end{DoxyCompactList}\item +struct \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} +\begin{DoxyCompactList}\small\item\em Container of all the components of the \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}}. \end{DoxyCompactList}\end{DoxyCompactItemize} diff --git a/docs/latex/namespaceComSquare_1_1APU.tex b/docs/latex/namespaceComSquare_1_1APU.tex new file mode 100644 index 0000000..98ae818 --- /dev/null +++ b/docs/latex/namespaceComSquare_1_1APU.tex @@ -0,0 +1,16 @@ +\hypertarget{namespaceComSquare_1_1APU}{}\doxysection{Com\+Square\+::A\+PU Namespace Reference} +\label{namespaceComSquare_1_1APU}\index{ComSquare::APU@{ComSquare::APU}} +\doxysubsection*{Namespaces} +\begin{DoxyCompactItemize} +\item + \mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{D\+SP}} +\end{DoxyCompactItemize} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+PU}} +\item +struct \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters}{Internal\+Registers}} +\item +struct \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers}{Registers}} +\end{DoxyCompactItemize} diff --git a/docs/latex/namespaceComSquare_1_1APU_1_1DSP.tex b/docs/latex/namespaceComSquare_1_1APU_1_1DSP.tex new file mode 100644 index 0000000..93b9bdc --- /dev/null +++ b/docs/latex/namespaceComSquare_1_1APU_1_1DSP.tex @@ -0,0 +1,9 @@ +\hypertarget{namespaceComSquare_1_1APU_1_1DSP}{}\doxysection{Com\+Square\+::A\+PU\+::D\+SP Namespace Reference} +\label{namespaceComSquare_1_1APU_1_1DSP}\index{ComSquare::APU::DSP@{ComSquare::APU::DSP}} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}} +\item +struct \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers}{Registers}} +\begin{DoxyCompactList}\small\item\em All the registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}}. \end{DoxyCompactList}\end{DoxyCompactItemize} diff --git a/docs/latex/namespaceComSquare_1_1CPU.tex b/docs/latex/namespaceComSquare_1_1CPU.tex new file mode 100644 index 0000000..cf9433d --- /dev/null +++ b/docs/latex/namespaceComSquare_1_1CPU.tex @@ -0,0 +1,11 @@ +\hypertarget{namespaceComSquare_1_1CPU}{}\doxysection{Com\+Square\+::C\+PU Namespace Reference} +\label{namespaceComSquare_1_1CPU}\index{ComSquare::CPU@{ComSquare::CPU}} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}} +\begin{DoxyCompactList}\small\item\em The main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. \end{DoxyCompactList}\item +struct \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters}{Internal\+Registers}} +\begin{DoxyCompactList}\small\item\em Struct containing internal registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. \end{DoxyCompactList}\item +struct \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} +\begin{DoxyCompactList}\small\item\em Struct containing registers for the main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. \end{DoxyCompactList}\end{DoxyCompactItemize} diff --git a/docs/latex/namespaceComSquare_1_1Cartridge.tex b/docs/latex/namespaceComSquare_1_1Cartridge.tex new file mode 100644 index 0000000..6dafa8f --- /dev/null +++ b/docs/latex/namespaceComSquare_1_1Cartridge.tex @@ -0,0 +1,54 @@ +\hypertarget{namespaceComSquare_1_1Cartridge}{}\doxysection{Com\+Square\+::Cartridge Namespace Reference} +\label{namespaceComSquare_1_1Cartridge}\index{ComSquare::Cartridge@{ComSquare::Cartridge}} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge}{Cartridge}} +\begin{DoxyCompactList}\small\item\em Contains the rom\textquotesingle{}s memory/instructions. \end{DoxyCompactList}\item +struct \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header}{Header}} +\item +struct \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors}{Interrupt\+Vectors}} +\end{DoxyCompactItemize} +\doxysubsection*{Enumerations} +\begin{DoxyCompactItemize} +\item +enum \mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645}{Mapping\+Mode}} \{ \newline +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645ab06a20291b736bc664f853b77d1f3846}{Lo\+Rom}} = 1u $<$$<$ 0u, +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645a461b515672aec1a8463cda3e05936cdd}{Hi\+Rom}} = 1u $<$$<$ 1u, +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645aa80ac825c99f61aada8b3cbd04952bb6}{Slow\+Rom}} = 1u $<$$<$ 2u, +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645ad5867d09b7b015f54e76780ef508bd64}{Fast\+Rom}} = 1u $<$$<$ 3u, +\newline +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645a48571836eb7c4372c4c5501715a8641d}{Ex\+Rom}} = 1u $<$$<$ 4u + \} +\end{DoxyCompactItemize} + + +\doxysubsection{Enumeration Type Documentation} +\mbox{\Hypertarget{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645}\label{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645}} +\index{ComSquare::Cartridge@{ComSquare::Cartridge}!MappingMode@{MappingMode}} +\index{MappingMode@{MappingMode}!ComSquare::Cartridge@{ComSquare::Cartridge}} +\doxysubsubsection{\texorpdfstring{MappingMode}{MappingMode}} +{\footnotesize\ttfamily enum \mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645}{Com\+Square\+::\+Cartridge\+::\+Mapping\+Mode}}} + +\begin{DoxyEnumFields}{Enumerator} +\raisebox{\heightof{T}}[0pt][0pt]{\index{LoRom@{LoRom}!ComSquare::Cartridge@{ComSquare::Cartridge}}\index{ComSquare::Cartridge@{ComSquare::Cartridge}!LoRom@{LoRom}}}\mbox{\Hypertarget{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645ab06a20291b736bc664f853b77d1f3846}\label{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645ab06a20291b736bc664f853b77d1f3846}} +Lo\+Rom&\\ +\hline + +\raisebox{\heightof{T}}[0pt][0pt]{\index{HiRom@{HiRom}!ComSquare::Cartridge@{ComSquare::Cartridge}}\index{ComSquare::Cartridge@{ComSquare::Cartridge}!HiRom@{HiRom}}}\mbox{\Hypertarget{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645a461b515672aec1a8463cda3e05936cdd}\label{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645a461b515672aec1a8463cda3e05936cdd}} +Hi\+Rom&\\ +\hline + +\raisebox{\heightof{T}}[0pt][0pt]{\index{SlowRom@{SlowRom}!ComSquare::Cartridge@{ComSquare::Cartridge}}\index{ComSquare::Cartridge@{ComSquare::Cartridge}!SlowRom@{SlowRom}}}\mbox{\Hypertarget{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645aa80ac825c99f61aada8b3cbd04952bb6}\label{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645aa80ac825c99f61aada8b3cbd04952bb6}} +Slow\+Rom&\\ +\hline + +\raisebox{\heightof{T}}[0pt][0pt]{\index{FastRom@{FastRom}!ComSquare::Cartridge@{ComSquare::Cartridge}}\index{ComSquare::Cartridge@{ComSquare::Cartridge}!FastRom@{FastRom}}}\mbox{\Hypertarget{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645ad5867d09b7b015f54e76780ef508bd64}\label{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645ad5867d09b7b015f54e76780ef508bd64}} +Fast\+Rom&\\ +\hline + +\raisebox{\heightof{T}}[0pt][0pt]{\index{ExRom@{ExRom}!ComSquare::Cartridge@{ComSquare::Cartridge}}\index{ComSquare::Cartridge@{ComSquare::Cartridge}!ExRom@{ExRom}}}\mbox{\Hypertarget{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645a48571836eb7c4372c4c5501715a8641d}\label{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645a48571836eb7c4372c4c5501715a8641d}} +Ex\+Rom&\\ +\hline + +\end{DoxyEnumFields} diff --git a/docs/latex/namespaceComSquare_1_1Memory.tex b/docs/latex/namespaceComSquare_1_1Memory.tex new file mode 100644 index 0000000..e5aefbf --- /dev/null +++ b/docs/latex/namespaceComSquare_1_1Memory.tex @@ -0,0 +1,13 @@ +\hypertarget{namespaceComSquare_1_1Memory}{}\doxysection{Com\+Square\+::Memory Namespace Reference} +\label{namespaceComSquare_1_1Memory}\index{ComSquare::Memory@{ComSquare::Memory}} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} +\begin{DoxyCompactList}\small\item\em Common interface implemented by all components mapping memory. \end{DoxyCompactList}\item +class \mbox{\hyperlink{classComSquare_1_1Memory_1_1IRectangleMemory}{I\+Rectangle\+Memory}} +\begin{DoxyCompactList}\small\item\em Superset of the \mbox{\hyperlink{classComSquare_1_1Memory_1_1IMemory}{I\+Memory}} to map non continuous rectangle to the memory. (A rectangle that spam across more than one bank but that does not start at 0000 or end at F\+F\+FF). \end{DoxyCompactList}\item +class \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Memory\+Bus}} +\begin{DoxyCompactList}\small\item\em The memory bus is the component responsible of mapping addresses to components address and transmitting the data. \end{DoxyCompactList}\item +class \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryShadow}{Memory\+Shadow}} +\end{DoxyCompactItemize} diff --git a/docs/latex/namespaceComSquare_1_1PPU.tex b/docs/latex/namespaceComSquare_1_1PPU.tex new file mode 100644 index 0000000..86f7060 --- /dev/null +++ b/docs/latex/namespaceComSquare_1_1PPU.tex @@ -0,0 +1,7 @@ +\hypertarget{namespaceComSquare_1_1PPU}{}\doxysection{Com\+Square\+::P\+PU Namespace Reference} +\label{namespaceComSquare_1_1PPU}\index{ComSquare::PPU@{ComSquare::PPU}} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}} +\begin{DoxyCompactList}\small\item\em The struct containing all the registers the \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+PU}}. \end{DoxyCompactList}\end{DoxyCompactItemize} diff --git a/docs/latex/namespaceComSquare_1_1Ram.tex b/docs/latex/namespaceComSquare_1_1Ram.tex new file mode 100644 index 0000000..b405de1 --- /dev/null +++ b/docs/latex/namespaceComSquare_1_1Ram.tex @@ -0,0 +1,7 @@ +\hypertarget{namespaceComSquare_1_1Ram}{}\doxysection{Com\+Square\+::Ram Namespace Reference} +\label{namespaceComSquare_1_1Ram}\index{ComSquare::Ram@{ComSquare::Ram}} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram}{Ram}} +\end{DoxyCompactItemize} diff --git a/docs/latex/namespaceComSquare_1_1Renderer.tex b/docs/latex/namespaceComSquare_1_1Renderer.tex new file mode 100644 index 0000000..b399b21 --- /dev/null +++ b/docs/latex/namespaceComSquare_1_1Renderer.tex @@ -0,0 +1,9 @@ +\hypertarget{namespaceComSquare_1_1Renderer}{}\doxysection{Com\+Square\+::Renderer Namespace Reference} +\label{namespaceComSquare_1_1Renderer}\index{ComSquare::Renderer@{ComSquare::Renderer}} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +class \mbox{\hyperlink{classComSquare_1_1Renderer_1_1IRenderer}{I\+Renderer}} +\item +class \mbox{\hyperlink{classComSquare_1_1Renderer_1_1SFRenderer}{S\+F\+Renderer}} +\end{DoxyCompactItemize} diff --git a/docs/latex/namespaces.tex b/docs/latex/namespaces.tex new file mode 100644 index 0000000..cd3e807 --- /dev/null +++ b/docs/latex/namespaces.tex @@ -0,0 +1,12 @@ +\doxysection{Namespace List} +Here is a list of all namespaces with brief descriptions\+:\begin{DoxyCompactList} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare}{Com\+Square}} }{\pageref{namespaceComSquare}}{} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare_1_1APU}{Com\+Square\+::\+A\+PU}} }{\pageref{namespaceComSquare_1_1APU}}{} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{Com\+Square\+::\+A\+P\+U\+::\+D\+SP}} }{\pageref{namespaceComSquare_1_1APU_1_1DSP}}{} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare_1_1Cartridge}{Com\+Square\+::\+Cartridge}} }{\pageref{namespaceComSquare_1_1Cartridge}}{} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare_1_1CPU}{Com\+Square\+::\+C\+PU}} }{\pageref{namespaceComSquare_1_1CPU}}{} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare_1_1Memory}{Com\+Square\+::\+Memory}} }{\pageref{namespaceComSquare_1_1Memory}}{} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare_1_1PPU}{Com\+Square\+::\+P\+PU}} }{\pageref{namespaceComSquare_1_1PPU}}{} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare_1_1Ram}{Com\+Square\+::\+Ram}} }{\pageref{namespaceComSquare_1_1Ram}}{} +\item\contentsline{section}{\mbox{\hyperlink{namespaceComSquare_1_1Renderer}{Com\+Square\+::\+Renderer}} }{\pageref{namespaceComSquare_1_1Renderer}}{} +\end{DoxyCompactList} diff --git a/docs/latex/refman.tex b/docs/latex/refman.tex new file mode 100644 index 0000000..7fcd2cf --- /dev/null +++ b/docs/latex/refman.tex @@ -0,0 +1,277 @@ +\let\mypdfximage\pdfximage\def\pdfximage{\immediate\mypdfximage}\documentclass[twoside]{book} + +%% moved from doxygen.sty due to workaround for LaTex 2019 version and unmaintained tabu package +\usepackage{ifthen} +\ifx\requestedLaTeXdate\undefined +\usepackage{array} +\else +\usepackage{array}[=2016-10-06] +\fi +%% +% Packages required by doxygen +\usepackage{fixltx2e} +\usepackage{calc} +\usepackage{doxygen} +\usepackage{graphicx} +\usepackage[utf8]{inputenc} +\usepackage{makeidx} +\usepackage{multicol} +\usepackage{multirow} +\PassOptionsToPackage{warn}{textcomp} +\usepackage{textcomp} +\usepackage[nointegrals]{wasysym} +\usepackage[table]{xcolor} +\usepackage{ifpdf,ifxetex} + +% Font selection +\usepackage[T1]{fontenc} +\usepackage[scaled=.90]{helvet} +\usepackage{courier} +\usepackage{amssymb} +\usepackage{sectsty} +\renewcommand{\familydefault}{\sfdefault} +\allsectionsfont{% + \fontseries{bc}\selectfont% + \color{darkgray}% +} +\renewcommand{\DoxyLabelFont}{% + \fontseries{bc}\selectfont% + \color{darkgray}% +} +\newcommand{\+}{\discretionary{\mbox{\scriptsize$\hookleftarrow$}}{}{}} + +% Arguments of doxygenemoji: +% 1) '::' form of the emoji, already "LaTeX"-escaped +% 2) file with the name of the emoji without the .png extension +% in case image exist use this otherwise use the '::' form +\newcommand{\doxygenemoji}[2]{% + \IfFileExists{./#2.png}{\raisebox{-0.1em}{\includegraphics[height=0.9em]{./#2.png}}}{#1}% +} +% Page & text layout +\usepackage{geometry} +\geometry{% + a4paper,% + top=2.5cm,% + bottom=2.5cm,% + left=2.5cm,% + right=2.5cm% +} +\tolerance=750 +\hfuzz=15pt +\hbadness=750 +\setlength{\emergencystretch}{15pt} +\setlength{\parindent}{0cm} +\newcommand{\doxynormalparskip}{\setlength{\parskip}{3ex plus 2ex minus 2ex}} +\newcommand{\doxytocparskip}{\setlength{\parskip}{1ex plus 0ex minus 0ex}} +\doxynormalparskip +\makeatletter +\renewcommand{\paragraph}{% + \@startsection{paragraph}{4}{0ex}{-1.0ex}{1.0ex}{% + \normalfont\normalsize\bfseries\SS@parafont% + }% +} +\renewcommand{\subparagraph}{% + \@startsection{subparagraph}{5}{0ex}{-1.0ex}{1.0ex}{% + \normalfont\normalsize\bfseries\SS@subparafont% + }% +} +\makeatother + +\makeatletter +\newcommand\hrulefilll{\leavevmode\leaders\hrule\hskip 0pt plus 1filll\kern\z@} +\makeatother + +% Headers & footers +\usepackage{fancyhdr} +\pagestyle{fancyplain} +\fancyhead[LE]{\fancyplain{}{\bfseries\thepage}} +\fancyhead[CE]{\fancyplain{}{}} +\fancyhead[RE]{\fancyplain{}{\bfseries\leftmark}} +\fancyhead[LO]{\fancyplain{}{\bfseries\rightmark}} +\fancyhead[CO]{\fancyplain{}{}} +\fancyhead[RO]{\fancyplain{}{\bfseries\thepage}} +\fancyfoot[LE]{\fancyplain{}{}} +\fancyfoot[CE]{\fancyplain{}{}} +\fancyfoot[RE]{\fancyplain{}{\bfseries\scriptsize Generated by Doxygen }} +\fancyfoot[LO]{\fancyplain{}{\bfseries\scriptsize Generated by Doxygen }} +\fancyfoot[CO]{\fancyplain{}{}} +\fancyfoot[RO]{\fancyplain{}{}} +\renewcommand{\footrulewidth}{0.4pt} +\renewcommand{\chaptermark}[1]{% + \markboth{#1}{}% +} +\renewcommand{\sectionmark}[1]{% + \markright{\thesection\ #1}% +} + +% Indices & bibliography +\usepackage{natbib} +\usepackage[titles]{tocloft} +\setcounter{tocdepth}{3} +\setcounter{secnumdepth}{5} +\makeindex + +\usepackage{newunicodechar} + \newunicodechar{⁻}{${}^{-}$}% Superscript minus + \newunicodechar{²}{${}^{2}$}% Superscript two + \newunicodechar{³}{${}^{3}$}% Superscript three + +% Hyperlinks (required, but should be loaded last) +\ifpdf + \usepackage[pdftex,pagebackref=true]{hyperref} +\else + \ifxetex + \usepackage[pagebackref=true]{hyperref} + \else + \usepackage[ps2pdf,pagebackref=true]{hyperref} + \fi +\fi + +\hypersetup{% + colorlinks=true,% + linkcolor=blue,% + citecolor=blue,% + unicode% +} + +% Custom commands +\newcommand{\clearemptydoublepage}{% + \newpage{\pagestyle{empty}\cleardoublepage}% +} + +\usepackage{caption} +\captionsetup{labelsep=space,justification=centering,font={bf},singlelinecheck=off,skip=4pt,position=top} + +\usepackage{etoc} +\etocsettocstyle{\doxytocparskip}{\doxynormalparskip} +\renewcommand{\numberline}[1]{#1~} +%===== C O N T E N T S ===== + +\begin{document} + +% Titlepage & ToC +\hypersetup{pageanchor=false, + bookmarksnumbered=true, + pdfencoding=unicode + } +\pagenumbering{alph} +\begin{titlepage} +\vspace*{7cm} +\begin{center}% +{\Large Com\+Square }\\ +\vspace*{1cm} +{\large Generated by Doxygen 1.8.17}\\ +\end{center} +\end{titlepage} +\clearemptydoublepage +\pagenumbering{roman} +\tableofcontents +\clearemptydoublepage +\pagenumbering{arabic} +\hypersetup{pageanchor=true} + +%--- Begin generated contents --- +\chapter{R\+E\+A\+D\+ME} +\label{md_README} +\Hypertarget{md_README} +\input{md_README} +\chapter{Namespace Index} +\input{namespaces} +\chapter{Hierarchical Index} +\input{hierarchy} +\chapter{Class Index} +\input{annotated} +\chapter{File Index} +\input{files} +\chapter{Namespace Documentation} +\input{namespaceComSquare} +\input{namespaceComSquare_1_1APU} +\input{namespaceComSquare_1_1APU_1_1DSP} +\input{namespaceComSquare_1_1Cartridge} +\input{namespaceComSquare_1_1CPU} +\input{namespaceComSquare_1_1Memory} +\input{namespaceComSquare_1_1PPU} +\input{namespaceComSquare_1_1Ram} +\input{namespaceComSquare_1_1Renderer} +\chapter{Class Documentation} +\input{classComSquare_1_1APU_1_1APU} +\input{classComSquare_1_1Cartridge_1_1Cartridge} +\input{classComSquare_1_1CPU_1_1CPU} +\input{classComSquare_1_1APU_1_1DSP_1_1DSP} +\input{structComSquare_1_1Cartridge_1_1Header} +\input{classComSquare_1_1Memory_1_1IMemory} +\input{structComSquare_1_1APU_1_1InternalRegisters} +\input{structComSquare_1_1CPU_1_1InternalRegisters} +\input{structComSquare_1_1Cartridge_1_1InterruptVectors} +\input{classComSquare_1_1InvalidAction} +\input{classComSquare_1_1InvalidAddress} +\input{classComSquare_1_1InvalidRomException} +\input{classComSquare_1_1Memory_1_1IRectangleMemory} +\input{classComSquare_1_1Renderer_1_1IRenderer} +\input{classComSquare_1_1Memory_1_1MemoryBus} +\input{classComSquare_1_1Memory_1_1MemoryShadow} +\input{classComSquare_1_1NotImplementedException} +\input{unionComSquare_1_1CPU_1_1Registers_1_1p} +\input{classComSquare_1_1PPU_1_1PPU} +\input{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw} +\input{classComSquare_1_1Ram_1_1Ram} +\input{structComSquare_1_1APU_1_1DSP_1_1Registers} +\input{structComSquare_1_1APU_1_1Registers} +\input{structComSquare_1_1CPU_1_1Registers} +\input{classComSquare_1_1Renderer_1_1SFRenderer} +\input{structComSquare_1_1SNES} +\chapter{File Documentation} +\input{CMakeCache_8txt} +\input{CMakeCCompilerId_8c} +\input{CMakeCXXCompilerId_8cpp} +\input{clion-environment_8txt} +\input{clion-log_8txt} +\input{ComSquare_8dir_2link_8txt} +\input{unit__tests_8dir_2link_8txt} +\input{TargetDirectories_8txt} +\input{CMakeLists_8txt} +\input{main_8cpp} +\input{README_8md} +\input{APU_8cpp} +\input{APU_8hpp} +\input{Cartridge_8cpp} +\input{Cartridge_8hpp} +\input{InterruptVectors_8hpp} +\input{CPU_8cpp} +\input{CPU_8hpp} +\input{DSP_8cpp} +\input{DSP_8hpp} +\input{InvalidAction_8hpp} +\input{InvalidAddress_8hpp} +\input{InvalidRom_8hpp} +\input{NotImplementedException_8hpp} +\input{IMemory_8cpp} +\input{IMemory_8hpp} +\input{IRectangleMemory_8cpp} +\input{IRectangleMemory_8hpp} +\input{MemoryBus_8cpp} +\input{MemoryBus_8hpp} +\input{MemoryShadow_8cpp} +\input{MemoryShadow_8hpp} +\input{Ints_8hpp} +\input{PPU_8cpp} +\input{PPU_8hpp} +\input{Ram_8cpp} +\input{Ram_8hpp} +\input{IRenderer_8hpp} +\input{SFRenderer_8cpp} +\input{SFRenderer_8hpp} +\input{SNES_8cpp} +\input{SNES_8hpp} +\input{testCPU_8cpp} +%--- End generated contents --- + +% Index +\backmatter +\newpage +\phantomsection +\clearemptydoublepage +\addcontentsline{toc}{chapter}{\indexname} +\printindex + +\end{document} diff --git a/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers.tex b/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers.tex new file mode 100644 index 0000000..35d9a73 --- /dev/null +++ b/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers.tex @@ -0,0 +1,761 @@ +\hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers}{}\doxysection{Com\+Square\+::A\+PU\+::D\+SP\+::Registers Struct Reference} +\label{structComSquare_1_1APU_1_1DSP_1_1Registers}\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} + + +All the registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}}. + + + + +{\ttfamily \#include $<$D\+S\+P.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::A\+PU\+::D\+SP\+::Registers\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=205pt]{structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ac43ff7cb2cb4dd2337dfe9bda244ef20}{volL}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Left channel volume register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a7af03a024d289ed3bdda0bb85f134b7f}{volR}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Left channel volume register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a5a89ce573a1b57f00caaadbda93ce513}{pitchL}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Lower 8 bits of pitch register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a3d5ca78629decaf03bada20c654f26b9}{pitchH}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Higher 8 bits of pitch register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a511e3ef820c4d64a00a9414d4818844e}{srcn}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Source number register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a6d6bd32444f7e242c2e9f5cdef88e8c0}{adsr1}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Envelope register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_acfc311cfdd393e55e9e7c378b4de0f8a}{adsr2}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Envelope controllers register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a3b3d357a3fe6dd6c7c43b99db8ee2a92}{gain}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Gain register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_af2f0396216337c9f50b6d8223c62e7cc}{envx}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Envelope value register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a2d520792c825b90104a7e96834f73ff4}{outx}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Wave height register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ade167eb865eead13b10bfdf106c52c0b}{mvolL}} +\begin{DoxyCompactList}\small\item\em Left output of the Main Volume register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a553b4df8935705f2d3be22284e05f74c}{mvolR}} +\begin{DoxyCompactList}\small\item\em Right output of the Main Volume register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a58048883806a4caea161c48df97e36c4}{evolL}} +\begin{DoxyCompactList}\small\item\em Left output of the Echo Volume register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a896493314bf91714d001f224190296ac}{evolR}} +\begin{DoxyCompactList}\small\item\em Right output of the Echo Volume register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a06e2d04314aa02e71167b52af5ed6f1c}{kon7}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_aa51606c1853630d0058a57094266cd4c}{kon6}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_aadd76543d0372b61a2cec59bb67447f8}{kon5}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a38abd188c650a1e738420950aa97d600}{kon4}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a00874469bc130a2435ade764d2b8e707}{kon3}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a2477c8198e3da5bf1e0048081a246c43}{kon2}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a2b18e66f7222eb7cfd3e47e874cecbf7}{kon1}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a243e2e3d951f80d1f812fb3d4c2f1ccd}{kon0}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a72a5fa9ecb815a960a55aee0f3d67768}{kon}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Key On register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ab12db7290eaa8a73fbd7701366ab7396}{kof7}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a29b3e5299432ba23a27e278a9596180a}{kof6}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a224365506eac0fcc681b055b0337d09e}{kof5}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a9302fd6110cb1bbcb462bbba6469df5d}{kof4}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a3ba0e21135975d035ffd4d0c95a3ca8a}{kof3}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_add71bb66089a9f48028e0650e95edd64}{kof2}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a83c47d7a5b85e3fd912873f12dadc3dd}{kof1}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a8cbc9475afa42d7f935bd697fc7c2d3a}{kof0}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a50c2233088c73fd28e598646894c6004}{kof}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Key Off register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a9a569faa711803b6c94121e928963027}{flg}} +\begin{DoxyCompactList}\small\item\em Flags register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a697357cf588ccc77fe7d0ff11f1d5da9}{endx7}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a852042eefaf7fbe8b7a21c714af034e2}{endx6}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a1414fcfbe12d2e0a8c94b65682c405c4}{endx5}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_aa12b2ad28faa3a63161b54c7509c4db6}{endx4}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_abb0a0cf1786a713768a9b981a140000d}{endx3}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_aae6bbf3ce13666730f57deddff8b9e49}{endx2}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a68d3f1d3872f0a97c7f179321d09e9c4}{endx1}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a83f58b138e7b4c5c9ddeaa838b2f54e4}{endx0}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ae5cbfb7f7e7789df7cc807625339dd93}{endx}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Sample end register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_acfd2c9be692e53c31d8cca516dd66664}{efb}} +\begin{DoxyCompactList}\small\item\em Echo feedback register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a977a328251dddd0af76d21aa38187951}{unused}} +\begin{DoxyCompactList}\small\item\em Not used register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a177391cea845d713705ae051961aeec8}{pmon7}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ae08b3327951a20b16f54f742069399db}{pmon6}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a0736d60c98ca1b9c56fa4b44da1b1567}{pmon5}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a7d5ee13161d35dab8951cd13baea4d85}{pmon4}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_af936a6561397ec74ad1e487b2c0666af}{pmon3}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a414d6e1c5f18c9e10eb38c283c2131c4}{pmon2}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_aa1da68fd55703c11cfd50460ab792bc6}{pmon1}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a220a3959863ad566752a4743ec1596c8}{\_\_}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a486b2071a96be439cd1fb6a231b9702a}{pmon}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Pitch modulation register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ab477f88562bd6438d4e3abb1420479c3}{non7}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a260bf9070cfedafb53947708afaff946}{non6}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ab0e7fee76fe745c1fe6522c89ea83c58}{non5}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a43dd5603665828c4167a45f2c8f6f73b}{non4}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a0077dd79b4de20a71c1739be72ae0273}{non3}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a3c64a57c72b01cf648aa60c147401262}{non2}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a3407a042f1a15d8877c173050bf67670}{non1}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ad48424c8e211768448ada47c96c9cacf}{non0}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_adf046da90f069771a3122129bc8ec60d}{non}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Noise enable register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a884741c9e178ab86877c1653c81c1460}{eon7}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a5a61f2e1c0767c0caf2fb40a8f951329}{eon6}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a0692ab81b5dddee27b9ba80496a82e74}{eon5}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a7746589fe1dd3185c957dfba5da33230}{eon4}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a588086d4005b63a7e903b77a9c5bf91d}{eon3}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_ae69e81ec08eaa10ebf3ab10a5e262aff}{eon2}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a42ac52ce16e41c974c187aa27a0561ab}{eon1}}: 1\\ +\>\>bool \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a3083112a0270c55a254abb9981f0e895}{eon0}}: 1\\ +\>\} \\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_af8f5c990b36d2a3ec05678f0834986d6}{eon}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Echo enable register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a2d7dd83e4a8b9fe576e26439d308a2e7}{dir}} +\begin{DoxyCompactList}\small\item\em Source Directory offset register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_adf37f88987247e451a017198d1c87504}{esa}} +\begin{DoxyCompactList}\small\item\em Echo data start register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a6c249331335060d14cd9123afc8f04ca}{edl}} +\begin{DoxyCompactList}\small\item\em Echo delay size register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1DSP_1_1Registers_a80988db5db5982dea03cb88301459a64}{coeff}} \mbox{[}8\mbox{]} +\begin{DoxyCompactList}\small\item\em Echo F\+IR filter coefficients. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +All the registers of the \mbox{\hyperlink{classComSquare_1_1APU_1_1DSP_1_1DSP}{D\+SP}}. + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_aadcc86878b92ad3ba9917da7ec784bae}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_aadcc86878b92ad3ba9917da7ec784bae}} +\doxysubsubsection{\texorpdfstring{"@53}{@53}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Key On register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ab069039af31b4ff33278d386fe3dade0}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ab069039af31b4ff33278d386fe3dade0}} +\doxysubsubsection{\texorpdfstring{"@55}{@55}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Key Off register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_aca18029c77295c3c0865f43730a53c02}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_aca18029c77295c3c0865f43730a53c02}} +\doxysubsubsection{\texorpdfstring{"@57}{@57}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Sample end register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a0bf060bbcf29b4cba3e0614aeb8dd0db}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a0bf060bbcf29b4cba3e0614aeb8dd0db}} +\doxysubsubsection{\texorpdfstring{"@59}{@59}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Pitch modulation register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ae97cb5bef916ccb901a19640f47b0613}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ae97cb5bef916ccb901a19640f47b0613}} +\doxysubsubsection{\texorpdfstring{"@61}{@61}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Noise enable register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a08ad48db33cc115ed7da885deb094308}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a08ad48db33cc115ed7da885deb094308}} +\doxysubsubsection{\texorpdfstring{"@63}{@63}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Echo enable register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a220a3959863ad566752a4743ec1596c8}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a220a3959863ad566752a4743ec1596c8}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!\_\_@{\_\_}} +\index{\_\_@{\_\_}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{\_\_}{\_\_}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::\+\_\+\+\_\+} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a6d6bd32444f7e242c2e9f5cdef88e8c0}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a6d6bd32444f7e242c2e9f5cdef88e8c0}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!adsr1@{adsr1}} +\index{adsr1@{adsr1}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{adsr1}{adsr1}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::adsr1\mbox{[}8\mbox{]}} + + + +Envelope register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_acfc311cfdd393e55e9e7c378b4de0f8a}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_acfc311cfdd393e55e9e7c378b4de0f8a}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!adsr2@{adsr2}} +\index{adsr2@{adsr2}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{adsr2}{adsr2}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::adsr2\mbox{[}8\mbox{]}} + + + +Envelope controllers register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a80988db5db5982dea03cb88301459a64}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a80988db5db5982dea03cb88301459a64}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!coeff@{coeff}} +\index{coeff@{coeff}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{coeff}{coeff}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::coeff\mbox{[}8\mbox{]}} + + + +Echo F\+IR filter coefficients. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a2d7dd83e4a8b9fe576e26439d308a2e7}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a2d7dd83e4a8b9fe576e26439d308a2e7}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!dir@{dir}} +\index{dir@{dir}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{dir}{dir}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::dir} + + + +Source Directory offset register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a6c249331335060d14cd9123afc8f04ca}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a6c249331335060d14cd9123afc8f04ca}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!edl@{edl}} +\index{edl@{edl}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{edl}{edl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::edl} + + + +Echo delay size register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_acfd2c9be692e53c31d8cca516dd66664}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_acfd2c9be692e53c31d8cca516dd66664}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!efb@{efb}} +\index{efb@{efb}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{efb}{efb}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::efb} + + + +Echo feedback register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ae5cbfb7f7e7789df7cc807625339dd93}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ae5cbfb7f7e7789df7cc807625339dd93}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx@{endx}} +\index{endx@{endx}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx}{endx}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a83f58b138e7b4c5c9ddeaa838b2f54e4}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a83f58b138e7b4c5c9ddeaa838b2f54e4}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx0@{endx0}} +\index{endx0@{endx0}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx0}{endx0}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx0} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a68d3f1d3872f0a97c7f179321d09e9c4}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a68d3f1d3872f0a97c7f179321d09e9c4}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx1@{endx1}} +\index{endx1@{endx1}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx1}{endx1}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx1} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_aae6bbf3ce13666730f57deddff8b9e49}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_aae6bbf3ce13666730f57deddff8b9e49}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx2@{endx2}} +\index{endx2@{endx2}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx2}{endx2}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx2} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_abb0a0cf1786a713768a9b981a140000d}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_abb0a0cf1786a713768a9b981a140000d}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx3@{endx3}} +\index{endx3@{endx3}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx3}{endx3}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx3} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_aa12b2ad28faa3a63161b54c7509c4db6}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_aa12b2ad28faa3a63161b54c7509c4db6}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx4@{endx4}} +\index{endx4@{endx4}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx4}{endx4}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx4} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a1414fcfbe12d2e0a8c94b65682c405c4}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a1414fcfbe12d2e0a8c94b65682c405c4}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx5@{endx5}} +\index{endx5@{endx5}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx5}{endx5}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx5} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a852042eefaf7fbe8b7a21c714af034e2}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a852042eefaf7fbe8b7a21c714af034e2}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx6@{endx6}} +\index{endx6@{endx6}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx6}{endx6}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx6} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a697357cf588ccc77fe7d0ff11f1d5da9}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a697357cf588ccc77fe7d0ff11f1d5da9}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!endx7@{endx7}} +\index{endx7@{endx7}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{endx7}{endx7}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::endx7} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_af2f0396216337c9f50b6d8223c62e7cc}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_af2f0396216337c9f50b6d8223c62e7cc}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!envx@{envx}} +\index{envx@{envx}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{envx}{envx}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::envx\mbox{[}8\mbox{]}} + + + +Envelope value register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_af8f5c990b36d2a3ec05678f0834986d6}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_af8f5c990b36d2a3ec05678f0834986d6}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon@{eon}} +\index{eon@{eon}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon}{eon}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a3083112a0270c55a254abb9981f0e895}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a3083112a0270c55a254abb9981f0e895}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon0@{eon0}} +\index{eon0@{eon0}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon0}{eon0}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon0} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a42ac52ce16e41c974c187aa27a0561ab}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a42ac52ce16e41c974c187aa27a0561ab}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon1@{eon1}} +\index{eon1@{eon1}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon1}{eon1}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon1} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ae69e81ec08eaa10ebf3ab10a5e262aff}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ae69e81ec08eaa10ebf3ab10a5e262aff}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon2@{eon2}} +\index{eon2@{eon2}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon2}{eon2}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon2} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a588086d4005b63a7e903b77a9c5bf91d}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a588086d4005b63a7e903b77a9c5bf91d}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon3@{eon3}} +\index{eon3@{eon3}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon3}{eon3}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon3} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a7746589fe1dd3185c957dfba5da33230}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a7746589fe1dd3185c957dfba5da33230}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon4@{eon4}} +\index{eon4@{eon4}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon4}{eon4}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon4} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a0692ab81b5dddee27b9ba80496a82e74}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a0692ab81b5dddee27b9ba80496a82e74}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon5@{eon5}} +\index{eon5@{eon5}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon5}{eon5}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon5} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a5a61f2e1c0767c0caf2fb40a8f951329}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a5a61f2e1c0767c0caf2fb40a8f951329}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon6@{eon6}} +\index{eon6@{eon6}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon6}{eon6}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon6} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a884741c9e178ab86877c1653c81c1460}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a884741c9e178ab86877c1653c81c1460}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!eon7@{eon7}} +\index{eon7@{eon7}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{eon7}{eon7}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::eon7} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_adf37f88987247e451a017198d1c87504}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_adf37f88987247e451a017198d1c87504}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!esa@{esa}} +\index{esa@{esa}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{esa}{esa}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::esa} + + + +Echo data start register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a58048883806a4caea161c48df97e36c4}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a58048883806a4caea161c48df97e36c4}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!evolL@{evolL}} +\index{evolL@{evolL}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{evolL}{evolL}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::evolL} + + + +Left output of the Echo Volume register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a896493314bf91714d001f224190296ac}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a896493314bf91714d001f224190296ac}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!evolR@{evolR}} +\index{evolR@{evolR}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{evolR}{evolR}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::evolR} + + + +Right output of the Echo Volume register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a9a569faa711803b6c94121e928963027}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a9a569faa711803b6c94121e928963027}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!flg@{flg}} +\index{flg@{flg}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{flg}{flg}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::flg} + + + +Flags register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a3b3d357a3fe6dd6c7c43b99db8ee2a92}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a3b3d357a3fe6dd6c7c43b99db8ee2a92}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!gain@{gain}} +\index{gain@{gain}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{gain}{gain}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::gain\mbox{[}8\mbox{]}} + + + +Gain register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a50c2233088c73fd28e598646894c6004}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a50c2233088c73fd28e598646894c6004}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof@{kof}} +\index{kof@{kof}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof}{kof}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a8cbc9475afa42d7f935bd697fc7c2d3a}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a8cbc9475afa42d7f935bd697fc7c2d3a}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof0@{kof0}} +\index{kof0@{kof0}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof0}{kof0}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof0} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a83c47d7a5b85e3fd912873f12dadc3dd}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a83c47d7a5b85e3fd912873f12dadc3dd}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof1@{kof1}} +\index{kof1@{kof1}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof1}{kof1}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof1} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_add71bb66089a9f48028e0650e95edd64}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_add71bb66089a9f48028e0650e95edd64}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof2@{kof2}} +\index{kof2@{kof2}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof2}{kof2}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof2} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a3ba0e21135975d035ffd4d0c95a3ca8a}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a3ba0e21135975d035ffd4d0c95a3ca8a}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof3@{kof3}} +\index{kof3@{kof3}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof3}{kof3}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof3} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a9302fd6110cb1bbcb462bbba6469df5d}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a9302fd6110cb1bbcb462bbba6469df5d}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof4@{kof4}} +\index{kof4@{kof4}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof4}{kof4}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof4} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a224365506eac0fcc681b055b0337d09e}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a224365506eac0fcc681b055b0337d09e}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof5@{kof5}} +\index{kof5@{kof5}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof5}{kof5}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof5} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a29b3e5299432ba23a27e278a9596180a}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a29b3e5299432ba23a27e278a9596180a}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof6@{kof6}} +\index{kof6@{kof6}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof6}{kof6}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof6} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ab12db7290eaa8a73fbd7701366ab7396}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ab12db7290eaa8a73fbd7701366ab7396}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kof7@{kof7}} +\index{kof7@{kof7}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kof7}{kof7}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kof7} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a72a5fa9ecb815a960a55aee0f3d67768}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a72a5fa9ecb815a960a55aee0f3d67768}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon@{kon}} +\index{kon@{kon}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon}{kon}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a243e2e3d951f80d1f812fb3d4c2f1ccd}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a243e2e3d951f80d1f812fb3d4c2f1ccd}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon0@{kon0}} +\index{kon0@{kon0}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon0}{kon0}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon0} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a2b18e66f7222eb7cfd3e47e874cecbf7}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a2b18e66f7222eb7cfd3e47e874cecbf7}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon1@{kon1}} +\index{kon1@{kon1}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon1}{kon1}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon1} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a2477c8198e3da5bf1e0048081a246c43}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a2477c8198e3da5bf1e0048081a246c43}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon2@{kon2}} +\index{kon2@{kon2}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon2}{kon2}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon2} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a00874469bc130a2435ade764d2b8e707}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a00874469bc130a2435ade764d2b8e707}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon3@{kon3}} +\index{kon3@{kon3}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon3}{kon3}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon3} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a38abd188c650a1e738420950aa97d600}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a38abd188c650a1e738420950aa97d600}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon4@{kon4}} +\index{kon4@{kon4}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon4}{kon4}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon4} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_aadd76543d0372b61a2cec59bb67447f8}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_aadd76543d0372b61a2cec59bb67447f8}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon5@{kon5}} +\index{kon5@{kon5}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon5}{kon5}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon5} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_aa51606c1853630d0058a57094266cd4c}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_aa51606c1853630d0058a57094266cd4c}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon6@{kon6}} +\index{kon6@{kon6}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon6}{kon6}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon6} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a06e2d04314aa02e71167b52af5ed6f1c}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a06e2d04314aa02e71167b52af5ed6f1c}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!kon7@{kon7}} +\index{kon7@{kon7}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{kon7}{kon7}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::kon7} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ade167eb865eead13b10bfdf106c52c0b}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ade167eb865eead13b10bfdf106c52c0b}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!mvolL@{mvolL}} +\index{mvolL@{mvolL}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{mvolL}{mvolL}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::mvolL} + + + +Left output of the Main Volume register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a553b4df8935705f2d3be22284e05f74c}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a553b4df8935705f2d3be22284e05f74c}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!mvolR@{mvolR}} +\index{mvolR@{mvolR}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{mvolR}{mvolR}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::mvolR} + + + +Right output of the Main Volume register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_adf046da90f069771a3122129bc8ec60d}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_adf046da90f069771a3122129bc8ec60d}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non@{non}} +\index{non@{non}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non}{non}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ad48424c8e211768448ada47c96c9cacf}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ad48424c8e211768448ada47c96c9cacf}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non0@{non0}} +\index{non0@{non0}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non0}{non0}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non0} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a3407a042f1a15d8877c173050bf67670}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a3407a042f1a15d8877c173050bf67670}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non1@{non1}} +\index{non1@{non1}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non1}{non1}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non1} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a3c64a57c72b01cf648aa60c147401262}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a3c64a57c72b01cf648aa60c147401262}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non2@{non2}} +\index{non2@{non2}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non2}{non2}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non2} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a0077dd79b4de20a71c1739be72ae0273}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a0077dd79b4de20a71c1739be72ae0273}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non3@{non3}} +\index{non3@{non3}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non3}{non3}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non3} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a43dd5603665828c4167a45f2c8f6f73b}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a43dd5603665828c4167a45f2c8f6f73b}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non4@{non4}} +\index{non4@{non4}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non4}{non4}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non4} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ab0e7fee76fe745c1fe6522c89ea83c58}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ab0e7fee76fe745c1fe6522c89ea83c58}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non5@{non5}} +\index{non5@{non5}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non5}{non5}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non5} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a260bf9070cfedafb53947708afaff946}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a260bf9070cfedafb53947708afaff946}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non6@{non6}} +\index{non6@{non6}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non6}{non6}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non6} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ab477f88562bd6438d4e3abb1420479c3}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ab477f88562bd6438d4e3abb1420479c3}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!non7@{non7}} +\index{non7@{non7}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{non7}{non7}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::non7} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a2d520792c825b90104a7e96834f73ff4}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a2d520792c825b90104a7e96834f73ff4}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!outx@{outx}} +\index{outx@{outx}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{outx}{outx}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::outx\mbox{[}8\mbox{]}} + + + +Wave height register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a3d5ca78629decaf03bada20c654f26b9}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a3d5ca78629decaf03bada20c654f26b9}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pitchH@{pitchH}} +\index{pitchH@{pitchH}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pitchH}{pitchH}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pitchH\mbox{[}8\mbox{]}} + + + +Higher 8 bits of pitch register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a5a89ce573a1b57f00caaadbda93ce513}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a5a89ce573a1b57f00caaadbda93ce513}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pitchL@{pitchL}} +\index{pitchL@{pitchL}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pitchL}{pitchL}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pitchL\mbox{[}8\mbox{]}} + + + +Lower 8 bits of pitch register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a486b2071a96be439cd1fb6a231b9702a}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a486b2071a96be439cd1fb6a231b9702a}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pmon@{pmon}} +\index{pmon@{pmon}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pmon}{pmon}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pmon} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_aa1da68fd55703c11cfd50460ab792bc6}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_aa1da68fd55703c11cfd50460ab792bc6}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pmon1@{pmon1}} +\index{pmon1@{pmon1}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pmon1}{pmon1}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pmon1} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a414d6e1c5f18c9e10eb38c283c2131c4}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a414d6e1c5f18c9e10eb38c283c2131c4}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pmon2@{pmon2}} +\index{pmon2@{pmon2}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pmon2}{pmon2}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pmon2} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_af936a6561397ec74ad1e487b2c0666af}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_af936a6561397ec74ad1e487b2c0666af}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pmon3@{pmon3}} +\index{pmon3@{pmon3}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pmon3}{pmon3}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pmon3} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a7d5ee13161d35dab8951cd13baea4d85}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a7d5ee13161d35dab8951cd13baea4d85}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pmon4@{pmon4}} +\index{pmon4@{pmon4}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pmon4}{pmon4}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pmon4} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a0736d60c98ca1b9c56fa4b44da1b1567}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a0736d60c98ca1b9c56fa4b44da1b1567}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pmon5@{pmon5}} +\index{pmon5@{pmon5}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pmon5}{pmon5}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pmon5} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ae08b3327951a20b16f54f742069399db}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ae08b3327951a20b16f54f742069399db}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pmon6@{pmon6}} +\index{pmon6@{pmon6}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pmon6}{pmon6}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pmon6} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a177391cea845d713705ae051961aeec8}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a177391cea845d713705ae051961aeec8}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!pmon7@{pmon7}} +\index{pmon7@{pmon7}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{pmon7}{pmon7}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::pmon7} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a511e3ef820c4d64a00a9414d4818844e}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a511e3ef820c4d64a00a9414d4818844e}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!srcn@{srcn}} +\index{srcn@{srcn}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{srcn}{srcn}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::srcn\mbox{[}8\mbox{]}} + + + +Source number register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a977a328251dddd0af76d21aa38187951}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a977a328251dddd0af76d21aa38187951}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!unused@{unused}} +\index{unused@{unused}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{unused}{unused}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::unused} + + + +Not used register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_ac43ff7cb2cb4dd2337dfe9bda244ef20}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_ac43ff7cb2cb4dd2337dfe9bda244ef20}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!volL@{volL}} +\index{volL@{volL}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{volL}{volL}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::volL\mbox{[}8\mbox{]}} + + + +Left channel volume register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1DSP_1_1Registers_a7af03a024d289ed3bdda0bb85f134b7f}\label{structComSquare_1_1APU_1_1DSP_1_1Registers_a7af03a024d289ed3bdda0bb85f134b7f}} +\index{ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}!volR@{volR}} +\index{volR@{volR}!ComSquare::APU::DSP::Registers@{ComSquare::APU::DSP::Registers}} +\doxysubsubsection{\texorpdfstring{volR}{volR}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+D\+S\+P\+::\+Registers\+::volR\mbox{[}8\mbox{]}} + + + +Left channel volume register. + + + +The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+D\+S\+P/\mbox{\hyperlink{DSP_8hpp}{D\+S\+P.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.md5 b/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.md5 new file mode 100644 index 0000000..cdf504a --- /dev/null +++ b/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.md5 @@ -0,0 +1 @@ +ae6bfa098d3cd31ffa5b7674900e8301 \ No newline at end of file diff --git a/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.pdf b/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.pdf new file mode 100644 index 0000000..55cbe21 Binary files /dev/null and b/docs/latex/structComSquare_1_1APU_1_1DSP_1_1Registers__coll__graph.pdf differ diff --git a/docs/latex/structComSquare_1_1APU_1_1InternalRegisters.tex b/docs/latex/structComSquare_1_1APU_1_1InternalRegisters.tex new file mode 100644 index 0000000..fc315c9 --- /dev/null +++ b/docs/latex/structComSquare_1_1APU_1_1InternalRegisters.tex @@ -0,0 +1,140 @@ +\hypertarget{structComSquare_1_1APU_1_1InternalRegisters}{}\doxysection{Com\+Square\+::A\+PU\+::Internal\+Registers Struct Reference} +\label{structComSquare_1_1APU_1_1InternalRegisters}\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} + + +{\ttfamily \#include $<$A\+P\+U.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::A\+PU\+::Internal\+Registers\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=223pt]{structComSquare_1_1APU_1_1InternalRegisters__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +union \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}{psw}} +\begin{DoxyCompactList}\small\item\em Program Status Word register. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters_a5b3fa47e6776aaffdee96ff8aeaa5733}{x}} +\begin{DoxyCompactList}\small\item\em The X index register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters_a4e20011d86fc45e3c903f8ee24eb9e8f}{a}}\\ +\>\>\>{\em The Accumulator register. }\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters_afa933d17a9a29e940fc173655fc2306e}{y}}\\ +\>\>\>{\em The Y Index register. }\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters_ad5543623e5cd12a16a5cda69e8426607}{ya}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The YA register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters_aca9d089a6868f8d03d4bfc1b8b9ee44e}{sp}} +\begin{DoxyCompactList}\small\item\em The Stack pointer register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters_a75be9aa7fa2778d061a07921d854d402}{pcl}}\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters_a45c2751b6ced06d2aa5b3ee6e936c017}{pch}}\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1APU_1_1InternalRegisters_a069c88e8534ac735bbf36938fb64d8dc}{pc}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Program counter register. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_afa71acaadff32354b4ec07e2061ecd7c}\label{structComSquare_1_1APU_1_1InternalRegisters_afa71acaadff32354b4ec07e2061ecd7c}} +\doxysubsubsection{\texorpdfstring{"@1}{@1}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The YA register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_aac6a6872e5f157ea821ac2953c7f3e86}\label{structComSquare_1_1APU_1_1InternalRegisters_aac6a6872e5f157ea821ac2953c7f3e86}} +\doxysubsubsection{\texorpdfstring{"@3}{@3}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Program counter register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_a4e20011d86fc45e3c903f8ee24eb9e8f}\label{structComSquare_1_1APU_1_1InternalRegisters_a4e20011d86fc45e3c903f8ee24eb9e8f}} +\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}!a@{a}} +\index{a@{a}!ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{a}{a}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::a} + + + +The Accumulator register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_a069c88e8534ac735bbf36938fb64d8dc}\label{structComSquare_1_1APU_1_1InternalRegisters_a069c88e8534ac735bbf36938fb64d8dc}} +\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}!pc@{pc}} +\index{pc@{pc}!ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{pc}{pc}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::pc} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_a45c2751b6ced06d2aa5b3ee6e936c017}\label{structComSquare_1_1APU_1_1InternalRegisters_a45c2751b6ced06d2aa5b3ee6e936c017}} +\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}!pch@{pch}} +\index{pch@{pch}!ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{pch}{pch}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::pch} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_a75be9aa7fa2778d061a07921d854d402}\label{structComSquare_1_1APU_1_1InternalRegisters_a75be9aa7fa2778d061a07921d854d402}} +\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}!pcl@{pcl}} +\index{pcl@{pcl}!ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{pcl}{pcl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::pcl} + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_aca9d089a6868f8d03d4bfc1b8b9ee44e}\label{structComSquare_1_1APU_1_1InternalRegisters_aca9d089a6868f8d03d4bfc1b8b9ee44e}} +\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}!sp@{sp}} +\index{sp@{sp}!ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{sp}{sp}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::sp} + + + +The Stack pointer register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_a5b3fa47e6776aaffdee96ff8aeaa5733}\label{structComSquare_1_1APU_1_1InternalRegisters_a5b3fa47e6776aaffdee96ff8aeaa5733}} +\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}!x@{x}} +\index{x@{x}!ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{x}{x}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::x} + + + +The X index register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_afa933d17a9a29e940fc173655fc2306e}\label{structComSquare_1_1APU_1_1InternalRegisters_afa933d17a9a29e940fc173655fc2306e}} +\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}!y@{y}} +\index{y@{y}!ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{y}{y}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::y} + + + +The Y Index register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1InternalRegisters_ad5543623e5cd12a16a5cda69e8426607}\label{structComSquare_1_1APU_1_1InternalRegisters_ad5543623e5cd12a16a5cda69e8426607}} +\index{ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}!ya@{ya}} +\index{ya@{ya}!ComSquare::APU::InternalRegisters@{ComSquare::APU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{ya}{ya}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::ya} + + + +The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+A\+P\+U/\mbox{\hyperlink{APU_8hpp}{A\+P\+U.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.md5 b/docs/latex/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.md5 new file mode 100644 index 0000000..cde1e1f --- /dev/null +++ b/docs/latex/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.md5 @@ -0,0 +1 @@ +135b684196981900f34ecfd43cd70753 \ No newline at end of file diff --git a/docs/latex/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.pdf b/docs/latex/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.pdf new file mode 100644 index 0000000..093fb04 Binary files /dev/null and b/docs/latex/structComSquare_1_1APU_1_1InternalRegisters__coll__graph.pdf differ diff --git a/docs/latex/structComSquare_1_1APU_1_1Registers.tex b/docs/latex/structComSquare_1_1APU_1_1Registers.tex new file mode 100644 index 0000000..af8ec63 --- /dev/null +++ b/docs/latex/structComSquare_1_1APU_1_1Registers.tex @@ -0,0 +1,219 @@ +\hypertarget{structComSquare_1_1APU_1_1Registers}{}\doxysection{Com\+Square\+::A\+PU\+::Registers Struct Reference} +\label{structComSquare_1_1APU_1_1Registers}\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}} + + +{\ttfamily \#include $<$A\+P\+U.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::A\+PU\+::Registers\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=231pt]{structComSquare_1_1APU_1_1Registers__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_abdfe3b23ea43931f53f9f66b83ea9129}{unknown}} +\begin{DoxyCompactList}\small\item\em An undocumented register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a1585ec8bcac768a022fedd51055bb880}{ctrlreg}} +\begin{DoxyCompactList}\small\item\em Control Register register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_ae047df53c9430cdf6f597fb9ff9c2cd9}{dspreg\+Addr}} +\begin{DoxyCompactList}\small\item\em \mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{D\+SP}} Register Address register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_abb9147763fef0f13c5e3773efd38fe0a}{dspreg\+Data}} +\begin{DoxyCompactList}\small\item\em \mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{D\+SP}} Register data register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a7596aa3a3d238924fb36b674a5b29723}{port0}} +\begin{DoxyCompactList}\small\item\em Port 0 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_aff7ac077d11b5cb170de27aa242d47d4}{port1}} +\begin{DoxyCompactList}\small\item\em Port 1 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a61577de367bc230163586c46d4959e9d}{port2}} +\begin{DoxyCompactList}\small\item\em Port 2 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a9661edea32acb0e434aa08cc4451a108}{port3}} +\begin{DoxyCompactList}\small\item\em Port 3 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a1b8880642a44bc70c8fa4703390c69e5}{regmem1}} +\begin{DoxyCompactList}\small\item\em Regular \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a796c629e166e6a1dc1853b33556f83fa}{regmem2}} +\begin{DoxyCompactList}\small\item\em Another Regular \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_ad0c1fb4090040f8bf28ecef922f88e92}{timer0}} +\begin{DoxyCompactList}\small\item\em Timer-\/0 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a63d92eb8b1bcc693d7afcb587230f1d1}{timer1}} +\begin{DoxyCompactList}\small\item\em Timer-\/1 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a1707b3935184f283f0270526773d450b}{timer2}} +\begin{DoxyCompactList}\small\item\em Timer-\/2 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a0e72e8ea66b03c6a05b827a3b398f6fe}{counter0}} +\begin{DoxyCompactList}\small\item\em Counter-\/0 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_ac8a31fa1b2989fb34f5d167edf737b15}{counter1}} +\begin{DoxyCompactList}\small\item\em Counter-\/1 register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1APU_1_1Registers_a888f86198d592c702cdc1c25fbe0e3f5}{counter2}} +\begin{DoxyCompactList}\small\item\em Counter-\/2 register. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a0e72e8ea66b03c6a05b827a3b398f6fe}\label{structComSquare_1_1APU_1_1Registers_a0e72e8ea66b03c6a05b827a3b398f6fe}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!counter0@{counter0}} +\index{counter0@{counter0}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{counter0}{counter0}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::counter0} + + + +Counter-\/0 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_ac8a31fa1b2989fb34f5d167edf737b15}\label{structComSquare_1_1APU_1_1Registers_ac8a31fa1b2989fb34f5d167edf737b15}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!counter1@{counter1}} +\index{counter1@{counter1}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{counter1}{counter1}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::counter1} + + + +Counter-\/1 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a888f86198d592c702cdc1c25fbe0e3f5}\label{structComSquare_1_1APU_1_1Registers_a888f86198d592c702cdc1c25fbe0e3f5}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!counter2@{counter2}} +\index{counter2@{counter2}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{counter2}{counter2}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::counter2} + + + +Counter-\/2 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a1585ec8bcac768a022fedd51055bb880}\label{structComSquare_1_1APU_1_1Registers_a1585ec8bcac768a022fedd51055bb880}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!ctrlreg@{ctrlreg}} +\index{ctrlreg@{ctrlreg}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{ctrlreg}{ctrlreg}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::ctrlreg} + + + +Control Register register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_ae047df53c9430cdf6f597fb9ff9c2cd9}\label{structComSquare_1_1APU_1_1Registers_ae047df53c9430cdf6f597fb9ff9c2cd9}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!dspregAddr@{dspregAddr}} +\index{dspregAddr@{dspregAddr}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{dspregAddr}{dspregAddr}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::dspreg\+Addr} + + + +\mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{D\+SP}} Register Address register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_abb9147763fef0f13c5e3773efd38fe0a}\label{structComSquare_1_1APU_1_1Registers_abb9147763fef0f13c5e3773efd38fe0a}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!dspregData@{dspregData}} +\index{dspregData@{dspregData}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{dspregData}{dspregData}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::dspreg\+Data} + + + +\mbox{\hyperlink{namespaceComSquare_1_1APU_1_1DSP}{D\+SP}} Register data register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a7596aa3a3d238924fb36b674a5b29723}\label{structComSquare_1_1APU_1_1Registers_a7596aa3a3d238924fb36b674a5b29723}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!port0@{port0}} +\index{port0@{port0}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{port0}{port0}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::port0} + + + +Port 0 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_aff7ac077d11b5cb170de27aa242d47d4}\label{structComSquare_1_1APU_1_1Registers_aff7ac077d11b5cb170de27aa242d47d4}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!port1@{port1}} +\index{port1@{port1}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{port1}{port1}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::port1} + + + +Port 1 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a61577de367bc230163586c46d4959e9d}\label{structComSquare_1_1APU_1_1Registers_a61577de367bc230163586c46d4959e9d}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!port2@{port2}} +\index{port2@{port2}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{port2}{port2}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::port2} + + + +Port 2 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a9661edea32acb0e434aa08cc4451a108}\label{structComSquare_1_1APU_1_1Registers_a9661edea32acb0e434aa08cc4451a108}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!port3@{port3}} +\index{port3@{port3}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{port3}{port3}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::port3} + + + +Port 3 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a1b8880642a44bc70c8fa4703390c69e5}\label{structComSquare_1_1APU_1_1Registers_a1b8880642a44bc70c8fa4703390c69e5}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!regmem1@{regmem1}} +\index{regmem1@{regmem1}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{regmem1}{regmem1}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::regmem1} + + + +Regular \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a796c629e166e6a1dc1853b33556f83fa}\label{structComSquare_1_1APU_1_1Registers_a796c629e166e6a1dc1853b33556f83fa}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!regmem2@{regmem2}} +\index{regmem2@{regmem2}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{regmem2}{regmem2}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::regmem2} + + + +Another Regular \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_ad0c1fb4090040f8bf28ecef922f88e92}\label{structComSquare_1_1APU_1_1Registers_ad0c1fb4090040f8bf28ecef922f88e92}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!timer0@{timer0}} +\index{timer0@{timer0}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{timer0}{timer0}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::timer0} + + + +Timer-\/0 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a63d92eb8b1bcc693d7afcb587230f1d1}\label{structComSquare_1_1APU_1_1Registers_a63d92eb8b1bcc693d7afcb587230f1d1}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!timer1@{timer1}} +\index{timer1@{timer1}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{timer1}{timer1}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::timer1} + + + +Timer-\/1 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_a1707b3935184f283f0270526773d450b}\label{structComSquare_1_1APU_1_1Registers_a1707b3935184f283f0270526773d450b}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!timer2@{timer2}} +\index{timer2@{timer2}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{timer2}{timer2}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::timer2} + + + +Timer-\/2 register. + +\mbox{\Hypertarget{structComSquare_1_1APU_1_1Registers_abdfe3b23ea43931f53f9f66b83ea9129}\label{structComSquare_1_1APU_1_1Registers_abdfe3b23ea43931f53f9f66b83ea9129}} +\index{ComSquare::APU::Registers@{ComSquare::APU::Registers}!unknown@{unknown}} +\index{unknown@{unknown}!ComSquare::APU::Registers@{ComSquare::APU::Registers}} +\doxysubsubsection{\texorpdfstring{unknown}{unknown}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+A\+P\+U\+::\+Registers\+::unknown} + + + +An undocumented register. + + + +The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+A\+P\+U/\mbox{\hyperlink{APU_8hpp}{A\+P\+U.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/structComSquare_1_1APU_1_1Registers__coll__graph.md5 b/docs/latex/structComSquare_1_1APU_1_1Registers__coll__graph.md5 new file mode 100644 index 0000000..63df88d --- /dev/null +++ b/docs/latex/structComSquare_1_1APU_1_1Registers__coll__graph.md5 @@ -0,0 +1 @@ +ce73e62c32bd654f96f8959c5d6d4883 \ No newline at end of file diff --git a/docs/latex/structComSquare_1_1APU_1_1Registers__coll__graph.pdf b/docs/latex/structComSquare_1_1APU_1_1Registers__coll__graph.pdf new file mode 100644 index 0000000..0a46e3f Binary files /dev/null and b/docs/latex/structComSquare_1_1APU_1_1Registers__coll__graph.pdf differ diff --git a/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters.tex b/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters.tex new file mode 100644 index 0000000..397e769 --- /dev/null +++ b/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters.tex @@ -0,0 +1,395 @@ +\hypertarget{structComSquare_1_1CPU_1_1InternalRegisters}{}\doxysection{Com\+Square\+::C\+PU\+::Internal\+Registers Struct Reference} +\label{structComSquare_1_1CPU_1_1InternalRegisters}\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} + + +Struct containing internal registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. + + + + +{\ttfamily \#include $<$C\+P\+U.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::C\+PU\+::Internal\+Registers\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=223pt]{structComSquare_1_1CPU_1_1InternalRegisters__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a45c471c6c5cef4d6a117e223b8a19ed1}{nmitimen}} +\begin{DoxyCompactList}\small\item\em Interrupt Enable Register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_afac8a1b505dff6a6aa9416392e469471}{wrio}} +\begin{DoxyCompactList}\small\item\em IO Port Write Register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a0ec804218ae29f8ad4b8019dd78dc38f}{wrmpya}} +\begin{DoxyCompactList}\small\item\em Multiplicand Register A. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a258f0d486b05d1d77f39b3c10f6eaaf5}{wrmpyb}} +\begin{DoxyCompactList}\small\item\em Multiplicand Register B. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_ae98022af2fc7c80062444e9cecf95f0e}{wrdivl}} +\begin{DoxyCompactList}\small\item\em Divisor \& Dividend \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (A -\/ Low) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_aa315eec822cf92ec586c2ba918a36e00}{wrdivh}} +\begin{DoxyCompactList}\small\item\em Divisor \& Dividend \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (A -\/ High) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_aa1466fa14182549898886e3eb3074f36}{wrdivb}} +\begin{DoxyCompactList}\small\item\em Divisor \& Dividend \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (B) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a030f0f2142ee49187735f82876bd12e8}{htimel}} +\begin{DoxyCompactList}\small\item\em I\+RQ Timer \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Horizontal -\/ Low) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a538141acc2e0eeac8f1e801940929539}{htimeh}} +\begin{DoxyCompactList}\small\item\em I\+RQ Timer \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Horizontal -\/ High) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a6262d0ba292853c4232d24b6142e1acf}{vtimel}} +\begin{DoxyCompactList}\small\item\em I\+RQ Timer \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Vertical -\/ Low) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a24e773242680bd43e8d6a0fcd2e1ea48}{vtimeh}} +\begin{DoxyCompactList}\small\item\em I\+RQ Timer \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Vertical -\/ High) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_ab51577c6d3509770c1144e45932ee38c}{mdmaen}} +\begin{DoxyCompactList}\small\item\em D\+MA Enable Register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_af2f3e7f51a783a517b71639de897fc3c}{hdmaen}} +\begin{DoxyCompactList}\small\item\em H\+D\+MA Enable Register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_aa3dda181d78b6bcd50057d83c97ecb2c}{memsel}} +\begin{DoxyCompactList}\small\item\em R\+OM Speed Register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_ac49c0aaf5eb44afe572930b1bfe13c00}{rdnmi}} +\begin{DoxyCompactList}\small\item\em Interrupt Flag \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}}. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a0058417dd2f115ffd67c909b227552f8}{timeup}} +\begin{DoxyCompactList}\small\item\em Interrupt Flag \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} -\/ Time\+Up. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_ac04e82f935ec316b6d2433dea7df36f0}{hvbjoy}} +\begin{DoxyCompactList}\small\item\em \mbox{\hyperlink{namespaceComSquare_1_1PPU}{P\+PU}} Status Register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_acd1644bf64088f00ebeb2d62fe90fbe2}{rdio}} +\begin{DoxyCompactList}\small\item\em IO Port Read Register. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a18401a7dbfe4784b6367623cac251a5e}{rddivl}} +\begin{DoxyCompactList}\small\item\em Divide Result \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (can sometimes be used as multiplication result register) -\/ L\+OW. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a70602e356a792a14a1b638d692556e8c}{rddivh}} +\begin{DoxyCompactList}\small\item\em Divide Result \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (can sometimes be used as multiplication result register) -\/ H\+I\+GH. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a87261625195bb3f38db9354a29334ddf}{rdmpyl}} +\begin{DoxyCompactList}\small\item\em Multiplication Result \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (can sometimes be used as divide result register) -\/ L\+OW. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a79c946893be3148b0c72d9da2c8f3428}{rdmpyh}} +\begin{DoxyCompactList}\small\item\em Multiplication Result \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (can sometimes be used as divide result register) -\/ H\+I\+GH. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_ab17acbbf524b6bfb9a8006ce87e9148b}{joy1l}} +\begin{DoxyCompactList}\small\item\em Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 1 -\/ Low) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a5a252a845daf5137bb251933a5812265}{joy1h}} +\begin{DoxyCompactList}\small\item\em Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 1 -\/ High) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a85d9e842e61f9c4ef519b42b4b8748be}{joy2l}} +\begin{DoxyCompactList}\small\item\em Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 2 -\/ Low) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_af37f63c18abd719f6a7f6b2cd009b9e5}{joy2h}} +\begin{DoxyCompactList}\small\item\em Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 2 -\/ High) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_ad64b7d047996ea04e65e4e84f341af37}{joy3l}} +\begin{DoxyCompactList}\small\item\em Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 3 -\/ Low) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_aaa5a1939600968d066561ea8056cfca9}{joy3h}} +\begin{DoxyCompactList}\small\item\em Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 3 -\/ High) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a85afe00843e4f9616fa106c3ae610919}{joy4l}} +\begin{DoxyCompactList}\small\item\em Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 4 -\/ Low) \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1InternalRegisters_a6bb83a780752963fefbe50be5d3a026d}{joy4h}} +\begin{DoxyCompactList}\small\item\em Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 4 -\/ High) \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Struct containing internal registers of the \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_af2f3e7f51a783a517b71639de897fc3c}\label{structComSquare_1_1CPU_1_1InternalRegisters_af2f3e7f51a783a517b71639de897fc3c}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!hdmaen@{hdmaen}} +\index{hdmaen@{hdmaen}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{hdmaen}{hdmaen}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::hdmaen} + + + +H\+D\+MA Enable Register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a538141acc2e0eeac8f1e801940929539}\label{structComSquare_1_1CPU_1_1InternalRegisters_a538141acc2e0eeac8f1e801940929539}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!htimeh@{htimeh}} +\index{htimeh@{htimeh}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{htimeh}{htimeh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::htimeh} + + + +I\+RQ Timer \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Horizontal -\/ High) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a030f0f2142ee49187735f82876bd12e8}\label{structComSquare_1_1CPU_1_1InternalRegisters_a030f0f2142ee49187735f82876bd12e8}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!htimel@{htimel}} +\index{htimel@{htimel}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{htimel}{htimel}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::htimel} + + + +I\+RQ Timer \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Horizontal -\/ Low) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_ac04e82f935ec316b6d2433dea7df36f0}\label{structComSquare_1_1CPU_1_1InternalRegisters_ac04e82f935ec316b6d2433dea7df36f0}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!hvbjoy@{hvbjoy}} +\index{hvbjoy@{hvbjoy}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{hvbjoy}{hvbjoy}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::hvbjoy} + + + +\mbox{\hyperlink{namespaceComSquare_1_1PPU}{P\+PU}} Status Register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a5a252a845daf5137bb251933a5812265}\label{structComSquare_1_1CPU_1_1InternalRegisters_a5a252a845daf5137bb251933a5812265}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!joy1h@{joy1h}} +\index{joy1h@{joy1h}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{joy1h}{joy1h}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::joy1h} + + + +Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 1 -\/ High) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_ab17acbbf524b6bfb9a8006ce87e9148b}\label{structComSquare_1_1CPU_1_1InternalRegisters_ab17acbbf524b6bfb9a8006ce87e9148b}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!joy1l@{joy1l}} +\index{joy1l@{joy1l}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{joy1l}{joy1l}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::joy1l} + + + +Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 1 -\/ Low) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_af37f63c18abd719f6a7f6b2cd009b9e5}\label{structComSquare_1_1CPU_1_1InternalRegisters_af37f63c18abd719f6a7f6b2cd009b9e5}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!joy2h@{joy2h}} +\index{joy2h@{joy2h}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{joy2h}{joy2h}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::joy2h} + + + +Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 2 -\/ High) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a85d9e842e61f9c4ef519b42b4b8748be}\label{structComSquare_1_1CPU_1_1InternalRegisters_a85d9e842e61f9c4ef519b42b4b8748be}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!joy2l@{joy2l}} +\index{joy2l@{joy2l}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{joy2l}{joy2l}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::joy2l} + + + +Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 2 -\/ Low) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_aaa5a1939600968d066561ea8056cfca9}\label{structComSquare_1_1CPU_1_1InternalRegisters_aaa5a1939600968d066561ea8056cfca9}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!joy3h@{joy3h}} +\index{joy3h@{joy3h}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{joy3h}{joy3h}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::joy3h} + + + +Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 3 -\/ High) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_ad64b7d047996ea04e65e4e84f341af37}\label{structComSquare_1_1CPU_1_1InternalRegisters_ad64b7d047996ea04e65e4e84f341af37}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!joy3l@{joy3l}} +\index{joy3l@{joy3l}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{joy3l}{joy3l}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::joy3l} + + + +Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 3 -\/ Low) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a6bb83a780752963fefbe50be5d3a026d}\label{structComSquare_1_1CPU_1_1InternalRegisters_a6bb83a780752963fefbe50be5d3a026d}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!joy4h@{joy4h}} +\index{joy4h@{joy4h}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{joy4h}{joy4h}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::joy4h} + + + +Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 4 -\/ High) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a85afe00843e4f9616fa106c3ae610919}\label{structComSquare_1_1CPU_1_1InternalRegisters_a85afe00843e4f9616fa106c3ae610919}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!joy4l@{joy4l}} +\index{joy4l@{joy4l}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{joy4l}{joy4l}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::joy4l} + + + +Controller Port Data \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Pad 4 -\/ Low) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_ab51577c6d3509770c1144e45932ee38c}\label{structComSquare_1_1CPU_1_1InternalRegisters_ab51577c6d3509770c1144e45932ee38c}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!mdmaen@{mdmaen}} +\index{mdmaen@{mdmaen}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{mdmaen}{mdmaen}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::mdmaen} + + + +D\+MA Enable Register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_aa3dda181d78b6bcd50057d83c97ecb2c}\label{structComSquare_1_1CPU_1_1InternalRegisters_aa3dda181d78b6bcd50057d83c97ecb2c}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!memsel@{memsel}} +\index{memsel@{memsel}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{memsel}{memsel}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::memsel} + + + +R\+OM Speed Register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a45c471c6c5cef4d6a117e223b8a19ed1}\label{structComSquare_1_1CPU_1_1InternalRegisters_a45c471c6c5cef4d6a117e223b8a19ed1}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!nmitimen@{nmitimen}} +\index{nmitimen@{nmitimen}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{nmitimen}{nmitimen}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::nmitimen} + + + +Interrupt Enable Register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a70602e356a792a14a1b638d692556e8c}\label{structComSquare_1_1CPU_1_1InternalRegisters_a70602e356a792a14a1b638d692556e8c}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!rddivh@{rddivh}} +\index{rddivh@{rddivh}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{rddivh}{rddivh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::rddivh} + + + +Divide Result \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (can sometimes be used as multiplication result register) -\/ H\+I\+GH. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a18401a7dbfe4784b6367623cac251a5e}\label{structComSquare_1_1CPU_1_1InternalRegisters_a18401a7dbfe4784b6367623cac251a5e}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!rddivl@{rddivl}} +\index{rddivl@{rddivl}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{rddivl}{rddivl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::rddivl} + + + +Divide Result \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (can sometimes be used as multiplication result register) -\/ L\+OW. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_acd1644bf64088f00ebeb2d62fe90fbe2}\label{structComSquare_1_1CPU_1_1InternalRegisters_acd1644bf64088f00ebeb2d62fe90fbe2}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!rdio@{rdio}} +\index{rdio@{rdio}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{rdio}{rdio}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::rdio} + + + +IO Port Read Register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a79c946893be3148b0c72d9da2c8f3428}\label{structComSquare_1_1CPU_1_1InternalRegisters_a79c946893be3148b0c72d9da2c8f3428}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!rdmpyh@{rdmpyh}} +\index{rdmpyh@{rdmpyh}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{rdmpyh}{rdmpyh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::rdmpyh} + + + +Multiplication Result \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (can sometimes be used as divide result register) -\/ H\+I\+GH. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a87261625195bb3f38db9354a29334ddf}\label{structComSquare_1_1CPU_1_1InternalRegisters_a87261625195bb3f38db9354a29334ddf}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!rdmpyl@{rdmpyl}} +\index{rdmpyl@{rdmpyl}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{rdmpyl}{rdmpyl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::rdmpyl} + + + +Multiplication Result \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (can sometimes be used as divide result register) -\/ L\+OW. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_ac49c0aaf5eb44afe572930b1bfe13c00}\label{structComSquare_1_1CPU_1_1InternalRegisters_ac49c0aaf5eb44afe572930b1bfe13c00}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!rdnmi@{rdnmi}} +\index{rdnmi@{rdnmi}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{rdnmi}{rdnmi}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::rdnmi} + + + +Interrupt Flag \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}}. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a0058417dd2f115ffd67c909b227552f8}\label{structComSquare_1_1CPU_1_1InternalRegisters_a0058417dd2f115ffd67c909b227552f8}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!timeup@{timeup}} +\index{timeup@{timeup}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{timeup}{timeup}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::timeup} + + + +Interrupt Flag \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} -\/ Time\+Up. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a24e773242680bd43e8d6a0fcd2e1ea48}\label{structComSquare_1_1CPU_1_1InternalRegisters_a24e773242680bd43e8d6a0fcd2e1ea48}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!vtimeh@{vtimeh}} +\index{vtimeh@{vtimeh}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{vtimeh}{vtimeh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::vtimeh} + + + +I\+RQ Timer \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Vertical -\/ High) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a6262d0ba292853c4232d24b6142e1acf}\label{structComSquare_1_1CPU_1_1InternalRegisters_a6262d0ba292853c4232d24b6142e1acf}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!vtimel@{vtimel}} +\index{vtimel@{vtimel}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{vtimel}{vtimel}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::vtimel} + + + +I\+RQ Timer \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (Vertical -\/ Low) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_aa1466fa14182549898886e3eb3074f36}\label{structComSquare_1_1CPU_1_1InternalRegisters_aa1466fa14182549898886e3eb3074f36}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!wrdivb@{wrdivb}} +\index{wrdivb@{wrdivb}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{wrdivb}{wrdivb}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::wrdivb} + + + +Divisor \& Dividend \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (B) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_aa315eec822cf92ec586c2ba918a36e00}\label{structComSquare_1_1CPU_1_1InternalRegisters_aa315eec822cf92ec586c2ba918a36e00}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!wrdivh@{wrdivh}} +\index{wrdivh@{wrdivh}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{wrdivh}{wrdivh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::wrdivh} + + + +Divisor \& Dividend \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (A -\/ High) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_ae98022af2fc7c80062444e9cecf95f0e}\label{structComSquare_1_1CPU_1_1InternalRegisters_ae98022af2fc7c80062444e9cecf95f0e}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!wrdivl@{wrdivl}} +\index{wrdivl@{wrdivl}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{wrdivl}{wrdivl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::wrdivl} + + + +Divisor \& Dividend \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers}{Registers}} (A -\/ Low) + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_afac8a1b505dff6a6aa9416392e469471}\label{structComSquare_1_1CPU_1_1InternalRegisters_afac8a1b505dff6a6aa9416392e469471}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!wrio@{wrio}} +\index{wrio@{wrio}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{wrio}{wrio}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::wrio} + + + +IO Port Write Register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a0ec804218ae29f8ad4b8019dd78dc38f}\label{structComSquare_1_1CPU_1_1InternalRegisters_a0ec804218ae29f8ad4b8019dd78dc38f}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!wrmpya@{wrmpya}} +\index{wrmpya@{wrmpya}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{wrmpya}{wrmpya}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::wrmpya} + + + +Multiplicand Register A. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1InternalRegisters_a258f0d486b05d1d77f39b3c10f6eaaf5}\label{structComSquare_1_1CPU_1_1InternalRegisters_a258f0d486b05d1d77f39b3c10f6eaaf5}} +\index{ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}!wrmpyb@{wrmpyb}} +\index{wrmpyb@{wrmpyb}!ComSquare::CPU::InternalRegisters@{ComSquare::CPU::InternalRegisters}} +\doxysubsubsection{\texorpdfstring{wrmpyb}{wrmpyb}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Internal\+Registers\+::wrmpyb} + + + +Multiplicand Register B. + + + +The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+C\+P\+U/\mbox{\hyperlink{CPU_8hpp}{C\+P\+U.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.md5 b/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.md5 new file mode 100644 index 0000000..67688f0 --- /dev/null +++ b/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.md5 @@ -0,0 +1 @@ +f217f70a153225fe670501683a68b108 \ No newline at end of file diff --git a/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.pdf b/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.pdf new file mode 100644 index 0000000..b0337ad Binary files /dev/null and b/docs/latex/structComSquare_1_1CPU_1_1InternalRegisters__coll__graph.pdf differ diff --git a/docs/latex/structComSquare_1_1CPU_1_1Registers.tex b/docs/latex/structComSquare_1_1CPU_1_1Registers.tex new file mode 100644 index 0000000..c188ffa --- /dev/null +++ b/docs/latex/structComSquare_1_1CPU_1_1Registers.tex @@ -0,0 +1,286 @@ +\hypertarget{structComSquare_1_1CPU_1_1Registers}{}\doxysection{Com\+Square\+::C\+PU\+::Registers Struct Reference} +\label{structComSquare_1_1CPU_1_1Registers}\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} + + +Struct containing registers for the main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. + + + + +{\ttfamily \#include $<$C\+P\+U.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::C\+PU\+::Registers\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=231pt]{structComSquare_1_1CPU_1_1Registers__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Classes} +\begin{DoxyCompactItemize} +\item +union \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p}{p}} +\begin{DoxyCompactList}\small\item\em The Processor status register;. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a7c28866ed95425fd60aa4d8886bb8f9f}{ah}}\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a127b7752795e4498236f7b01e7498227}{al}}\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_aaa8d450e6d4430317e1251313acd11c3}{a}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Accumulator. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_af9d26a8ba0914c825d06db23049433ec}{dbr}} +\begin{DoxyCompactList}\small\item\em The Data Bank Register;. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a1e072edb3788835babe101a874267d84}{dh}}\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_ac691fbd6e61b3aef8b3464a233f85f6d}{dl}}\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_af16407891e835ccbcb0fcb4d19b6081e}{d}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Direct register;. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a4ec672823a8d45a44282cc04e7b34d58}{k}} +\begin{DoxyCompactList}\small\item\em The program banK register;. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a25f950ea41d30db1ec73b8a165e67f51}{pch}}\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a277545ef8503238642198f0386d2faaa}{pcl}}\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a5ff36b8ad167923161b896ae92729111}{pc}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Program Counter;. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a438434360195417afce13220ae856861}{sh}}\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a19f2b4c328874c2207459bf22b2a76ba}{sl}}\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_ad6e42ddbafd6a31ad15df813dee72fa4}{s}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Stack pointer. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_acc0e55548baf2ad8a411eb4f782092c3}{xh}}\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a718d9c2f67935dad3778b0fc03a22030}{xl}}\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a1274f0dbe8e79cd4794f2cc8175a99c3}{x}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The X index register. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>struct \{\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_a324dee252472744f2d72fb4ba86c3da1}{yh}}\\ +\>\>uint8\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_ab1995426df7b4f4500a2576b121824f6}{yl}}\\ +\>\} \\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1CPU_1_1Registers_ac756a49aa063214449d0ef9be3db38cc}{y}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Y index register. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Struct containing registers for the main \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+PU}}. + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a17d53ac661fc1896e91de6d36eeb2617}\label{structComSquare_1_1CPU_1_1Registers_a17d53ac661fc1896e91de6d36eeb2617}} +\doxysubsubsection{\texorpdfstring{"@27}{@27}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Accumulator. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_afb1dda6cfaf0abd9af2c76fdd527e00c}\label{structComSquare_1_1CPU_1_1Registers_afb1dda6cfaf0abd9af2c76fdd527e00c}} +\doxysubsubsection{\texorpdfstring{"@29}{@29}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Direct register;. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a832b5ff64115233d3d36c5fea1e53a3d}\label{structComSquare_1_1CPU_1_1Registers_a832b5ff64115233d3d36c5fea1e53a3d}} +\doxysubsubsection{\texorpdfstring{"@31}{@31}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Program Counter;. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_ae3d184f6fe8247cadea3315843b41531}\label{structComSquare_1_1CPU_1_1Registers_ae3d184f6fe8247cadea3315843b41531}} +\doxysubsubsection{\texorpdfstring{"@33}{@33}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Stack pointer. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_ab7ca804043bf3a2fd559c5f3d52321fd}\label{structComSquare_1_1CPU_1_1Registers_ab7ca804043bf3a2fd559c5f3d52321fd}} +\doxysubsubsection{\texorpdfstring{"@35}{@35}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The X index register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a94dfb4545b2c01368f25875b4658212d}\label{structComSquare_1_1CPU_1_1Registers_a94dfb4545b2c01368f25875b4658212d}} +\doxysubsubsection{\texorpdfstring{"@37}{@37}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Y index register. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_aaa8d450e6d4430317e1251313acd11c3}\label{structComSquare_1_1CPU_1_1Registers_aaa8d450e6d4430317e1251313acd11c3}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!a@{a}} +\index{a@{a}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{a}{a}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::a} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a7c28866ed95425fd60aa4d8886bb8f9f}\label{structComSquare_1_1CPU_1_1Registers_a7c28866ed95425fd60aa4d8886bb8f9f}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!ah@{ah}} +\index{ah@{ah}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{ah}{ah}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::ah} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a127b7752795e4498236f7b01e7498227}\label{structComSquare_1_1CPU_1_1Registers_a127b7752795e4498236f7b01e7498227}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!al@{al}} +\index{al@{al}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{al}{al}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::al} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_af16407891e835ccbcb0fcb4d19b6081e}\label{structComSquare_1_1CPU_1_1Registers_af16407891e835ccbcb0fcb4d19b6081e}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!d@{d}} +\index{d@{d}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{d}{d}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::d} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_af9d26a8ba0914c825d06db23049433ec}\label{structComSquare_1_1CPU_1_1Registers_af9d26a8ba0914c825d06db23049433ec}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!dbr@{dbr}} +\index{dbr@{dbr}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{dbr}{dbr}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::dbr} + + + +The Data Bank Register;. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a1e072edb3788835babe101a874267d84}\label{structComSquare_1_1CPU_1_1Registers_a1e072edb3788835babe101a874267d84}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!dh@{dh}} +\index{dh@{dh}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{dh}{dh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::dh} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_ac691fbd6e61b3aef8b3464a233f85f6d}\label{structComSquare_1_1CPU_1_1Registers_ac691fbd6e61b3aef8b3464a233f85f6d}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!dl@{dl}} +\index{dl@{dl}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{dl}{dl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::dl} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a4ec672823a8d45a44282cc04e7b34d58}\label{structComSquare_1_1CPU_1_1Registers_a4ec672823a8d45a44282cc04e7b34d58}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!k@{k}} +\index{k@{k}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{k}{k}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::k} + + + +The program banK register;. + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a5ff36b8ad167923161b896ae92729111}\label{structComSquare_1_1CPU_1_1Registers_a5ff36b8ad167923161b896ae92729111}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!pc@{pc}} +\index{pc@{pc}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{pc}{pc}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::pc} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a25f950ea41d30db1ec73b8a165e67f51}\label{structComSquare_1_1CPU_1_1Registers_a25f950ea41d30db1ec73b8a165e67f51}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!pch@{pch}} +\index{pch@{pch}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{pch}{pch}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::pch} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a277545ef8503238642198f0386d2faaa}\label{structComSquare_1_1CPU_1_1Registers_a277545ef8503238642198f0386d2faaa}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!pcl@{pcl}} +\index{pcl@{pcl}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{pcl}{pcl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::pcl} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_ad6e42ddbafd6a31ad15df813dee72fa4}\label{structComSquare_1_1CPU_1_1Registers_ad6e42ddbafd6a31ad15df813dee72fa4}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!s@{s}} +\index{s@{s}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{s}{s}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::s} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a438434360195417afce13220ae856861}\label{structComSquare_1_1CPU_1_1Registers_a438434360195417afce13220ae856861}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!sh@{sh}} +\index{sh@{sh}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{sh}{sh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::sh} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a19f2b4c328874c2207459bf22b2a76ba}\label{structComSquare_1_1CPU_1_1Registers_a19f2b4c328874c2207459bf22b2a76ba}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!sl@{sl}} +\index{sl@{sl}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{sl}{sl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::sl} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a1274f0dbe8e79cd4794f2cc8175a99c3}\label{structComSquare_1_1CPU_1_1Registers_a1274f0dbe8e79cd4794f2cc8175a99c3}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!x@{x}} +\index{x@{x}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{x}{x}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::x} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_acc0e55548baf2ad8a411eb4f782092c3}\label{structComSquare_1_1CPU_1_1Registers_acc0e55548baf2ad8a411eb4f782092c3}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!xh@{xh}} +\index{xh@{xh}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{xh}{xh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::xh} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a718d9c2f67935dad3778b0fc03a22030}\label{structComSquare_1_1CPU_1_1Registers_a718d9c2f67935dad3778b0fc03a22030}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!xl@{xl}} +\index{xl@{xl}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{xl}{xl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::xl} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_ac756a49aa063214449d0ef9be3db38cc}\label{structComSquare_1_1CPU_1_1Registers_ac756a49aa063214449d0ef9be3db38cc}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!y@{y}} +\index{y@{y}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{y}{y}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::y} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_a324dee252472744f2d72fb4ba86c3da1}\label{structComSquare_1_1CPU_1_1Registers_a324dee252472744f2d72fb4ba86c3da1}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!yh@{yh}} +\index{yh@{yh}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{yh}{yh}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::yh} + +\mbox{\Hypertarget{structComSquare_1_1CPU_1_1Registers_ab1995426df7b4f4500a2576b121824f6}\label{structComSquare_1_1CPU_1_1Registers_ab1995426df7b4f4500a2576b121824f6}} +\index{ComSquare::CPU::Registers@{ComSquare::CPU::Registers}!yl@{yl}} +\index{yl@{yl}!ComSquare::CPU::Registers@{ComSquare::CPU::Registers}} +\doxysubsubsection{\texorpdfstring{yl}{yl}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+C\+P\+U\+::\+Registers\+::yl} + + + +The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+C\+P\+U/\mbox{\hyperlink{CPU_8hpp}{C\+P\+U.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/structComSquare_1_1CPU_1_1Registers__coll__graph.md5 b/docs/latex/structComSquare_1_1CPU_1_1Registers__coll__graph.md5 new file mode 100644 index 0000000..e364748 --- /dev/null +++ b/docs/latex/structComSquare_1_1CPU_1_1Registers__coll__graph.md5 @@ -0,0 +1 @@ +0db2ac136f96aca98506c2f11a533a5f \ No newline at end of file diff --git a/docs/latex/structComSquare_1_1CPU_1_1Registers__coll__graph.pdf b/docs/latex/structComSquare_1_1CPU_1_1Registers__coll__graph.pdf new file mode 100644 index 0000000..38824e0 Binary files /dev/null and b/docs/latex/structComSquare_1_1CPU_1_1Registers__coll__graph.pdf differ diff --git a/docs/latex/structComSquare_1_1Cartridge_1_1Header.tex b/docs/latex/structComSquare_1_1Cartridge_1_1Header.tex new file mode 100644 index 0000000..dbaeaa7 --- /dev/null +++ b/docs/latex/structComSquare_1_1Cartridge_1_1Header.tex @@ -0,0 +1,207 @@ +\hypertarget{structComSquare_1_1Cartridge_1_1Header}{}\doxysection{Com\+Square\+::Cartridge\+::Header Struct Reference} +\label{structComSquare_1_1Cartridge_1_1Header}\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} + + +{\ttfamily \#include $<$Cartridge.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::Cartridge\+::Header\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=262pt]{structComSquare_1_1Cartridge_1_1Header__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +std\+::string \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a3116a0a578bee265d14e6774c4638946}{game\+Name}} +\begin{DoxyCompactList}\small\item\em The name of the game. \end{DoxyCompactList}\item +\mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645}{Mapping\+Mode}} \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a0850de9648f34bf61df54cdc89be6d00}{mapping\+Mode}} +\begin{DoxyCompactList}\small\item\em The memory mapping of the R\+OM. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a104388be15830e02fec183196af1bd83}{rom\+Type}} +\begin{DoxyCompactList}\small\item\em The rom type (special information about the rom, still don\textquotesingle{}t know what). \end{DoxyCompactList}\item +unsigned \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a9cd916f34389a428168fa3a3bd63ddfe}{rom\+Size}} +\begin{DoxyCompactList}\small\item\em The size (in bytes) of the ram. \end{DoxyCompactList}\item +unsigned \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a7c99821835a36bc916b5a0ee4d65f0bd}{sram\+Size}} +\begin{DoxyCompactList}\small\item\em The size of the S\+Rom inside the cartridge. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_aacf2cff268aae2e4e961d2f91e867c44}{creatorIDs}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a6b911c5f4b8b402716adeb3efbcc1c8f}{creatorID}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Creator license ID code. \end{DoxyCompactList}\item +uint8\+\_\+t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a0db902951ad90b6a35e920b3c1ed1a4b}{version}} +\begin{DoxyCompactList}\small\item\em The version of the game. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a26e3caf6683851ecdba59e9360d4479e}{checksumComplements}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a6bf5668dab67ef8b36bb94888fe5023c}{checksumComplement}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Checksum complement. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_abc680d0cb69a95b96991b8d6c493a57a}{checksums}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a9735c88a3302942f2a52cdb592c2be71}{checksum}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em Checksum. \end{DoxyCompactList}\item +\mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors}{Interrupt\+Vectors}} \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_ac224974debb8820cad2b6afe6a03138f}{native\+Interrupts}} +\begin{DoxyCompactList}\small\item\em The interrupt vectors used to halt the \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}} in native mode. \end{DoxyCompactList}\item +\mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors}{Interrupt\+Vectors}} \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1Header_a20af2912ce821fc0292322065584bd6e}{emulation\+Interrupts}} +\begin{DoxyCompactList}\small\item\em The interrupt vectors used to halt the \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}} in emulation mode. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_ab5dcd8c14fa5900103214f1df26ab650}\label{structComSquare_1_1Cartridge_1_1Header_ab5dcd8c14fa5900103214f1df26ab650}} +\doxysubsubsection{\texorpdfstring{"@11}{@11}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Checksum complement. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a892636a9074347b5cb48d73815e5f293}\label{structComSquare_1_1Cartridge_1_1Header_a892636a9074347b5cb48d73815e5f293}} +\doxysubsubsection{\texorpdfstring{"@13}{@13}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Checksum. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_ab0340324c1ceec30a3d8cc60917d30ec}\label{structComSquare_1_1Cartridge_1_1Header_ab0340324c1ceec30a3d8cc60917d30ec}} +\doxysubsubsection{\texorpdfstring{"@9}{@9}} +{\footnotesize\ttfamily union \{ ... \} } + + + +Creator license ID code. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a9735c88a3302942f2a52cdb592c2be71}\label{structComSquare_1_1Cartridge_1_1Header_a9735c88a3302942f2a52cdb592c2be71}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!checksum@{checksum}} +\index{checksum@{checksum}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{checksum}{checksum}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Header\+::checksum} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a6bf5668dab67ef8b36bb94888fe5023c}\label{structComSquare_1_1Cartridge_1_1Header_a6bf5668dab67ef8b36bb94888fe5023c}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!checksumComplement@{checksumComplement}} +\index{checksumComplement@{checksumComplement}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{checksumComplement}{checksumComplement}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Header\+::checksum\+Complement} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a26e3caf6683851ecdba59e9360d4479e}\label{structComSquare_1_1Cartridge_1_1Header_a26e3caf6683851ecdba59e9360d4479e}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!checksumComplements@{checksumComplements}} +\index{checksumComplements@{checksumComplements}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{checksumComplements}{checksumComplements}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Header\+::checksum\+Complements\mbox{[}2\mbox{]}} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_abc680d0cb69a95b96991b8d6c493a57a}\label{structComSquare_1_1Cartridge_1_1Header_abc680d0cb69a95b96991b8d6c493a57a}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!checksums@{checksums}} +\index{checksums@{checksums}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{checksums}{checksums}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Header\+::checksums\mbox{[}2\mbox{]}} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a6b911c5f4b8b402716adeb3efbcc1c8f}\label{structComSquare_1_1Cartridge_1_1Header_a6b911c5f4b8b402716adeb3efbcc1c8f}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!creatorID@{creatorID}} +\index{creatorID@{creatorID}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{creatorID}{creatorID}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Header\+::creator\+ID} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_aacf2cff268aae2e4e961d2f91e867c44}\label{structComSquare_1_1Cartridge_1_1Header_aacf2cff268aae2e4e961d2f91e867c44}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!creatorIDs@{creatorIDs}} +\index{creatorIDs@{creatorIDs}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{creatorIDs}{creatorIDs}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Header\+::creator\+I\+Ds\mbox{[}2\mbox{]}} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a20af2912ce821fc0292322065584bd6e}\label{structComSquare_1_1Cartridge_1_1Header_a20af2912ce821fc0292322065584bd6e}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!emulationInterrupts@{emulationInterrupts}} +\index{emulationInterrupts@{emulationInterrupts}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{emulationInterrupts}{emulationInterrupts}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors}{Interrupt\+Vectors}} Com\+Square\+::\+Cartridge\+::\+Header\+::emulation\+Interrupts} + + + +The interrupt vectors used to halt the \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}} in emulation mode. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a3116a0a578bee265d14e6774c4638946}\label{structComSquare_1_1Cartridge_1_1Header_a3116a0a578bee265d14e6774c4638946}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!gameName@{gameName}} +\index{gameName@{gameName}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{gameName}{gameName}} +{\footnotesize\ttfamily std\+::string Com\+Square\+::\+Cartridge\+::\+Header\+::game\+Name} + + + +The name of the game. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a0850de9648f34bf61df54cdc89be6d00}\label{structComSquare_1_1Cartridge_1_1Header_a0850de9648f34bf61df54cdc89be6d00}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!mappingMode@{mappingMode}} +\index{mappingMode@{mappingMode}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{mappingMode}{mappingMode}} +{\footnotesize\ttfamily \mbox{\hyperlink{namespaceComSquare_1_1Cartridge_a61c1e80050c388d76fb687b129ed8645}{Mapping\+Mode}} Com\+Square\+::\+Cartridge\+::\+Header\+::mapping\+Mode} + + + +The memory mapping of the R\+OM. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_ac224974debb8820cad2b6afe6a03138f}\label{structComSquare_1_1Cartridge_1_1Header_ac224974debb8820cad2b6afe6a03138f}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!nativeInterrupts@{nativeInterrupts}} +\index{nativeInterrupts@{nativeInterrupts}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{nativeInterrupts}{nativeInterrupts}} +{\footnotesize\ttfamily \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors}{Interrupt\+Vectors}} Com\+Square\+::\+Cartridge\+::\+Header\+::native\+Interrupts} + + + +The interrupt vectors used to halt the \mbox{\hyperlink{namespaceComSquare_1_1CPU}{C\+PU}} in native mode. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a9cd916f34389a428168fa3a3bd63ddfe}\label{structComSquare_1_1Cartridge_1_1Header_a9cd916f34389a428168fa3a3bd63ddfe}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!romSize@{romSize}} +\index{romSize@{romSize}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{romSize}{romSize}} +{\footnotesize\ttfamily unsigned Com\+Square\+::\+Cartridge\+::\+Header\+::rom\+Size} + + + +The size (in bytes) of the ram. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a104388be15830e02fec183196af1bd83}\label{structComSquare_1_1Cartridge_1_1Header_a104388be15830e02fec183196af1bd83}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!romType@{romType}} +\index{romType@{romType}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{romType}{romType}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Header\+::rom\+Type} + + + +The rom type (special information about the rom, still don\textquotesingle{}t know what). + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a7c99821835a36bc916b5a0ee4d65f0bd}\label{structComSquare_1_1Cartridge_1_1Header_a7c99821835a36bc916b5a0ee4d65f0bd}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!sramSize@{sramSize}} +\index{sramSize@{sramSize}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{sramSize}{sramSize}} +{\footnotesize\ttfamily unsigned Com\+Square\+::\+Cartridge\+::\+Header\+::sram\+Size} + + + +The size of the S\+Rom inside the cartridge. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1Header_a0db902951ad90b6a35e920b3c1ed1a4b}\label{structComSquare_1_1Cartridge_1_1Header_a0db902951ad90b6a35e920b3c1ed1a4b}} +\index{ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}!version@{version}} +\index{version@{version}!ComSquare::Cartridge::Header@{ComSquare::Cartridge::Header}} +\doxysubsubsection{\texorpdfstring{version}{version}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Header\+::version} + + + +The version of the game. + + + +The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+Cartridge/\mbox{\hyperlink{Cartridge_8hpp}{Cartridge.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/structComSquare_1_1Cartridge_1_1Header__coll__graph.md5 b/docs/latex/structComSquare_1_1Cartridge_1_1Header__coll__graph.md5 new file mode 100644 index 0000000..80414dc --- /dev/null +++ b/docs/latex/structComSquare_1_1Cartridge_1_1Header__coll__graph.md5 @@ -0,0 +1 @@ +93d4afab6d5b8db2d9dbf82da074cc05 \ No newline at end of file diff --git a/docs/latex/structComSquare_1_1Cartridge_1_1Header__coll__graph.pdf b/docs/latex/structComSquare_1_1Cartridge_1_1Header__coll__graph.pdf new file mode 100644 index 0000000..7152c52 Binary files /dev/null and b/docs/latex/structComSquare_1_1Cartridge_1_1Header__coll__graph.pdf differ diff --git a/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors.tex b/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors.tex new file mode 100644 index 0000000..47cd23d --- /dev/null +++ b/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors.tex @@ -0,0 +1,195 @@ +\hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors}{}\doxysection{Com\+Square\+::Cartridge\+::Interrupt\+Vectors Struct Reference} +\label{structComSquare_1_1Cartridge_1_1InterruptVectors}\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} + + +{\ttfamily \#include $<$Interrupt\+Vectors.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::Cartridge\+::Interrupt\+Vectors\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=204pt]{structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_a967f2204139242187145b3774f1f68b4}{cop8}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_ae4496e71c47ea28544a4fcbea7f52764}{cop}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Co-\/\+Processor enable vector. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_ae3d62b23c9f79cf9ad434604c8973884}{brk8}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_acadec395ea58ceffebe1d81acbd5ee84}{brk}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Break vector. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_aa59cb569c75cea6d3bfaaf57460e74ad}{abort8}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_acaa46ddec2f6246ab6210360f977d85d}{abort}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Abort vector. \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_a2495e3cf161f60a0242be1746074178b}{nmi8}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_a961a0c96a33afb70d8727b0e18737e68}{nmi}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The non-\/maskable interrupt (The V-\/\+Blank interrupt). \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_a12d3bb5db85a5de0a806e28efc0fb409}{reset8}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_a7e733bb6137f727e5bd161573e6b50fb}{reset}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Reset vector (execution of the \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} starts with this reset vector in emulation mode). \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>uint8\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_a4cef3761e5a08db1398f258d22c9d1c9}{irq8}} \mbox{[}2\mbox{]}\\ +\>uint16\_t \mbox{\hyperlink{structComSquare_1_1Cartridge_1_1InterruptVectors_ae9cdcd6ebefea6af55258fef69dbc81a}{irq}}\\ +\}; \\ + +\end{tabbing}\begin{DoxyCompactList}\small\item\em The Interrupt Request vector. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a7d4a5a5e7d8b0cdaa08281fbcb959123}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a7d4a5a5e7d8b0cdaa08281fbcb959123}} +\doxysubsubsection{\texorpdfstring{"@15}{@15}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Co-\/\+Processor enable vector. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_aebec50088f77415457a02e5ad1ae5ab9}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_aebec50088f77415457a02e5ad1ae5ab9}} +\doxysubsubsection{\texorpdfstring{"@17}{@17}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Break vector. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a15c4cda65fb98644380f6d284a1dccc1}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a15c4cda65fb98644380f6d284a1dccc1}} +\doxysubsubsection{\texorpdfstring{"@19}{@19}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Abort vector. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_ab80b1314d5ad31e3f587e8cd88afb407}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_ab80b1314d5ad31e3f587e8cd88afb407}} +\doxysubsubsection{\texorpdfstring{"@21}{@21}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The non-\/maskable interrupt (The V-\/\+Blank interrupt). + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_ad3def3b75576674e2f10a90de0bd818e}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_ad3def3b75576674e2f10a90de0bd818e}} +\doxysubsubsection{\texorpdfstring{"@23}{@23}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Reset vector (execution of the \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}} starts with this reset vector in emulation mode). + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a2ea12b1b81dbab4391c07740665f41c5}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a2ea12b1b81dbab4391c07740665f41c5}} +\doxysubsubsection{\texorpdfstring{"@25}{@25}} +{\footnotesize\ttfamily union \{ ... \} } + + + +The Interrupt Request vector. + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_acaa46ddec2f6246ab6210360f977d85d}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_acaa46ddec2f6246ab6210360f977d85d}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!abort@{abort}} +\index{abort@{abort}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{abort}{abort}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::abort} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_aa59cb569c75cea6d3bfaaf57460e74ad}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_aa59cb569c75cea6d3bfaaf57460e74ad}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!abort8@{abort8}} +\index{abort8@{abort8}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{abort8}{abort8}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::abort8\mbox{[}2\mbox{]}} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_acadec395ea58ceffebe1d81acbd5ee84}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_acadec395ea58ceffebe1d81acbd5ee84}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!brk@{brk}} +\index{brk@{brk}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{brk}{brk}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::brk} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_ae3d62b23c9f79cf9ad434604c8973884}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_ae3d62b23c9f79cf9ad434604c8973884}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!brk8@{brk8}} +\index{brk8@{brk8}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{brk8}{brk8}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::brk8\mbox{[}2\mbox{]}} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_ae4496e71c47ea28544a4fcbea7f52764}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_ae4496e71c47ea28544a4fcbea7f52764}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!cop@{cop}} +\index{cop@{cop}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{cop}{cop}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::cop} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a967f2204139242187145b3774f1f68b4}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a967f2204139242187145b3774f1f68b4}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!cop8@{cop8}} +\index{cop8@{cop8}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{cop8}{cop8}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::cop8\mbox{[}2\mbox{]}} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_ae9cdcd6ebefea6af55258fef69dbc81a}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_ae9cdcd6ebefea6af55258fef69dbc81a}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!irq@{irq}} +\index{irq@{irq}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{irq}{irq}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::irq} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a4cef3761e5a08db1398f258d22c9d1c9}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a4cef3761e5a08db1398f258d22c9d1c9}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!irq8@{irq8}} +\index{irq8@{irq8}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{irq8}{irq8}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::irq8\mbox{[}2\mbox{]}} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a961a0c96a33afb70d8727b0e18737e68}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a961a0c96a33afb70d8727b0e18737e68}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!nmi@{nmi}} +\index{nmi@{nmi}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{nmi}{nmi}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::nmi} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a2495e3cf161f60a0242be1746074178b}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a2495e3cf161f60a0242be1746074178b}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!nmi8@{nmi8}} +\index{nmi8@{nmi8}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{nmi8}{nmi8}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::nmi8\mbox{[}2\mbox{]}} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a7e733bb6137f727e5bd161573e6b50fb}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a7e733bb6137f727e5bd161573e6b50fb}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!reset@{reset}} +\index{reset@{reset}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{reset}{reset}} +{\footnotesize\ttfamily uint16\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::reset} + +\mbox{\Hypertarget{structComSquare_1_1Cartridge_1_1InterruptVectors_a12d3bb5db85a5de0a806e28efc0fb409}\label{structComSquare_1_1Cartridge_1_1InterruptVectors_a12d3bb5db85a5de0a806e28efc0fb409}} +\index{ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}!reset8@{reset8}} +\index{reset8@{reset8}!ComSquare::Cartridge::InterruptVectors@{ComSquare::Cartridge::InterruptVectors}} +\doxysubsubsection{\texorpdfstring{reset8}{reset8}} +{\footnotesize\ttfamily uint8\+\_\+t Com\+Square\+::\+Cartridge\+::\+Interrupt\+Vectors\+::reset8\mbox{[}2\mbox{]}} + + + +The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+Cartridge/\mbox{\hyperlink{InterruptVectors_8hpp}{Interrupt\+Vectors.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.md5 b/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.md5 new file mode 100644 index 0000000..5759210 --- /dev/null +++ b/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.md5 @@ -0,0 +1 @@ +2b8069ac752ff09e3c3bfe60a034523d \ No newline at end of file diff --git a/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.pdf b/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.pdf new file mode 100644 index 0000000..bc8cbdf Binary files /dev/null and b/docs/latex/structComSquare_1_1Cartridge_1_1InterruptVectors__coll__graph.pdf differ diff --git a/docs/latex/structComSquare_1_1SNES.tex b/docs/latex/structComSquare_1_1SNES.tex new file mode 100644 index 0000000..9da46dc --- /dev/null +++ b/docs/latex/structComSquare_1_1SNES.tex @@ -0,0 +1,94 @@ +\hypertarget{structComSquare_1_1SNES}{}\doxysection{Com\+Square\+::S\+N\+ES Struct Reference} +\label{structComSquare_1_1SNES}\index{ComSquare::SNES@{ComSquare::SNES}} + + +Container of all the components of the \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}}. + + + + +{\ttfamily \#include $<$S\+N\+E\+S.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::S\+N\+ES\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=184pt]{structComSquare_1_1SNES__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Member Functions} +\begin{DoxyCompactItemize} +\item +\mbox{\hyperlink{structComSquare_1_1SNES_a486c052e38e9f1aedd30987cf029e498}{S\+N\+ES}} (const std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Memory\+::\+Memory\+Bus}} $>$ \&bus, const std\+::string \&ram\+Path) +\begin{DoxyCompactList}\small\item\em Create all the components using a common memory bus for all of them. \end{DoxyCompactList}\end{DoxyCompactItemize} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+P\+U\+::\+C\+PU}} $>$ \mbox{\hyperlink{structComSquare_1_1SNES_a8d558f61af3651d2b7f8a9d7474f9b0b}{cpu}} +\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+P\+U\+::\+P\+PU}} $>$ \mbox{\hyperlink{structComSquare_1_1SNES_a7ab203b30ab3c34a86f3f1ecb35a8222}{ppu}} +\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+P\+U\+::\+A\+PU}} $>$ \mbox{\hyperlink{structComSquare_1_1SNES_af984c8966a84b1f0615b80aaf156cd4b}{apu}} +\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge}{Cartridge\+::\+Cartridge}} $>$ \mbox{\hyperlink{structComSquare_1_1SNES_a6f8224cada81d12eed09ad29e3054196}{cartridge}} +\item +std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram}{Ram\+::\+Ram}} $>$ \mbox{\hyperlink{structComSquare_1_1SNES_a60547db47c7187253b2aa691dac63e99}{wram}} +\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Container of all the components of the \mbox{\hyperlink{structComSquare_1_1SNES}{S\+N\+ES}}. + +\doxysubsection{Constructor \& Destructor Documentation} +\mbox{\Hypertarget{structComSquare_1_1SNES_a486c052e38e9f1aedd30987cf029e498}\label{structComSquare_1_1SNES_a486c052e38e9f1aedd30987cf029e498}} +\index{ComSquare::SNES@{ComSquare::SNES}!SNES@{SNES}} +\index{SNES@{SNES}!ComSquare::SNES@{ComSquare::SNES}} +\doxysubsubsection{\texorpdfstring{SNES()}{SNES()}} +{\footnotesize\ttfamily Com\+Square\+::\+S\+N\+E\+S\+::\+S\+N\+ES (\begin{DoxyParamCaption}\item[{const std\+::shared\+\_\+ptr$<$ \mbox{\hyperlink{classComSquare_1_1Memory_1_1MemoryBus}{Memory\+::\+Memory\+Bus}} $>$ \&}]{bus, }\item[{const std\+::string \&}]{ram\+Path }\end{DoxyParamCaption})} + + + +Create all the components using a common memory bus for all of them. + + + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{structComSquare_1_1SNES_af984c8966a84b1f0615b80aaf156cd4b}\label{structComSquare_1_1SNES_af984c8966a84b1f0615b80aaf156cd4b}} +\index{ComSquare::SNES@{ComSquare::SNES}!apu@{apu}} +\index{apu@{apu}!ComSquare::SNES@{ComSquare::SNES}} +\doxysubsubsection{\texorpdfstring{apu}{apu}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1APU_1_1APU}{A\+P\+U\+::\+A\+PU}}$>$ Com\+Square\+::\+S\+N\+E\+S\+::apu} + +\mbox{\Hypertarget{structComSquare_1_1SNES_a6f8224cada81d12eed09ad29e3054196}\label{structComSquare_1_1SNES_a6f8224cada81d12eed09ad29e3054196}} +\index{ComSquare::SNES@{ComSquare::SNES}!cartridge@{cartridge}} +\index{cartridge@{cartridge}!ComSquare::SNES@{ComSquare::SNES}} +\doxysubsubsection{\texorpdfstring{cartridge}{cartridge}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1Cartridge_1_1Cartridge}{Cartridge\+::\+Cartridge}}$>$ Com\+Square\+::\+S\+N\+E\+S\+::cartridge} + +\mbox{\Hypertarget{structComSquare_1_1SNES_a8d558f61af3651d2b7f8a9d7474f9b0b}\label{structComSquare_1_1SNES_a8d558f61af3651d2b7f8a9d7474f9b0b}} +\index{ComSquare::SNES@{ComSquare::SNES}!cpu@{cpu}} +\index{cpu@{cpu}!ComSquare::SNES@{ComSquare::SNES}} +\doxysubsubsection{\texorpdfstring{cpu}{cpu}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1CPU_1_1CPU}{C\+P\+U\+::\+C\+PU}}$>$ Com\+Square\+::\+S\+N\+E\+S\+::cpu} + +\mbox{\Hypertarget{structComSquare_1_1SNES_a7ab203b30ab3c34a86f3f1ecb35a8222}\label{structComSquare_1_1SNES_a7ab203b30ab3c34a86f3f1ecb35a8222}} +\index{ComSquare::SNES@{ComSquare::SNES}!ppu@{ppu}} +\index{ppu@{ppu}!ComSquare::SNES@{ComSquare::SNES}} +\doxysubsubsection{\texorpdfstring{ppu}{ppu}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU}{P\+P\+U\+::\+P\+PU}}$>$ Com\+Square\+::\+S\+N\+E\+S\+::ppu} + +\mbox{\Hypertarget{structComSquare_1_1SNES_a60547db47c7187253b2aa691dac63e99}\label{structComSquare_1_1SNES_a60547db47c7187253b2aa691dac63e99}} +\index{ComSquare::SNES@{ComSquare::SNES}!wram@{wram}} +\index{wram@{wram}!ComSquare::SNES@{ComSquare::SNES}} +\doxysubsubsection{\texorpdfstring{wram}{wram}} +{\footnotesize\ttfamily std\+::shared\+\_\+ptr$<$\mbox{\hyperlink{classComSquare_1_1Ram_1_1Ram}{Ram\+::\+Ram}}$>$ Com\+Square\+::\+S\+N\+E\+S\+::wram} + + + +The documentation for this struct was generated from the following files\+:\begin{DoxyCompactItemize} +\item +sources/\mbox{\hyperlink{SNES_8hpp}{S\+N\+E\+S.\+hpp}}\item +sources/\mbox{\hyperlink{SNES_8cpp}{S\+N\+E\+S.\+cpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/structComSquare_1_1SNES__coll__graph.md5 b/docs/latex/structComSquare_1_1SNES__coll__graph.md5 new file mode 100644 index 0000000..ac202ed --- /dev/null +++ b/docs/latex/structComSquare_1_1SNES__coll__graph.md5 @@ -0,0 +1 @@ +9e00a25e74f59f8f8d92c036a88636f1 \ No newline at end of file diff --git a/docs/latex/structComSquare_1_1SNES__coll__graph.pdf b/docs/latex/structComSquare_1_1SNES__coll__graph.pdf new file mode 100644 index 0000000..3f6ee51 Binary files /dev/null and b/docs/latex/structComSquare_1_1SNES__coll__graph.pdf differ diff --git a/docs/latex/tabu_doxygen.sty b/docs/latex/tabu_doxygen.sty new file mode 100644 index 0000000..60fd7e8 --- /dev/null +++ b/docs/latex/tabu_doxygen.sty @@ -0,0 +1,2557 @@ +%% +%% This is file `tabu.sty', +%% generated with the docstrip utility. +%% +%% The original source files were: +%% +%% tabu.dtx (with options: `package') +%% +%% This is a generated file. +%% Copyright (FC) 2010-2011 - lppl +%% +%% tabu : 2011/02/26 v2.8 - tabu : Flexible LaTeX tabulars +%% +%% ********************************************************************************************** +%% \begin{tabu} { preamble } => default target: \linewidth or \linegoal +%% \begin{tabu} to { preamble } => target specified +%% \begin{tabu} spread { preamble } => target relative to the ``natural width'' +%% +%% tabu works in text and in math modes. +%% +%% X columns: automatic width adjustment + horizontal and vertical alignment +%% \begin{tabu} { X[4c] X[1c] X[-2ml] } +%% +%% Horizontal lines and / or leaders: +%% \hline\hline => double horizontal line +%% \firsthline\hline => for nested tabulars +%% \lasthline\hline => for nested tabulars +%% \tabucline[line spec]{column-column} => ``funny'' lines (dash/leader) +%% Automatic lines / leaders : +%% \everyrow{\hline\hline} +%% +%% Vertical lines and / or leaders: +%% \begin{tabu} { |[3pt red] X[4c] X[1c] X[-2ml] |[3pt blue] } +%% \begin{tabu} { |[3pt red] X[4c] X[1c] X[-2ml] |[3pt on 2pt off 4pt blue] } +%% +%% Fixed vertical spacing adjustment: +%% \extrarowheight= \extrarowdepth= +%% or: \extrarowsep= => may be prefixed by \global +%% +%% Dynamic vertical spacing adjustment: +%% \abovetabulinesep= \belowtabulinesep= +%% or: \tabulinesep= => may be prefixed by \global +%% +%% delarray.sty shortcuts: in math and text modes +%% \begin{tabu} .... \({ preamble }\) +%% +%% Algorithms reports: +%% \tracingtabu=1 \tracingtabu=2 +%% +%% ********************************************************************************************** +%% +%% This work may be distributed and/or modified under the +%% conditions of the LaTeX Project Public License, either +%% version 1.3 of this license or (at your option) any later +%% version. The latest version of this license is in +%% http://www.latex-project.org/lppl.txt +%% +%% This work consists of the main source file tabu.dtx +%% and the derived files +%% tabu.sty, tabu.pdf, tabu.ins +%% +%% tabu : Flexible LaTeX tabulars +%% lppl copyright 2010-2011 by FC +%% + +\NeedsTeXFormat{LaTeX2e}[2005/12/01] +\ProvidesPackage{tabu_doxygen}[2011/02/26 v2.8 - flexible LaTeX tabulars (FC), frozen version for doxygen] +\RequirePackage{array}[2008/09/09] +\RequirePackage{varwidth}[2009/03/30] +\AtEndOfPackage{\tabu@AtEnd \let\tabu@AtEnd \@undefined} +\let\tabu@AtEnd\@empty +\def\TMP@EnsureCode#1={% + \edef\tabu@AtEnd{\tabu@AtEnd + \catcode#1 \the\catcode#1}% + \catcode#1=% +}% \TMP@EnsureCode +\TMP@EnsureCode 33 = 12 % ! +\TMP@EnsureCode 58 = 12 % : (for siunitx) +\TMP@EnsureCode124 = 12 % | +\TMP@EnsureCode 36 = 3 % $ = math shift +\TMP@EnsureCode 38 = 4 % & = tab alignment character +\TMP@EnsureCode 32 = 10 % space +\TMP@EnsureCode 94 = 7 % ^ +\TMP@EnsureCode 95 = 8 % _ +%% Constants -------------------------------------------------------- +\newcount \c@taburow \def\thetaburow {\number\c@taburow} +\newcount \tabu@nbcols +\newcount \tabu@cnt +\newcount \tabu@Xcol +\let\tabu@start \@tempcnta +\let\tabu@stop \@tempcntb +\newcount \tabu@alloc \tabu@alloc=\m@ne +\newcount \tabu@nested +\def\tabu@alloc@{\global\advance\tabu@alloc \@ne \tabu@nested\tabu@alloc} +\newdimen \tabu@target +\newdimen \tabu@spreadtarget +\newdimen \tabu@naturalX +\newdimen \tabucolX +\let\tabu@DELTA \@tempdimc +\let\tabu@thick \@tempdima +\let\tabu@on \@tempdimb +\let\tabu@off \@tempdimc +\newdimen \tabu@Xsum +\newdimen \extrarowdepth +\newdimen \abovetabulinesep +\newdimen \belowtabulinesep +\newdimen \tabustrutrule \tabustrutrule \z@ +\newtoks \tabu@thebody +\newtoks \tabu@footnotes +\newsavebox \tabu@box +\newsavebox \tabu@arstrutbox +\newsavebox \tabu@hleads +\newsavebox \tabu@vleads +\newif \iftabu@colortbl +\newif \iftabu@siunitx +\newif \iftabu@measuring +\newif \iftabu@spread +\newif \iftabu@negcoef +\newif \iftabu@everyrow +\def\tabu@everyrowtrue {\global\let\iftabu@everyrow \iftrue} +\def\tabu@everyrowfalse{\global\let\iftabu@everyrow \iffalse} +\newif \iftabu@long +\newif \iftabuscantokens +\def\tabu@rescan {\tabu@verbatim \scantokens } +%% Utilities (for internal usage) ----------------------------------- +\def\tabu@gobblespace #1 {#1} +\def\tabu@gobbletoken #1#2{#1} +\def\tabu@gobbleX{\futurelet\@let@token \tabu@gobblex} +\def\tabu@gobblex{\if ^^J\noexpand\@let@token \expandafter\@gobble + \else\ifx \@sptoken\@let@token + \expandafter\tabu@gobblespace\expandafter\tabu@gobbleX + \fi\fi +}% \tabu@gobblex +\def\tabu@X{^^J} +{\obeyspaces +\global\let\tabu@spxiii= % saves an active space (for \ifx) +\gdef\tabu@@spxiii{ }} +\def\tabu@ifenvir {% only for \multicolumn + \expandafter\tabu@if@nvir\csname\@currenvir\endcsname +}% \tabu@ifenvir +\def\tabu@if@nvir #1{\csname @\ifx\tabu#1first\else + \ifx\longtabu#1first\else + second\fi\fi oftwo\endcsname +}% \tabu@ifenvir +\def\tabu@modulo #1#2{\numexpr\ifnum\numexpr#1=\z@ 0\else #1-(#1-(#2-1)/2)/(#2)*(#2)\fi} +{\catcode`\&=3 +\gdef\tabu@strtrim #1{% #1 = control sequence to trim + \ifodd 1\ifx #1\@empty \else \ifx #1\space \else 0\fi \fi + \let\tabu@c@l@r \@empty \let#1\@empty + \else \expandafter \tabu@trimspaces #1\@nnil + \fi +}% \tabu@strtrim +\gdef\tabu@trimspaces #1\@nnil{\let\tabu@c@l@r=#2\tabu@firstspace .#1& }% +\gdef\tabu@firstspace #1#2#3 &{\tabu@lastspace #2#3&} +\gdef\tabu@lastspace #1{\def #3{#1}% + \ifx #3\tabu@c@l@r \def\tabu@c@l@r{\protect\color{#1}}\expandafter\remove@to@nnil \fi + \tabu@trimspaces #1\@nnil} +}% \catcode +\def\tabu@sanitizearg #1#2{{% + \csname \ifcsname if@safe@actives\endcsname % + @safe@activestrue\else + relax\fi \endcsname + \edef#2{#1}\tabu@strtrim#2\@onelevel@sanitize#2% + \expandafter}\expandafter\def\expandafter#2\expandafter{#2}% +}% \tabu@sanitizearg +\def\tabu@textbar #1{\begingroup \endlinechar\m@ne \scantokens{\def\:{|}}% + \expandafter\endgroup \expandafter#1\:% !!! semi simple group !!! +}% \tabu@textbar +\def\tabu@everyrow@bgroup{\iftabu@everyrow \begingroup \else \noalign{\ifnum0=`}\fi \fi} +\def\tabu@everyrow@egroup{% + \iftabu@everyrow \expandafter \endgroup \the\toks@ + \else \ifnum0=`{\fi}% + \fi +}% \tabu@everyrow@egroup +\def\tabu@arstrut {\global\setbox\@arstrutbox \hbox{\vrule + height \arraystretch \dimexpr\ht\strutbox+\extrarowheight + depth \arraystretch \dimexpr\dp\strutbox+\extrarowdepth + width \z@}% +}% \tabu@arstrut +\def\tabu@rearstrut {% + \@tempdima \arraystretch\dimexpr\ht\strutbox+\extrarowheight \relax + \@tempdimb \arraystretch\dimexpr\dp\strutbox+\extrarowdepth \relax + \ifodd 1\ifdim \ht\@arstrutbox=\@tempdima + \ifdim \dp\@arstrutbox=\@tempdimb 0 \fi\fi + \tabu@mkarstrut + \fi +}% \tabu@rearstrut +\def\tabu@@DBG #1{\ifdim\tabustrutrule>\z@ \color{#1}\fi} +\def\tabu@DBG@arstrut {\global\setbox\@arstrutbox + \hbox to\z@{\hbox to\z@{\hss + {\tabu@DBG{cyan}\vrule + height \arraystretch \dimexpr\ht\strutbox+\extrarowheight + depth \z@ + width \tabustrutrule}\kern-\tabustrutrule + {\tabu@DBG{pink}\vrule + height \z@ + depth \arraystretch \dimexpr\dp\strutbox+\extrarowdepth + width \tabustrutrule}}}% +}% \tabu@DBG@arstrut +\def\tabu@save@decl{\toks\count@ \expandafter{\the\toks\expandafter\count@ + \@nextchar}}% +\def\tabu@savedecl{\ifcat$\d@llarend\else + \let\save@decl \tabu@save@decl \fi % no inversion of tokens in text mode +}% \tabu@savedecl +\def\tabu@finalstrut #1{\unskip\ifhmode\nobreak\fi\vrule height\z@ depth\z@ width\z@} +\newcommand*\tabuDisableCommands {\g@addto@macro\tabu@trialh@@k } +\let\tabu@trialh@@k \@empty +\def\tabu@nowrite #1#{{\afterassignment}\toks@} +\let\tabu@write\write +\let\tabu@immediate\immediate +\def\tabu@WRITE{\begingroup + \def\immediate\write{\aftergroup\endgroup + \tabu@immediate\tabu@write}% +}% \tabu@WRITE +\expandafter\def\expandafter\tabu@GenericError\expandafter{% + \expandafter\tabu@WRITE\GenericError} +\def\tabu@warn{\tabu@WRITE\PackageWarning{tabu}} +\def\tabu@noxfootnote [#1]{\@gobble} +\def\tabu@nocolor #1#{\@gobble} +\newcommand*\tabu@norowcolor[2][]{} +\def\tabu@maybesiunitx #1{\def\tabu@temp{#1}% + \futurelet\@let@token \tabu@m@ybesiunitx} +\def\tabu@m@ybesiunitx #1{\def\tabu@m@ybesiunitx {% + \ifx #1\@let@token \let\tabu@cellleft \@empty \let\tabu@cellright \@empty \fi + \tabu@temp}% \tabu@m@ybesiunitx +}\expandafter\tabu@m@ybesiunitx \csname siunitx_table_collect_begin:Nn\endcsname +\def\tabu@celllalign@def #1{\def\tabu@celllalign{\tabu@maybesiunitx{#1}}}% +%% Fixed vertical spacing adjustment: \extrarowsep ------------------ +\newcommand*\extrarowsep{\edef\tabu@C@extra{\the\numexpr\tabu@C@extra+1}% + \iftabu@everyrow \aftergroup\tabu@Gextra + \else \aftergroup\tabu@n@Gextra + \fi + \@ifnextchar={\tabu@gobbletoken\tabu@extra} \tabu@extra +}% \extrarowsep +\def\tabu@extra {\@ifnextchar_% + {\tabu@gobbletoken{\tabu@setextra\extrarowheight \extrarowdepth}} + {\ifx ^\@let@token \def\tabu@temp{% + \tabu@gobbletoken{\tabu@setextra\extrarowdepth \extrarowheight}}% + \else \let\tabu@temp \@empty + \afterassignment \tabu@setextrasep \extrarowdepth + \fi \tabu@temp}% +}% \tabu@extra +\def\tabu@setextra #1#2{\def\tabu@temp{\tabu@extr@#1#2}\afterassignment\tabu@temp#2} +\def\tabu@extr@ #1#2{\@ifnextchar^% + {\tabu@gobbletoken{\tabu@setextra\extrarowdepth \extrarowheight}} + {\ifx _\@let@token \def\tabu@temp{% + \tabu@gobbletoken{\tabu@setextra\extrarowheight \extrarowdepth}}% + \else \let\tabu@temp \@empty + \tabu@Gsave \tabu@G@extra \tabu@C@extra \extrarowheight \extrarowdepth + \fi \tabu@temp}% +}% \tabu@extr@ +\def\tabu@setextrasep {\extrarowheight=\extrarowdepth + \tabu@Gsave \tabu@G@extra \tabu@C@extra \extrarowheight \extrarowdepth +}% \tabu@setextrasep +\def\tabu@Gextra{\ifx \tabu@G@extra\@empty \else {\tabu@Rextra}\fi} +\def\tabu@n@Gextra{\ifx \tabu@G@extra\@empty \else \noalign{\tabu@Rextra}\fi} +\def\tabu@Rextra{\tabu@Grestore \tabu@G@extra \tabu@C@extra} +\let\tabu@C@extra \z@ +\let\tabu@G@extra \@empty +%% Dynamic vertical spacing adjustment: \tabulinesep ---------------- +\newcommand*\tabulinesep{\edef\tabu@C@linesep{\the\numexpr\tabu@C@linesep+1}% + \iftabu@everyrow \aftergroup\tabu@Glinesep + \else \aftergroup\tabu@n@Glinesep + \fi + \@ifnextchar={\tabu@gobbletoken\tabu@linesep} \tabu@linesep +}% \tabulinesep +\def\tabu@linesep {\@ifnextchar_% + {\tabu@gobbletoken{\tabu@setsep\abovetabulinesep \belowtabulinesep}} + {\ifx ^\@let@token \def\tabu@temp{% + \tabu@gobbletoken{\tabu@setsep\belowtabulinesep \abovetabulinesep}}% + \else \let\tabu@temp \@empty + \afterassignment \tabu@setlinesep \abovetabulinesep + \fi \tabu@temp}% +}% \tabu@linesep +\def\tabu@setsep #1#2{\def\tabu@temp{\tabu@sets@p#1#2}\afterassignment\tabu@temp#2} +\def\tabu@sets@p #1#2{\@ifnextchar^% + {\tabu@gobbletoken{\tabu@setsep\belowtabulinesep \abovetabulinesep}} + {\ifx _\@let@token \def\tabu@temp{% + \tabu@gobbletoken{\tabu@setsep\abovetabulinesep \belowtabulinesep}}% + \else \let\tabu@temp \@empty + \tabu@Gsave \tabu@G@linesep \tabu@C@linesep \abovetabulinesep \belowtabulinesep + \fi \tabu@temp}% +}% \tabu@sets@p +\def\tabu@setlinesep {\belowtabulinesep=\abovetabulinesep + \tabu@Gsave \tabu@G@linesep \tabu@C@linesep \abovetabulinesep \belowtabulinesep +}% \tabu@setlinesep +\def\tabu@Glinesep{\ifx \tabu@G@linesep\@empty \else {\tabu@Rlinesep}\fi} +\def\tabu@n@Glinesep{\ifx \tabu@G@linesep\@empty \else \noalign{\tabu@Rlinesep}\fi} +\def\tabu@Rlinesep{\tabu@Grestore \tabu@G@linesep \tabu@C@linesep} +\let\tabu@C@linesep \z@ +\let\tabu@G@linesep \@empty +%% \global\extrarowsep and \global\tabulinesep ------------------- +\def\tabu@Gsave #1#2#3#4{\xdef#1{#1% + \toks#2{\toks\the\currentgrouplevel{\global#3\the#3\global#4\the#4}}}% +}% \tabu@Gsave +\def\tabu@Grestore#1#2{% + \toks#2{}#1\toks\currentgrouplevel\expandafter{\expandafter}\the\toks#2\relax + \ifcat$\the\toks\currentgrouplevel$\else + \global\let#1\@empty \global\let#2\z@ + \the\toks\currentgrouplevel + \fi +}% \tabu@Grestore +%% Setting code for every row --------------------------------------- +\newcommand*\everyrow{\tabu@everyrow@bgroup + \tabu@start \z@ \tabu@stop \z@ \tabu@evrstartstop +}% \everyrow +\def\tabu@evrstartstop {\@ifnextchar^% + {\afterassignment \tabu@evrstartstop \tabu@stop=}% + {\ifx ^\@let@token + \afterassignment\tabu@evrstartstop \tabu@start=% + \else \afterassignment\tabu@everyr@w \toks@ + \fi}% +}% \tabu@evrstartstop +\def\tabu@everyr@w {% + \xdef\tabu@everyrow{% + \noexpand\tabu@everyrowfalse + \let\noalign \relax + \noexpand\tabu@rowfontreset + \iftabu@colortbl \noexpand\tabu@rc@ \fi % \taburowcolors + \let\noexpand\tabu@docline \noexpand\tabu@docline@evr + \the\toks@ + \noexpand\tabu@evrh@@k + \noexpand\tabu@rearstrut + \global\advance\c@taburow \@ne}% + \iftabu@everyrow \toks@\expandafter + {\expandafter\def\expandafter\tabu@evr@L\expandafter{\the\toks@}\ignorespaces}% + \else \xdef\tabu@evr@G{\the\toks@}% + \fi + \tabu@everyrow@egroup +}% \tabu@everyr@w +\def\tabu@evr {\def\tabu@evrh@@k} % for internal use only +\tabu@evr{} +%% line style and leaders ------------------------------------------- +\newcommand*\newtabulinestyle [1]{% + {\@for \@tempa :=#1\do{\expandafter\tabu@newlinestyle \@tempa==\@nil}}% +}% \newtabulinestyle +\def\tabu@newlinestyle #1=#2=#3\@nil{\tabu@getline {#2}% + \tabu@sanitizearg {#1}\@tempa + \ifodd 1\ifx \@tempa\@empty \ifdefined\tabu@linestyle@ 0 \fi\fi + \global\expandafter\let + \csname tabu@linestyle@\@tempa \endcsname =\tabu@thestyle \fi +}% \tabu@newlinestyle +\newcommand*\tabulinestyle [1]{\tabu@everyrow@bgroup \tabu@getline{#1}% + \iftabu@everyrow + \toks@\expandafter{\expandafter \def \expandafter + \tabu@ls@L\expandafter{\tabu@thestyle}\ignorespaces}% + \gdef\tabu@ls@{\tabu@ls@L}% + \else + \global\let\tabu@ls@G \tabu@thestyle + \gdef\tabu@ls@{\tabu@ls@G}% + \fi + \tabu@everyrow@egroup +}% \tabulinestyle +\newcommand*\taburulecolor{\tabu@everyrow@bgroup \tabu@textbar \tabu@rulecolor} +\def\tabu@rulecolor #1{\toks@{}% + \def\tabu@temp #1##1#1{\tabu@ruledrsc{##1}}\@ifnextchar #1% + \tabu@temp + \tabu@rulearc +}% \tabu@rulecolor +\def\tabu@ruledrsc #1{\edef\tabu@temp{#1}\tabu@strtrim\tabu@temp + \ifx \tabu@temp\@empty \def\tabu@temp{\tabu@rule@drsc@ {}{}}% + \else \edef\tabu@temp{\noexpand\tabu@rule@drsc@ {}{\tabu@temp}}% + \fi + \tabu@temp +}% \tabu@ruledrsc@ +\def\tabu@ruledrsc@ #1#{\tabu@rule@drsc@ {#1}} +\def\tabu@rule@drsc@ #1#2{% + \iftabu@everyrow + \ifx \\#1#2\\\toks@{\let\CT@drsc@ \relax}% + \else \toks@{\def\CT@drsc@{\color #1{#2}}}% + \fi + \else + \ifx \\#1#2\\\global\let\CT@drsc@ \relax + \else \gdef\CT@drsc@{\color #1{#2}}% + \fi + \fi + \tabu@rulearc +}% \tabu@rule@drsc@ +\def\tabu@rulearc #1#{\tabu@rule@arc@ {#1}} +\def\tabu@rule@arc@ #1#2{% + \iftabu@everyrow + \ifx \\#1#2\\\toks@\expandafter{\the\toks@ \def\CT@arc@{}}% + \else \toks@\expandafter{\the\toks@ \def\CT@arc@{\color #1{#2}}}% + \fi + \toks@\expandafter{\the\toks@ + \let\tabu@arc@L \CT@arc@ + \let\tabu@drsc@L \CT@drsc@ + \ignorespaces}% + \else + \ifx \\#1#2\\\gdef\CT@arc@{}% + \else \gdef\CT@arc@{\color #1{#2}}% + \fi + \global\let\tabu@arc@G \CT@arc@ + \global\let\tabu@drsc@G \CT@drsc@ + \fi + \tabu@everyrow@egroup +}% \tabu@rule@arc@ +\def\taburowcolors {\tabu@everyrow@bgroup \@testopt \tabu@rowcolors 1} +\def\tabu@rowcolors [#1]#2#{\tabu@rowc@lors{#1}{#2}} +\def\tabu@rowc@lors #1#2#3{% + \toks@{}\@defaultunits \count@ =\number0#2\relax \@nnil + \@defaultunits \tabu@start =\number0#1\relax \@nnil + \ifnum \count@<\tw@ \count@=\tw@ \fi + \advance\tabu@start \m@ne + \ifnum \tabu@start<\z@ \tabu@start \z@ \fi + \tabu@rowcolorseries #3\in@..\in@ \@nnil +}% \tabu@rowcolors +\def\tabu@rowcolorseries #1..#2\in@ #3\@nnil {% + \ifx \in@#1\relax + \iftabu@everyrow \toks@{\def\tabu@rc@{}\let\tabu@rc@L \tabu@rc@}% + \else \gdef\tabu@rc@{}\global\let\tabu@rc@G \tabu@rc@ + \fi + \else + \ifx \\#2\\\tabu@rowcolorserieserror \fi + \tabu@sanitizearg{#1}\tabu@temp + \tabu@sanitizearg{#2}\@tempa + \advance\count@ \m@ne + \iftabu@everyrow + \def\tabu@rc@ ##1##2##3##4{\def\tabu@rc@{% + \ifnum ##2=\c@taburow + \definecolorseries{tabu@rcseries@\the\tabu@nested}{rgb}{last}{##3}{##4}\fi + \ifnum \c@taburow<##2 \else + \ifnum \tabu@modulo {\c@taburow-##2}{##1+1}=\z@ + \resetcolorseries[{##1}]{tabu@rcseries@\the\tabu@nested}\fi + \xglobal\colorlet{tabu@rc@\the\tabu@nested}{tabu@rcseries@\the\tabu@nested!!+}% + \rowcolor{tabu@rc@\the\tabu@nested}\fi}% + }\edef\x{\noexpand\tabu@rc@ {\the\count@} + {\the\tabu@start} + {\tabu@temp} + {\@tempa}% + }\x + \toks@\expandafter{\expandafter\def\expandafter\tabu@rc@\expandafter{\tabu@rc@}}% + \toks@\expandafter{\the\toks@ \let\tabu@rc@L \tabu@rc@ \ignorespaces}% + \else % inside \noalign + \definecolorseries{tabu@rcseries@\the\tabu@nested}{rgb}{last}{\tabu@temp}{\@tempa}% + \expandafter\resetcolorseries\expandafter[\the\count@]{tabu@rcseries@\the\tabu@nested}% + \xglobal\colorlet{tabu@rc@\the\tabu@nested}{tabu@rcseries@\the\tabu@nested!!+}% + \let\noalign \relax \rowcolor{tabu@rc@\the\tabu@nested}% + \def\tabu@rc@ ##1##2{\gdef\tabu@rc@{% + \ifnum \tabu@modulo {\c@taburow-##2}{##1+1}=\@ne + \resetcolorseries[{##1}]{tabu@rcseries@\the\tabu@nested}\fi + \xglobal\colorlet{tabu@rc@\the\tabu@nested}{tabu@rcseries@\the\tabu@nested!!+}% + \rowcolor{tabu@rc@\the\tabu@nested}}% + }\edef\x{\noexpand\tabu@rc@{\the\count@}{\the\c@taburow}}\x + \global\let\tabu@rc@G \tabu@rc@ + \fi + \fi + \tabu@everyrow@egroup +}% \tabu@rowcolorseries +\tabuDisableCommands {\let\tabu@rc@ \@empty } +\def\tabu@rowcolorserieserror {\PackageError{tabu} + {Invalid syntax for \string\taburowcolors + \MessageBreak Please look at the documentation!}\@ehd +}% \tabu@rowcolorserieserror +\newcommand*\tabureset {% + \tabulinesep=\z@ \extrarowsep=\z@ \extratabsurround=\z@ + \tabulinestyle{}\everyrow{}\taburulecolor||{}\taburowcolors{}% +}% \tabureset +%% Parsing the line styles ------------------------------------------ +\def\tabu@getline #1{\begingroup + \csname \ifcsname if@safe@actives\endcsname % + @safe@activestrue\else + relax\fi \endcsname + \edef\tabu@temp{#1}\tabu@sanitizearg{#1}\@tempa + \let\tabu@thestyle \relax + \ifcsname tabu@linestyle@\@tempa \endcsname + \edef\tabu@thestyle{\endgroup + \def\tabu@thestyle{\expandafter\noexpand + \csname tabu@linestyle@\@tempa\endcsname}% + }\tabu@thestyle + \else \expandafter\tabu@definestyle \tabu@temp \@nil + \fi +}% \tabu@getline +\def\tabu@definestyle #1#2\@nil {\endlinechar \m@ne \makeatletter + \tabu@thick \maxdimen \tabu@on \maxdimen \tabu@off \maxdimen + \let\tabu@c@lon \@undefined \let\tabu@c@loff \@undefined + \ifodd 1\ifcat .#1\else\ifcat\relax #1\else 0\fi\fi % catcode 12 or non expandable cs + \def\tabu@temp{\tabu@getparam{thick}}% + \else \def\tabu@temp{\tabu@getparam{thick}\maxdimen}% + \fi + {% + \let\tabu@ \relax + \def\:{\obeyspaces \tabu@oXIII \tabu@commaXIII \edef\:}% (space active \: happy ;-)) + \scantokens{\:{\tabu@temp #1#2 \tabu@\tabu@}}% + \expandafter}\expandafter + \def\expandafter\:\expandafter{\:}% line spec rewritten now ;-) + \def\;{\def\:}% + \scantokens\expandafter{\expandafter\;\expandafter{\:}}% space is now inactive (catcode 10) + \let\tabu@ \tabu@getcolor \:% all arguments are ready now ;-) + \ifdefined\tabu@c@lon \else \let\tabu@c@lon\@empty \fi + \ifx \tabu@c@lon\@empty \def\tabu@c@lon{\CT@arc@}\fi + \ifdefined\tabu@c@loff \else \let\tabu@c@loff \@empty \fi + \ifdim \tabu@on=\maxdimen \ifdim \tabu@off<\maxdimen + \tabu@on \tabulineon \fi\fi + \ifdim \tabu@off=\maxdimen \ifdim \tabu@on<\maxdimen + \tabu@off \tabulineoff \fi\fi + \ifodd 1\ifdim \tabu@off=\maxdimen \ifdim \tabu@on=\maxdimen 0 \fi\fi + \in@true % + \else \in@false % + \fi + \ifdim\tabu@thick=\maxdimen \def\tabu@thick{\arrayrulewidth}% + \else \edef\tabu@thick{\the\tabu@thick}% + \fi + \edef \tabu@thestyle ##1##2{\endgroup + \def\tabu@thestyle{% + \ifin@ \noexpand\tabu@leadersstyle {\tabu@thick} + {\the\tabu@on}{##1} + {\the\tabu@off}{##2}% + \else \noexpand\tabu@rulesstyle + {##1\vrule width \tabu@thick}% + {##1\leaders \hrule height \tabu@thick \hfil}% + \fi}% + }\expandafter \expandafter + \expandafter \tabu@thestyle \expandafter + \expandafter \expandafter + {\expandafter\tabu@c@lon\expandafter}\expandafter{\tabu@c@loff}% +}% \tabu@definestyle +{\catcode`\O=\active \lccode`\O=`\o \catcode`\,=\active + \lowercase{\gdef\tabu@oXIII {\catcode`\o=\active \let O=\tabu@oxiii}} + \gdef\tabu@commaXIII {\catcode`\,=\active \let ,=\space} +}% \catcode +\def\tabu@oxiii #1{% + \ifcase \ifx n#1\z@ \else + \ifx f#1\@ne\else + \tw@ \fi\fi + \expandafter\tabu@onxiii + \or \expandafter\tabu@ofxiii + \else o% + \fi#1}% +\def\tabu@onxiii #1#2{% + \ifcase \ifx !#2\tw@ \else + \ifcat.\noexpand#2\z@ \else + \ifx \tabu@spxiii#2\@ne\else + \tw@ \fi\fi\fi + \tabu@getparam{on}#2\expandafter\@gobble + \or \expandafter\tabu@onxiii % (space is active) + \else o\expandafter\@firstofone + \fi{#1#2}}% +\def\tabu@ofxiii #1#2{% + \ifx #2f\expandafter\tabu@offxiii + \else o\expandafter\@firstofone + \fi{#1#2}} +\def\tabu@offxiii #1#2{% + \ifcase \ifx !#2\tw@ \else + \ifcat.\noexpand#2\z@ \else + \ifx\tabu@spxiii#2\@ne \else + \tw@ \fi\fi\fi + \tabu@getparam{off}#2\expandafter\@gobble + \or \expandafter\tabu@offxiii % (space is active) + \else o\expandafter\@firstofone + \fi{#1#2}} +\def\tabu@getparam #1{\tabu@ \csname tabu@#1\endcsname=} +\def\tabu@getcolor #1{% \tabu@ <- \tabu@getcolor after \edef + \ifx \tabu@#1\else % no more spec + \let\tabu@theparam=#1\afterassignment \tabu@getc@l@r #1\fi +}% \tabu@getcolor +\def\tabu@getc@l@r #1\tabu@ {% + \def\tabu@temp{#1}\tabu@strtrim \tabu@temp + \ifx \tabu@temp\@empty + \else%\ifcsname \string\color@\tabu@temp \endcsname % if the color exists + \ifx \tabu@theparam \tabu@off \let\tabu@c@loff \tabu@c@l@r + \else \let\tabu@c@lon \tabu@c@l@r + \fi + %\else \tabu@warncolour{\tabu@temp}% + \fi%\fi + \tabu@ % next spec +}% \tabu@getc@l@r +\def\tabu@warncolour #1{\PackageWarning{tabu} + {Color #1 is not defined. Default color used}% +}% \tabu@warncolour +\def\tabu@leadersstyle #1#2#3#4#5{\def\tabu@leaders{{#1}{#2}{#3}{#4}{#5}}% + \ifx \tabu@leaders\tabu@leaders@G \else + \tabu@LEADERS{#1}{#2}{#3}{#4}{#5}\fi +}% \tabu@leadersstyle +\def\tabu@rulesstyle #1#2{\let\tabu@leaders \@undefined + \gdef\tabu@thevrule{#1}\gdef\tabu@thehrule{#2}% +}% \tabu@rulesstyle +%% The leaders boxes ------------------------------------------------ +\def\tabu@LEADERS #1#2#3#4#5{%% width, dash, dash color, gap, gap color + {\let\color \tabu@color % => during trials -> \color = \tabu@nocolor + {% % but the leaders boxes should have colors ! + \def\@therule{\vrule}\def\@thick{height}\def\@length{width}% + \def\@box{\hbox}\def\@unbox{\unhbox}\def\@elt{\wd}% + \def\@skip{\hskip}\def\@ss{\hss}\def\tabu@leads{\tabu@hleads}% + \tabu@l@@d@rs {#1}{#2}{#3}{#4}{#5}% + \global\let\tabu@thehleaders \tabu@theleaders + }% + {% + \def\@therule{\hrule}\def\@thick{width}\def\@length{height}% + \def\@box{\vbox}\def\@unbox{\unvbox}\def\@elt{\ht}% + \def\@skip{\vskip}\def\@ss{\vss}\def\tabu@leads{\tabu@vleads}% + \tabu@l@@d@rs {#1}{#2}{#3}{#4}{#5}% + \global\let\tabu@thevleaders \tabu@theleaders + }% + \gdef\tabu@leaders@G{{#1}{#2}{#3}{#4}{#5}}% + }% +}% \tabu@LEADERS +\def\tabu@therule #1#2{\@therule \@thick#1\@length\dimexpr#2/2 \@depth\z@} +\def\tabu@l@@d@rs #1#2#3#4#5{%% width, dash, dash color, gap, gap color + \global\setbox \tabu@leads=\@box{% + {#3\tabu@therule{#1}{#2}}% + \ifx\\#5\\\@skip#4\else{#5\tabu@therule{#1}{#4*2}}\fi + {#3\tabu@therule{#1}{#2}}}% + \global\setbox\tabu@leads=\@box to\@elt\tabu@leads{\@ss + {#3\tabu@therule{#1}{#2}}\@unbox\tabu@leads}% + \edef\tabu@theleaders ##1{\def\noexpand\tabu@theleaders {% + {##1\tabu@therule{#1}{#2}}% + \xleaders \copy\tabu@leads \@ss + \tabu@therule{0pt}{-#2}{##1\tabu@therule{#1}{#2}}}% + }\tabu@theleaders{#3}% +}% \tabu@l@@d@rs +%% \tabu \endtabu \tabu* \longtabu \endlongtabu \longtabu* ---------- +\newcommand*\tabu {\tabu@longfalse + \ifmmode \def\tabu@ {\array}\def\endtabu {\endarray}% + \else \def\tabu@ {\tabu@tabular}\def\endtabu {\endtabular}\fi + \expandafter\let\csname tabu*\endcsname \tabu + \expandafter\def\csname endtabu*\endcsname{\endtabu}% + \tabu@spreadfalse \tabu@negcoeffalse \tabu@settarget +}% {tabu} +\let\tabu@tabular \tabular % +\expandafter\def\csname tabu*\endcsname{\tabuscantokenstrue \tabu} +\newcommand*\longtabu {\tabu@longtrue + \ifmmode\PackageError{tabu}{longtabu not allowed in math mode}\fi + \def\tabu@{\longtable}\def\endlongtabu{\endlongtable}% + \LTchunksize=\@M + \expandafter\let\csname tabu*\endcsname \tabu + \expandafter\def\csname endlongtabu*\endcsname{\endlongtabu}% + \let\LT@startpbox \tabu@LT@startpbox % \everypar{ array struts } + \tabu@spreadfalse \tabu@negcoeffalse \tabu@settarget +}% {longtabu} +\expandafter\def\csname longtabu*\endcsname{\tabuscantokenstrue \longtabu} +\def\tabu@nolongtabu{\PackageError{tabu} + {longtabu requires the longtable package}\@ehd} +%% Read the target and then : \tabular or \@array ------------------ +\def\tabu@settarget {\futurelet\@let@token \tabu@sett@rget } +\def\tabu@sett@rget {\tabu@target \z@ + \ifcase \ifx \bgroup\@let@token \z@ \else + \ifx \@sptoken\@let@token \@ne \else + \if t\@let@token \tw@ \else + \if s\@let@token \thr@@\else + \z@\fi\fi\fi\fi + \expandafter\tabu@begin + \or \expandafter\tabu@gobblespace\expandafter\tabu@settarget + \or \expandafter\tabu@to + \or \expandafter\tabu@spread + \fi +}% \tabu@sett@rget +\def\tabu@to to{\def\tabu@halignto{to}\tabu@gettarget} +\def\tabu@spread spread{\tabu@spreadtrue\def\tabu@halignto{spread}\tabu@gettarget} +\def\tabu@gettarget {\afterassignment\tabu@linegoaltarget \tabu@target } +\def\tabu@linegoaltarget {\futurelet\tabu@temp \tabu@linegoalt@rget } +\def\tabu@linegoalt@rget {% + \ifx \tabu@temp\LNGL@setlinegoal + \LNGL@setlinegoal \expandafter \@firstoftwo \fi % @gobbles \LNGL@setlinegoal + \tabu@begin +}% \tabu@linegoalt@rget +\def\tabu@begin #1#{% + \iftabu@measuring \expandafter\tabu@nestedmeasure \fi + \ifdim \tabu@target=\z@ \let\tabu@halignto \@empty + \else \edef\tabu@halignto{\tabu@halignto\the\tabu@target}% + \fi + \@testopt \tabu@tabu@ \tabu@aligndefault #1\@nil +}% \tabu@begin +\long\def\tabu@tabu@ [#1]#2\@nil #3{\tabu@setup + \def\tabu@align {#1}\def\tabu@savedpream{\NC@find #3}% + \tabu@ [\tabu@align ]#2{#3\tabu@rewritefirst }% +}% \tabu@tabu@ +\def\tabu@nestedmeasure {% + \ifodd 1\iftabu@spread \else \ifdim\tabu@target=\z@ \else 0 \fi\fi\relax + \tabu@spreadtrue + \else \begingroup \iffalse{\fi \ifnum0=`}\fi + \toks@{}\def\tabu@stack{b}% + \expandafter\tabu@collectbody\expandafter\tabu@quickrule + \expandafter\endgroup + \fi +}% \tabu@nestedmeasure +\def\tabu@quickrule {\indent\vrule height\z@ depth\z@ width\tabu@target} +%% \tabu@setup \tabu@init \tabu@indent +\def\tabu@setup{\tabu@alloc@ + \ifcase \tabu@nested + \ifmmode \else \iftabu@spread\else \ifdim\tabu@target=\z@ + \let\tabu@afterendpar \par + \fi\fi\fi + \def\tabu@aligndefault{c}\tabu@init \tabu@indent + \else % + \def\tabu@aligndefault{t}\let\tabudefaulttarget \linewidth + \fi + \let\tabu@thetarget \tabudefaulttarget \let\tabu@restored \@undefined + \edef\tabu@NC@list{\the\NC@list}\NC@list{\NC@do \tabu@rewritefirst}% + \everycr{}\let\@startpbox \tabu@startpbox % for nested tabu inside longtabu... + \let\@endpbox \tabu@endpbox % idem " " " " " " + \let\@tabarray \tabu@tabarray % idem " " " " " " + \tabu@setcleanup \tabu@setreset +}% \tabu@setup +\def\tabu@init{\tabu@starttimer \tabu@measuringfalse + \edef\tabu@hfuzz {\the\dimexpr\hfuzz+1sp}\global\tabu@footnotes{}% + \let\firsthline \tabu@firsthline \let\lasthline \tabu@lasthline + \let\firstline \tabu@firstline \let\lastline \tabu@lastline + \let\hline \tabu@hline \let\@xhline \tabu@xhline + \let\color \tabu@color \let\@arstrutbox \tabu@arstrutbox + \iftabu@colortbl\else\let\LT@@hline \tabu@LT@@hline \fi + \tabu@trivlist % + \let\@footnotetext \tabu@footnotetext \let\@xfootnotetext \tabu@xfootnotetext + \let\@xfootnote \tabu@xfootnote \let\centering \tabu@centering + \let\raggedright \tabu@raggedright \let\raggedleft \tabu@raggedleft + \let\tabudecimal \tabu@tabudecimal \let\Centering \tabu@Centering + \let\RaggedRight \tabu@RaggedRight \let\RaggedLeft \tabu@RaggedLeft + \let\justifying \tabu@justifying \let\rowfont \tabu@rowfont + \let\fbox \tabu@fbox \let\color@b@x \tabu@color@b@x + \let\tabu@@everycr \everycr \let\tabu@@everypar \everypar + \let\tabu@prepnext@tokORI \prepnext@tok\let\prepnext@tok \tabu@prepnext@tok + \let\tabu@multicolumnORI\multicolumn \let\multicolumn \tabu@multicolumn + \let\tabu@startpbox \@startpbox % for nested tabu inside longtabu pfff !!! + \let\tabu@endpbox \@endpbox % idem " " " " " " " + \let\tabu@tabarray \@tabarray % idem " " " " " " " + \tabu@adl@fix \let\endarray \tabu@endarray % colortbl & arydshln (delarray) + \iftabu@colortbl\CT@everycr\expandafter{\expandafter\iftabu@everyrow \the\CT@everycr \fi}\fi +}% \tabu@init +\def\tabu@indent{% correction for indentation + \ifdim \parindent>\z@\ifx \linewidth\tabudefaulttarget + \everypar\expandafter{% + \the\everypar\everypar\expandafter{\the\everypar}% + \setbox\z@=\lastbox + \ifdim\wd\z@>\z@ \edef\tabu@thetarget + {\the\dimexpr -\wd\z@+\tabudefaulttarget}\fi + \box\z@}% + \fi\fi +}% \tabu@indent +\def\tabu@setcleanup {% saves last global assignments + \ifodd 1\ifmmode \else \iftabu@long \else 0\fi\fi\relax + \def\tabu@aftergroupcleanup{% + \def\tabu@aftergroupcleanup{\aftergroup\tabu@cleanup}}% + \else + \def\tabu@aftergroupcleanup{% + \aftergroup\aftergroup\aftergroup\tabu@cleanup + \let\tabu@aftergroupcleanup \relax}% + \fi + \let\tabu@arc@Gsave \tabu@arc@G + \let\tabu@arc@G \tabu@arc@L % + \let\tabu@drsc@Gsave \tabu@drsc@G + \let\tabu@drsc@G \tabu@drsc@L % + \let\tabu@ls@Gsave \tabu@ls@G + \let\tabu@ls@G \tabu@ls@L % + \let\tabu@rc@Gsave \tabu@rc@G + \let\tabu@rc@G \tabu@rc@L % + \let\tabu@evr@Gsave \tabu@evr@G + \let\tabu@evr@G \tabu@evr@L % + \let\tabu@celllalign@save \tabu@celllalign + \let\tabu@cellralign@save \tabu@cellralign + \let\tabu@cellleft@save \tabu@cellleft + \let\tabu@cellright@save \tabu@cellright + \let\tabu@@celllalign@save \tabu@@celllalign + \let\tabu@@cellralign@save \tabu@@cellralign + \let\tabu@@cellleft@save \tabu@@cellleft + \let\tabu@@cellright@save \tabu@@cellright + \let\tabu@rowfontreset@save \tabu@rowfontreset + \let\tabu@@rowfontreset@save\tabu@@rowfontreset + \let\tabu@rowfontreset \@empty + \edef\tabu@alloc@save {\the\tabu@alloc}% restore at \tabu@reset + \edef\c@taburow@save {\the\c@taburow}% + \edef\tabu@naturalX@save {\the\tabu@naturalX}% + \let\tabu@naturalXmin@save \tabu@naturalXmin + \let\tabu@naturalXmax@save \tabu@naturalXmax + \let\tabu@mkarstrut@save \tabu@mkarstrut + \edef\tabu@clarstrut{% + \extrarowheight \the\dimexpr \ht\@arstrutbox-\ht\strutbox \relax + \extrarowdepth \the\dimexpr \dp\@arstrutbox-\dp\strutbox \relax + \let\noexpand\@arraystretch \@ne \noexpand\tabu@rearstrut}% +}% \tabu@setcleanup +\def\tabu@cleanup {\begingroup + \globaldefs\@ne \tabu@everyrowtrue + \let\tabu@arc@G \tabu@arc@Gsave + \let\CT@arc@ \tabu@arc@G + \let\tabu@drsc@G \tabu@drsc@Gsave + \let\CT@drsc@ \tabu@drsc@G + \let\tabu@ls@G \tabu@ls@Gsave + \let\tabu@ls@ \tabu@ls@G + \let\tabu@rc@G \tabu@rc@Gsave + \let\tabu@rc@ \tabu@rc@G + \let\CT@do@color \relax + \let\tabu@evr@G \tabu@evr@Gsave + \let\tabu@celllalign \tabu@celllalign@save + \let\tabu@cellralign \tabu@cellralign@save + \let\tabu@cellleft \tabu@cellleft@save + \let\tabu@cellright \tabu@cellright@save + \let\tabu@@celllalign \tabu@@celllalign@save + \let\tabu@@cellralign \tabu@@cellralign@save + \let\tabu@@cellleft \tabu@@cellleft@save + \let\tabu@@cellright \tabu@@cellright@save + \let\tabu@rowfontreset \tabu@rowfontreset@save + \let\tabu@@rowfontreset \tabu@@rowfontreset@save + \tabu@naturalX =\tabu@naturalX@save + \let\tabu@naturalXmax \tabu@naturalXmax@save + \let\tabu@naturalXmin \tabu@naturalXmin@save + \let\tabu@mkarstrut \tabu@mkarstrut@save + \c@taburow =\c@taburow@save + \ifcase \tabu@nested \tabu@alloc \m@ne\fi + \endgroup % + \ifcase \tabu@nested + \the\tabu@footnotes \global\tabu@footnotes{}% + \tabu@afterendpar \tabu@elapsedtime + \fi + \tabu@clarstrut + \everyrow\expandafter {\tabu@evr@G}% +}% \tabu@cleanup +\let\tabu@afterendpar \relax +\def\tabu@setreset {% + \edef\tabu@savedparams {% \relax for \tabu@message@save + \ifmmode \col@sep \the\arraycolsep + \else \col@sep \the\tabcolsep \fi \relax + \arrayrulewidth \the\arrayrulewidth \relax + \doublerulesep \the\doublerulesep \relax + \extratabsurround \the\extratabsurround \relax + \extrarowheight \the\extrarowheight \relax + \extrarowdepth \the\extrarowdepth \relax + \abovetabulinesep \the\abovetabulinesep \relax + \belowtabulinesep \the\belowtabulinesep \relax + \def\noexpand\arraystretch{\arraystretch}% + \ifdefined\minrowclearance \minrowclearance\the\minrowclearance\relax\fi}% + \begingroup + \@temptokena\expandafter{\tabu@savedparams}% => only for \savetabu / \usetabu + \ifx \tabu@arc@L\relax \else \tabu@setsave \tabu@arc@L \fi + \ifx \tabu@drsc@L\relax \else \tabu@setsave \tabu@drsc@L \fi + \tabu@setsave \tabu@ls@L \tabu@setsave \tabu@evr@L + \expandafter \endgroup \expandafter + \def\expandafter\tabu@saved@ \expandafter{\the\@temptokena + \let\tabu@arc@G \tabu@arc@L + \let\tabu@drsc@G \tabu@drsc@L + \let\tabu@ls@G \tabu@ls@L + \let\tabu@rc@G \tabu@rc@L + \let\tabu@evr@G \tabu@evr@L}% + \def\tabu@reset{\tabu@savedparams + \tabu@everyrowtrue \c@taburow \z@ + \let\CT@arc@ \tabu@arc@L + \let\CT@drsc@ \tabu@drsc@L + \let\tabu@ls@ \tabu@ls@L + \let\tabu@rc@ \tabu@rc@L + \global\tabu@alloc \tabu@alloc@save + \everyrow\expandafter{\tabu@evr@L}}% +}% \tabu@reset +\def\tabu@setsave #1{\expandafter\tabu@sets@ve #1\@nil{#1}} +\long\def\tabu@sets@ve #1\@nil #2{\@temptokena\expandafter{\the\@temptokena \def#2{#1}}} +%% The Rewriting Process ------------------------------------------- +\def\tabu@newcolumntype #1{% + \expandafter\tabu@new@columntype + \csname NC@find@\string#1\expandafter\endcsname + \csname NC@rewrite@\string#1\endcsname + {#1}% +}% \tabu@newcolumntype +\def\tabu@new@columntype #1#2#3{% + \def#1##1#3{\NC@{##1}}% + \let#2\relax \newcommand*#2% +}% \tabu@new@columntype +\def\tabu@privatecolumntype #1{% + \expandafter\tabu@private@columntype + \csname NC@find@\string#1\expandafter\endcsname + \csname NC@rewrite@\string#1\expandafter\endcsname + \csname tabu@NC@find@\string#1\expandafter\endcsname + \csname tabu@NC@rewrite@\string#1\endcsname + {#1}% +}% \tabu@privatecolumntype +\def\tabu@private@columntype#1#2#3#4{% + \g@addto@macro\tabu@privatecolumns{\let#1#3\let#2#4}% + \tabu@new@columntype#3#4% +}% \tabu@private@columntype +\let\tabu@privatecolumns \@empty +\newcommand*\tabucolumn [1]{\expandafter \def \expandafter + \tabu@highprioritycolumns\expandafter{\tabu@highprioritycolumns + \NC@do #1}}% +\let\tabu@highprioritycolumns \@empty +%% The | ``column'' : rewriting process -------------------------- +\tabu@privatecolumntype |{\tabu@rewritevline} +\newcommand*\tabu@rewritevline[1][]{\tabu@vlinearg{#1}% + \expandafter \NC@find \tabu@rewritten} +\def\tabu@lines #1{% + \ifx|#1\else \tabu@privatecolumntype #1{\tabu@rewritevline}\fi + \NC@list\expandafter{\the\NC@list \NC@do #1}% +}% \tabu@lines@ +\def\tabu@vlinearg #1{% + \ifx\\#1\\\def\tabu@thestyle {\tabu@ls@}% + \else\tabu@getline {#1}% + \fi + \def\tabu@rewritten ##1{\def\tabu@rewritten{!{##1\tabu@thevline}}% + }\expandafter\tabu@rewritten\expandafter{\tabu@thestyle}% + \expandafter \tabu@keepls \tabu@thestyle \@nil +}% \tabu@vlinearg +\def\tabu@keepls #1\@nil{% + \ifcat $\@cdr #1\@nil $% + \ifx \relax#1\else + \ifx \tabu@ls@#1\else + \let#1\relax + \xdef\tabu@mkpreambuffer{\tabu@mkpreambuffer + \tabu@savels\noexpand#1}\fi\fi\fi +}% \tabu@keepls +\def\tabu@thevline {\begingroup + \ifdefined\tabu@leaders + \setbox\@tempboxa=\vtop to\dimexpr + \ht\@arstrutbox+\dp\@arstrutbox{{\tabu@thevleaders}}% + \ht\@tempboxa=\ht\@arstrutbox \dp\@tempboxa=\dp\@arstrutbox + \box\@tempboxa + \else + \tabu@thevrule + \fi \endgroup +}% \tabu@thevline +\def\tabu@savels #1{% + \expandafter\let\csname\string#1\endcsname #1% + \expandafter\def\expandafter\tabu@reset\expandafter{\tabu@reset + \tabu@resetls#1}}% +\def\tabu@resetls #1{\expandafter\let\expandafter#1\csname\string#1\endcsname}% +%% \multicolumn inside tabu environment ----------------------------- +\tabu@newcolumntype \tabu@rewritemulticolumn{% + \aftergroup \tabu@endrewritemulticolumn % after \@mkpream group + \NC@list{\NC@do *}\tabu@textbar \tabu@lines + \tabu@savedecl + \tabu@privatecolumns + \NC@list\expandafter{\the\expandafter\NC@list \tabu@NC@list}% + \let\tabu@savels \relax + \NC@find +}% \tabu@rewritemulticolumn +\def\tabu@endrewritemulticolumn{\gdef\tabu@mkpreambuffer{}\endgroup} +\def\tabu@multicolumn{\tabu@ifenvir \tabu@multic@lumn \tabu@multicolumnORI} +\long\def\tabu@multic@lumn #1#2#3{\multispan{#1}\begingroup + \tabu@everyrowtrue + \NC@list{\NC@do \tabu@rewritemulticolumn}% + \expandafter\@gobbletwo % gobbles \multispan{#1} + \tabu@multicolumnORI{#1}{\tabu@rewritemulticolumn #2}% + {\iftabuscantokens \tabu@rescan \else \expandafter\@firstofone \fi + {#3}}% +}% \tabu@multic@lumn +%% The X column(s): rewriting process ----------------------------- +\tabu@privatecolumntype X[1][]{\begingroup \tabu@siunitx{\endgroup \tabu@rewriteX {#1}}} +\def\tabu@nosiunitx #1{#1{}{}\expandafter \NC@find \tabu@rewritten } +\def\tabu@siunitx #1{\@ifnextchar \bgroup + {\tabu@rewriteX@Ss{#1}} + {\tabu@nosiunitx{#1}}} +\def\tabu@rewriteX@Ss #1#2{\@temptokena{}% + \@defaultunits \let\tabu@temp =#2\relax\@nnil + \ifodd 1\ifx S\tabu@temp \else \ifx s\tabu@temp \else 0 \fi\fi + \def\NC@find{\def\NC@find >####1####2<####3\relax{#1 {####1}{####3}% + }\expandafter\NC@find \the\@temptokena \relax + }\expandafter\NC@rewrite@S \@gobble #2\relax + \else \tabu@siunitxerror + \fi + \expandafter \NC@find \tabu@rewritten +}% \tabu@rewriteX@Ss +\def\tabu@siunitxerror {\PackageError{tabu}{Not a S nor s column ! + \MessageBreak X column can only embed siunitx S or s columns}\@ehd +}% \tabu@siunitxerror +\def\tabu@rewriteX #1#2#3{\tabu@Xarg {#1}{#2}{#3}% + \iftabu@measuring + \else \tabu@measuringtrue % first X column found in the preamble + \let\@halignto \relax \let\tabu@halignto \relax + \iftabu@spread \tabu@spreadtarget \tabu@target \tabu@target \z@ + \else \tabu@spreadtarget \z@ \fi + \ifdim \tabu@target=\z@ + \setlength\tabu@target \tabu@thetarget + \tabu@message{\tabu@message@defaulttarget}% + \else \tabu@message{\tabu@message@target}\fi + \fi +}% \tabu@rewriteX +\def\tabu@rewriteXrestore #1#2#3{\let\@halignto \relax + \def\tabu@rewritten{l}} +\def\tabu@Xarg #1#2#3{% + \advance\tabu@Xcol \@ne \let\tabu@Xlcr \@empty + \let\tabu@Xdisp \@empty \let\tabu@Xmath \@empty + \ifx\\#1\\% + \def\tabu@rewritten{p}\tabucolX \p@ % + \else + \let\tabu@rewritten \@empty \let\tabu@temp \@empty \tabucolX \z@ + \tabu@Xparse {}#1\relax + \fi + \tabu@Xrewritten{#2}{#3}% +}% \tabu@Xarg +\def\tabu@Xparse #1{\futurelet\@let@token \tabu@Xtest} +\expandafter\def\expandafter\tabu@Xparsespace\space{\tabu@Xparse{}} +\def\tabu@Xtest{% + \ifcase \ifx \relax\@let@token \z@ \else + \if ,\@let@token \m@ne\else + \if p\@let@token 1\else + \if m\@let@token 2\else + \if b\@let@token 3\else + \if l\@let@token 4\else + \if c\@let@token 5\else + \if r\@let@token 6\else + \if j\@let@token 7\else + \if L\@let@token 8\else + \if C\@let@token 9\else + \if R\@let@token 10\else + \if J\@let@token 11\else + \ifx \@sptoken\@let@token 12\else + \if .\@let@token 13\else + \if -\@let@token 13\else + \ifcat $\@let@token 14\else + 15\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\relax + \or \tabu@Xtype {p}% + \or \tabu@Xtype {m}% + \or \tabu@Xtype {b}% + \or \tabu@Xalign \raggedright\relax + \or \tabu@Xalign \centering\relax + \or \tabu@Xalign \raggedleft\relax + \or \tabu@Xalign \tabu@justify\relax + \or \tabu@Xalign \RaggedRight\raggedright + \or \tabu@Xalign \Centering\centering + \or \tabu@Xalign \RaggedLeft\raggedleft + \or \tabu@Xalign \justifying\tabu@justify + \or \expandafter \tabu@Xparsespace + \or \expandafter \tabu@Xcoef + \or \expandafter \tabu@Xm@th + \or \tabu@Xcoef{}% + \else\expandafter \tabu@Xparse + \fi +}% \tabu@Xtest +\def\tabu@Xalign #1#2{% + \ifx \tabu@Xlcr\@empty \else \PackageWarning{tabu} + {Duplicate horizontal alignment specification}\fi + \ifdefined#1\def\tabu@Xlcr{#1}\let#1\relax + \else \def\tabu@Xlcr{#2}\let#2\relax\fi + \expandafter\tabu@Xparse +}% \tabu@Xalign +\def\tabu@Xtype #1{% + \ifx \tabu@rewritten\@empty \else \PackageWarning{tabu} + {Duplicate vertical alignment specification}\fi + \def\tabu@rewritten{#1}\expandafter\tabu@Xparse +}% \tabu@Xtype +\def\tabu@Xcoef#1{\edef\tabu@temp{\tabu@temp#1}% + \afterassignment\tabu@Xc@ef \tabu@cnt\number\if-#10\fi +}% \tabu@Xcoef +\def\tabu@Xc@ef{\advance\tabucolX \tabu@temp\the\tabu@cnt\p@ + \tabu@Xparse{}% +}% \tabu@Xc@ef +\def\tabu@Xm@th #1{\futurelet \@let@token \tabu@Xd@sp} +\def\tabu@Xd@sp{\let\tabu@Xmath=$% + \ifx $\@let@token \def\tabu@Xdisp{\displaystyle}% + \expandafter\tabu@Xparse + \else \expandafter\tabu@Xparse\expandafter{\expandafter}% + \fi +}% \tabu@Xd@sp +\def\tabu@Xrewritten {% + \ifx \tabu@rewritten\@empty \def\tabu@rewritten{p}\fi + \ifdim \tabucolX<\z@ \tabu@negcoeftrue + \else\ifdim \tabucolX=\z@ \tabucolX \p@ + \fi\fi + \edef\tabu@temp{{\the\tabu@Xcol}{\tabu@strippt\tabucolX}}% + \edef\tabu@Xcoefs{\tabu@Xcoefs \tabu@ \tabu@temp}% + \edef\tabu@rewritten ##1##2{\def\noexpand\tabu@rewritten{% + >{\tabu@Xlcr \ifx$\tabu@Xmath$\tabu@Xdisp\fi ##1}% + \tabu@rewritten {\tabu@hsize \tabu@temp}% + <{##2\ifx$\tabu@Xmath$\fi}}% + }\tabu@rewritten +}% \tabu@Xrewritten +\def\tabu@hsize #1#2{% + \ifdim #2\p@<\z@ + \ifdim \tabucolX=\maxdimen \tabu@wd{#1}\else + \ifdim \tabu@wd{#1}<-#2\tabucolX \tabu@wd{#1}\else -#2\tabucolX\fi + \fi + \else #2\tabucolX + \fi +}% \tabu@hsize +%% \usetabu and \preamble: rewriting process --------------------- +\tabu@privatecolumntype \usetabu [1]{% + \ifx\\#1\\\tabu@saveerr{}\else + \@ifundefined{tabu@saved@\string#1} + {\tabu@saveerr{#1}} + {\let\tabu@rewriteX \tabu@rewriteXrestore + \csname tabu@saved@\string#1\expandafter\endcsname\expandafter\@ne}% + \fi +}% \NC@rewrite@\usetabu +\tabu@privatecolumntype \preamble [1]{% + \ifx\\#1\\\tabu@saveerr{}\else + \@ifundefined{tabu@saved@\string#1} + {\tabu@saveerr{#1}} + {\csname tabu@saved@\string#1\expandafter\endcsname\expandafter\z@}% + \fi +}% \NC@rewrite@\preamble +%% Controlling the rewriting process ------------------------------- +\tabu@newcolumntype \tabu@rewritefirst{% + \iftabu@long \aftergroup \tabu@longpream % + \else \aftergroup \tabu@pream + \fi + \let\tabu@ \relax \let\tabu@hsize \relax + \let\tabu@Xcoefs \@empty \let\tabu@savels \relax + \tabu@Xcol \z@ \tabu@cnt \tw@ + \gdef\tabu@mkpreambuffer{\tabu@{}}\tabu@measuringfalse + \global\setbox\@arstrutbox \box\@arstrutbox + \NC@list{\NC@do *}\tabu@textbar \tabu@lines + \NC@list\expandafter{\the\NC@list \NC@do X}% + \iftabu@siunitx % + \NC@list\expandafter{\the\NC@list \NC@do S\NC@do s}\fi + \NC@list\expandafter{\the\expandafter\NC@list \tabu@highprioritycolumns}% + \expandafter\def\expandafter\tabu@NC@list\expandafter{% + \the\expandafter\NC@list \tabu@NC@list}% % * | X S + \NC@list\expandafter{\expandafter \NC@do \expandafter\usetabu + \expandafter \NC@do \expandafter\preamble + \the\NC@list \NC@do \tabu@rewritemiddle + \NC@do \tabu@rewritelast}% + \tabu@savedecl + \tabu@privatecolumns + \edef\tabu@prev{\the\@temptokena}\NC@find \tabu@rewritemiddle +}% NC@rewrite@\tabu@rewritefirst +\tabu@newcolumntype \tabu@rewritemiddle{% + \edef\tabu@temp{\the\@temptokena}\NC@find \tabu@rewritelast +}% \NC@rewrite@\tabu@rewritemiddle +\tabu@newcolumntype \tabu@rewritelast{% + \ifx \tabu@temp\tabu@prev \advance\tabu@cnt \m@ne + \NC@list\expandafter{\tabu@NC@list \NC@do \tabu@rewritemiddle + \NC@do \tabu@rewritelast}% + \else \let\tabu@prev\tabu@temp + \fi + \ifcase \tabu@cnt \expandafter\tabu@endrewrite + \else \expandafter\NC@find \expandafter\tabu@rewritemiddle + \fi +}% \NC@rewrite@\tabu@rewritelast +%% Choosing the strategy -------------------------------------------- +\def\tabu@endrewrite {% + \let\tabu@temp \NC@find + \ifx \@arrayright\relax \let\@arrayright \@empty \fi + \count@=% + \ifx \@finalstrut\tabu@finalstrut \z@ % outer in mode 0 print + \iftabu@measuring + \xdef\tabu@mkpreambuffer{\tabu@mkpreambuffer + \tabu@target \csname tabu@\the\tabu@nested.T\endcsname + \tabucolX \csname tabu@\the\tabu@nested.X\endcsname + \edef\@halignto {\ifx\@arrayright\@empty to\tabu@target\fi}}% + \fi + \else\iftabu@measuring 4 % X columns + \xdef\tabu@mkpreambuffer{\tabu@{\tabu@mkpreambuffer + \tabu@target \the\tabu@target + \tabu@spreadtarget \the\tabu@spreadtarget}% + \def\noexpand\tabu@Xcoefs{\tabu@Xcoefs}% + \edef\tabu@halignto{\ifx \@arrayright\@empty to\tabu@target\fi}}% + \let\tabu@Xcoefs \relax + \else\ifcase\tabu@nested \thr@@ % outer, no X + \global\let\tabu@afterendpar \relax + \else \@ne % inner, no X, outer in mode 1 or 2 + \fi + \ifdefined\tabu@usetabu + \else \ifdim\tabu@target=\z@ + \else \let\tabu@temp \tabu@extracolsep + \fi\fi + \fi + \fi + \xdef\tabu@mkpreambuffer{\count@ \the\count@ \tabu@mkpreambuffer}% + \tabu@temp +}% \tabu@endrewrite +\def\tabu@extracolsep{\@defaultunits \expandafter\let + \expandafter\tabu@temp \expandafter=\the\@temptokena \relax\@nnil + \ifx \tabu@temp\@sptoken + \expandafter\tabu@gobblespace \expandafter\tabu@extracolsep + \else + \edef\tabu@temp{\noexpand\NC@find + \if |\noexpand\tabu@temp @% + \else\if !\noexpand\tabu@temp @% + \else !% + \fi\fi + {\noexpand\extracolsep\noexpand\@flushglue}}% + \fi + \tabu@temp +}% \tabu@extrac@lsep +%% Implementing the strategy ---------------------------------------- +\long\def\tabu@pream #1\@preamble {% + \let\tabu@ \tabu@@ \tabu@mkpreambuffer \tabu@aftergroupcleanup + \NC@list\expandafter {\tabu@NC@list}% in case of nesting... + \ifdefined\tabu@usetabu \tabu@usetabu \tabu@target \z@ \fi + \let\tabu@savedpreamble \@preamble + \global\let\tabu@elapsedtime \relax + \tabu@thebody ={#1\tabu@aftergroupcleanup}% + \tabu@thebody =\expandafter{\the\expandafter\tabu@thebody + \@preamble}% + \edef\tabuthepreamble {\the\tabu@thebody}% ( no @ allowed for \scantokens ) + \tabu@select +}% \tabu@pream +\long\def\tabu@longpream #1\LT@bchunk #2\LT@bchunk{% + \let\tabu@ \tabu@@ \tabu@mkpreambuffer \tabu@aftergroupcleanup + \NC@list\expandafter {\tabu@NC@list}% in case of nesting... + \let\tabu@savedpreamble \@preamble + \global\let\tabu@elapsedtime \relax + \tabu@thebody ={#1\LT@bchunk #2\tabu@aftergroupcleanup \LT@bchunk}% + \edef\tabuthepreamble {\the\tabu@thebody}% ( no @ allowed for \scantokens ) + \tabu@select +}% \tabu@longpream +\def\tabu@select {% + \ifnum\tabu@nested>\z@ \tabuscantokensfalse \fi + \ifnum \count@=\@ne \iftabu@measuring \count@=\tw@ \fi\fi + \ifcase \count@ + \global\let\tabu@elapsedtime \relax + \tabu@seteverycr + \expandafter \tabuthepreamble % vertical adjustment (inherited from outer) + \or % exit in vertical measure + struts per cell because no X and outer in mode 3 + \tabu@evr{\tabu@verticalinit}\tabu@celllalign@def{\tabu@verticalmeasure}% + \def\tabu@cellralign{\tabu@verticalspacing}% + \tabu@seteverycr + \expandafter \tabuthepreamble + \or % exit without measure because no X and outer in mode 4 + \tabu@evr{}\tabu@celllalign@def{}\let\tabu@cellralign \@empty + \tabu@seteverycr + \expandafter \tabuthepreamble + \else % needs trials + \tabu@evr{}\tabu@celllalign@def{}\let\tabu@cellralign \@empty + \tabu@savecounters + \expandafter \tabu@setstrategy + \fi +}% \tabu@select +\def\tabu@@ {\gdef\tabu@mkpreambuffer} +%% Protections to set up before trials ------------------------------ +\def\tabu@setstrategy {\begingroup % + \tabu@trialh@@k \tabu@cnt \z@ % number of trials + \hbadness \@M \let\hbadness \@tempcnta + \hfuzz \maxdimen \let\hfuzz \@tempdima + \let\write \tabu@nowrite\let\GenericError \tabu@GenericError + \let\savetabu \@gobble \let\tabudefaulttarget \linewidth + \let\@footnotetext \@gobble \let\@xfootnote \tabu@xfootnote + \let\color \tabu@nocolor\let\rowcolor \tabu@norowcolor + \let\tabu@aftergroupcleanup \relax % only after the last trial + \tabu@mkpreambuffer + \ifnum \count@>\thr@@ \let\@halignto \@empty \tabucolX@init + \def\tabu@lasttry{\m@ne\p@}\fi + \begingroup \iffalse{\fi \ifnum0=`}\fi + \toks@{}\def\tabu@stack{b}\iftabuscantokens \endlinechar=10 \obeyspaces \fi % + \tabu@collectbody \tabu@strategy % +}% \tabu@setstrategy +\def\tabu@savecounters{% + \def\@elt ##1{\csname c@##1\endcsname\the\csname c@##1\endcsname}% + \edef\tabu@clckpt {\begingroup \globaldefs=\@ne \cl@@ckpt \endgroup}\let\@elt \relax +}% \tabu@savecounters +\def\tabucolX@init {% \tabucolX <= \tabu@target / (sum coefs > 0) + \dimen@ \z@ \tabu@Xsum \z@ \tabucolX \z@ \let\tabu@ \tabu@Xinit \tabu@Xcoefs + \ifdim \dimen@>\z@ + \@tempdima \dimexpr \tabu@target *\p@/\dimen@ + \tabu@hfuzz\relax + \ifdim \tabucolX<\@tempdima \tabucolX \@tempdima \fi + \fi +}% \tabucolX@init +\def\tabu@Xinit #1#2{\tabu@Xcol #1 \advance \tabu@Xsum + \ifdim #2\p@>\z@ #2\p@ \advance\dimen@ #2\p@ + \else -#2\p@ \tabu@negcoeftrue + \@tempdima \dimexpr \tabu@target*\p@/\dimexpr-#2\p@\relax \relax + \ifdim \tabucolX<\@tempdima \tabucolX \@tempdima \fi + \tabu@wddef{#1}{0pt}% + \fi +}% \tabu@Xinit +%% Collecting the environment body ---------------------------------- +\long\def\tabu@collectbody #1#2\end #3{% + \edef\tabu@stack{\tabu@pushbegins #2\begin\end\expandafter\@gobble\tabu@stack}% + \ifx \tabu@stack\@empty + \toks@\expandafter{\expandafter\tabu@thebody\expandafter{\the\toks@ #2}% + \def\tabu@end@envir{\end{#3}}% + \iftabuscantokens + \iftabu@long \def\tabu@endenvir {\end{#3}\tabu@gobbleX}% + \else \def\tabu@endenvir {\let\endarray \@empty + \end{#3}\tabu@gobbleX}% + \fi + \else \def\tabu@endenvir {\end{#3}}\fi}% + \let\tabu@collectbody \tabu@endofcollect + \else\def\tabu@temp{#3}% + \ifx \tabu@temp\@empty \toks@\expandafter{\the\toks@ #2\end }% + \else \ifx\tabu@temp\tabu@@spxiii \toks@\expandafter{\the\toks@ #2\end #3}% + \else \ifx\tabu@temp\tabu@X \toks@\expandafter{\the\toks@ #2\end #3}% + \else \toks@\expandafter{\the\toks@ #2\end{#3}}% + \fi\fi\fi + \fi + \tabu@collectbody{#1}% +}% \tabu@collectbody +\long\def\tabu@pushbegins#1\begin#2{\ifx\end#2\else b\expandafter\tabu@pushbegins\fi}% +\def\tabu@endofcollect #1{\ifnum0=`{}\fi + \expandafter\endgroup \the\toks@ #1% +}% \tabu@endofcollect +%% The trials: switching between strategies ------------------------- +\def\tabu@strategy {\relax % stops \count@ assignment ! + \ifcase\count@ % case 0 = print with vertical adjustment (outer is finished) + \expandafter \tabu@endoftrials + \or % case 1 = exit in vertical measure (outer in mode 3) + \expandafter\xdef\csname tabu@\the\tabu@nested.T\endcsname{\the\tabu@target}% + \expandafter\xdef\csname tabu@\the\tabu@nested.X\endcsname{\the\tabucolX}% + \expandafter \tabu@endoftrials + \or % case 2 = exit with a rule replacing the table (outer in mode 4) + \expandafter \tabu@quickend + \or % case 3 = outer is in mode 3 because of no X + \begingroup + \tabu@evr{\tabu@verticalinit}\tabu@celllalign@def{\tabu@verticalmeasure}% + \def\tabu@cellralign{\tabu@verticalspacing}% + \expandafter \tabu@measuring + \else % case 4 = horizontal measure + \begingroup + \global\let\tabu@elapsedtime \tabu@message@etime + \long\def\multicolumn##1##2##3{\multispan{##1}}% + \let\tabu@startpboxORI \@startpbox + \iftabu@spread + \def\tabu@naturalXmax {\z@}% + \let\tabu@naturalXmin \tabu@naturalXmax + \tabu@evr{\global\tabu@naturalX \z@}% + \let\@startpbox \tabu@startpboxmeasure + \else\iftabu@negcoef + \let\@startpbox \tabu@startpboxmeasure + \else \let\@startpbox \tabu@startpboxquick + \fi\fi + \expandafter \tabu@measuring + \fi +}% \tabu@strategy +\def\tabu@measuring{\expandafter \tabu@trial \expandafter + \count@ \the\count@ \tabu@endtrial +}% \tabu@measuring +\def\tabu@trial{\iftabu@long \tabu@longtrial \else \tabu@shorttrial \fi} +\def\tabu@shorttrial {\setbox\tabu@box \hbox\bgroup \tabu@seteverycr + \ifx \tabu@savecounters\relax \else + \let\tabu@savecounters \relax \tabu@clckpt \fi + $\iftabuscantokens \tabu@rescan \else \expandafter\@secondoftwo \fi + \expandafter{\expandafter \tabuthepreamble + \the\tabu@thebody + \csname tabu@adl@endtrial\endcsname + \endarray}$\egroup % got \tabu@box +}% \tabu@shorttrial +\def\tabu@longtrial {\setbox\tabu@box \hbox\bgroup \tabu@seteverycr + \ifx \tabu@savecounters\relax \else + \let\tabu@savecounters \relax \tabu@clckpt \fi + \iftabuscantokens \tabu@rescan \else \expandafter\@secondoftwo \fi + \expandafter{\expandafter \tabuthepreamble + \the\tabu@thebody + \tabuendlongtrial}\egroup % got \tabu@box +}% \tabu@longtrial +\def\tabuendlongtrial{% no @ allowed for \scantokens + \LT@echunk \global\setbox\@ne \hbox{\unhbox\@ne}\kern\wd\@ne + \LT@get@widths +}% \tabuendlongtrial +\def\tabu@adl@endtrial{% + \crcr \noalign{\global\adl@ncol \tabu@nbcols}}% anything global is crap, junky and fails ! +\def\tabu@seteverycr {\tabu@reset + \everycr \expandafter{\the\everycr \tabu@everycr}% + \let\everycr \tabu@noeverycr % +}% \tabu@seteverycr +\def\tabu@noeverycr{{\aftergroup\tabu@restoreeverycr \afterassignment}\toks@} +\def\tabu@restoreeverycr {\let\everycr \tabu@@everycr} +\def\tabu@everycr {\iftabu@everyrow \noalign{\tabu@everyrow}\fi} +\def\tabu@endoftrials {% + \iftabuscantokens \expandafter\@firstoftwo + \else \expandafter\@secondoftwo + \fi + {\expandafter \tabu@closetrialsgroup \expandafter + \tabu@rescan \expandafter{% + \expandafter\tabuthepreamble + \the\expandafter\tabu@thebody + \iftabu@long \else \endarray \fi}} + {\expandafter\tabu@closetrialsgroup \expandafter + \tabuthepreamble + \the\tabu@thebody}% + \tabu@endenvir % Finish ! +}% \tabu@endoftrials +\def\tabu@closetrialsgroup {% + \toks@\expandafter{\tabu@endenvir}% + \edef\tabu@bufferX{\endgroup + \tabucolX \the\tabucolX + \tabu@target \the\tabu@target + \tabu@cnt \the\tabu@cnt + \def\noexpand\tabu@endenvir{\the\toks@}% + %Quid de \@halignto = \tabu@halignto ?? + }% \tabu@bufferX + \tabu@bufferX + \ifcase\tabu@nested % print out (outer in mode 0) + \global\tabu@cnt \tabu@cnt + \tabu@evr{\tabu@verticaldynamicadjustment}% + \tabu@celllalign@def{\everypar{}}\let\tabu@cellralign \@empty + \let\@finalstrut \tabu@finalstrut + \else % vertical measure of nested tabu + \tabu@evr{\tabu@verticalinit}% + \tabu@celllalign@def{\tabu@verticalmeasure}% + \def\tabu@cellralign{\tabu@verticalspacing}% + \fi + \tabu@clckpt \let\@halignto \tabu@halignto + \let\@halignto \@empty + \tabu@seteverycr + \ifdim \tabustrutrule>\z@ \ifnum\tabu@nested=\z@ + \setbox\@arstrutbox \box\voidb@x % force \@arstrutbox to be rebuilt (visible struts) + \fi\fi +}% \tabu@closetrialsgroup +\def\tabu@quickend {\expandafter \endgroup \expandafter + \tabu@target \the\tabu@target \tabu@quickrule + \let\endarray \relax \tabu@endenvir +}% \tabu@quickend +\def\tabu@endtrial {\relax % stops \count@ assignment ! + \ifcase \count@ \tabu@err % case 0 = impossible here + \or \tabu@err % case 1 = impossible here + \or \tabu@err % case 2 = impossible here + \or % case 3 = outer goes into mode 0 + \def\tabu@bufferX{\endgroup}\count@ \z@ + \else % case 4 = outer goes into mode 3 + \iftabu@spread \tabu@spreadarith % inner into mode 1 (outer in mode 3) + \else \tabu@arith % or 2 (outer in mode 4) + \fi + \count@=% + \ifcase\tabu@nested \thr@@ % outer goes into mode 3 + \else\iftabu@measuring \tw@ % outer is in mode 4 + \else \@ne % outer is in mode 3 + \fi\fi + \edef\tabu@bufferX{\endgroup + \tabucolX \the\tabucolX + \tabu@target \the\tabu@target}% + \fi + \expandafter \tabu@bufferX \expandafter + \count@ \the\count@ \tabu@strategy +}% \tabu@endtrial +\def\tabu@err{\errmessage{(tabu) Internal impossible error! (\count@=\the\count@)}} +%% The algorithms: compute the widths / stop or go on --------------- +\def\tabu@arithnegcoef {% + \@tempdima \z@ \dimen@ \z@ \let\tabu@ \tabu@arith@negcoef \tabu@Xcoefs +}% \tabu@arithnegcoef +\def\tabu@arith@negcoef #1#2{% + \ifdim #2\p@>\z@ \advance\dimen@ #2\p@ % saturated by definition + \advance\@tempdima #2\tabucolX + \else + \ifdim -#2\tabucolX <\tabu@wd{#1}% c_i X < natural width <= \tabu@target-> saturated + \advance\dimen@ -#2\p@ + \advance\@tempdima -#2\tabucolX + \else + \advance\@tempdima \tabu@wd{#1}% natural width <= c_i X => neutralised + \ifdim \tabu@wd{#1}<\tabu@target \else % neutralised + \advance\dimen@ -#2\p@ % saturated (natural width = tabu@target) + \fi + \fi + \fi +}% \tabu@arith@negcoef +\def\tabu@givespace #1#2{% here \tabu@DELTA < \z@ + \ifdim \@tempdima=\z@ + \tabu@wddef{#1}{\the\dimexpr -\tabu@DELTA*\p@/\tabu@Xsum}% + \else + \tabu@wddef{#1}{\the\dimexpr \tabu@hsize{#1}{#2} + *(\p@ -\tabu@DELTA*\p@/\@tempdima)/\p@\relax}% + \fi +}% \tabu@givespace +\def\tabu@arith {\advance\tabu@cnt \@ne + \ifnum \tabu@cnt=\@ne \tabu@message{\tabu@titles}\fi + \tabu@arithnegcoef + \@tempdimb \dimexpr \wd\tabu@box -\@tempdima \relax % + \tabu@DELTA = \dimexpr \wd\tabu@box - \tabu@target \relax + \tabu@message{\tabu@message@arith}% + \ifdim \tabu@DELTA <\tabu@hfuzz + \ifdim \tabu@DELTA<\z@ % wd (tabu)<\tabu@target ? + \let\tabu@ \tabu@givespace \tabu@Xcoefs + \advance\@tempdima \@tempdimb \advance\@tempdima -\tabu@DELTA % for message + \else % already converged: nothing to do but nearly impossible... + \fi + \tabucolX \maxdimen + \tabu@measuringfalse + \else % need for narrower X columns + \tabucolX =\dimexpr (\@tempdima -\tabu@DELTA) *\p@/\tabu@Xsum \relax + \tabu@measuringtrue + \@whilesw \iftabu@measuring\fi {% + \advance\tabu@cnt \@ne + \tabu@arithnegcoef + \tabu@DELTA =\dimexpr \@tempdima+\@tempdimb -\tabu@target \relax % always < 0 here + \tabu@message{\tabu@header + \tabu@msgalign \tabucolX { }{ }{ }{ }{ }\@@ + \tabu@msgalign \@tempdima+\@tempdimb { }{ }{ }{ }{ }\@@ + \tabu@msgalign \tabu@target { }{ }{ }{ }{ }\@@ + \tabu@msgalign@PT \dimen@ { }{}{}{}{}{}{}\@@ + \ifdim -\tabu@DELTA<\tabu@hfuzz \tabu@spaces target ok\else + \tabu@msgalign \dimexpr -\tabu@DELTA *\p@/\dimen@ {}{}{}{}{}\@@ + \fi}% + \ifdim -\tabu@DELTA<\tabu@hfuzz + \advance\@tempdima \@tempdimb % for message + \tabu@measuringfalse + \else + \advance\tabucolX \dimexpr -\tabu@DELTA *\p@/\dimen@ \relax + \fi + }% + \fi + \tabu@message{\tabu@message@reached}% + \edef\tabu@bufferX{\endgroup \tabu@cnt \the\tabu@cnt + \tabucolX \the\tabucolX + \tabu@target \the\tabu@target}% +}% \tabu@arith +\def\tabu@spreadarith {% + \dimen@ \z@ \@tempdima \tabu@naturalXmax \let\tabu@ \tabu@spread@arith \tabu@Xcoefs + \edef\tabu@naturalXmin {\the\dimexpr\tabu@naturalXmin*\dimen@/\p@}% + \@tempdimc =\dimexpr \wd\tabu@box -\tabu@naturalXmax+\tabu@naturalXmin \relax + \iftabu@measuring + \tabu@target =\dimexpr \@tempdimc+\tabu@spreadtarget \relax + \edef\tabu@bufferX{\endgroup \tabucolX \the\tabucolX \tabu@target\the\tabu@target}% + \else + \tabu@message{\tabu@message@spreadarith}% + \ifdim \dimexpr \@tempdimc+\tabu@spreadtarget >\tabu@target + \tabu@message{(tabu) spread + \ifdim \@tempdimc>\tabu@target useless here: default target used% + \else too large: reduced to fit default target\fi.}% + \else + \tabu@target =\dimexpr \@tempdimc+\tabu@spreadtarget \relax + \tabu@message{(tabu) spread: New target set to \the\tabu@target^^J}% + \fi + \begingroup \let\tabu@wddef \@gobbletwo + \@tempdimb \@tempdima + \tabucolX@init + \tabu@arithnegcoef + \wd\tabu@box =\dimexpr \wd\tabu@box +\@tempdima-\@tempdimb \relax + \expandafter\endgroup \expandafter\tabucolX \the\tabucolX + \tabu@arith + \fi +}% \tabu@spreadarith +\def\tabu@spread@arith #1#2{% + \ifdim #2\p@>\z@ \advance\dimen@ #2\p@ + \else \advance\@tempdima \tabu@wd{#1}\relax + \fi +}% \tabu@spread@arith +%% Reporting in the .log file --------------------------------------- +\def\tabu@message@defaulttarget{% + \ifnum\tabu@nested=\z@^^J(tabu) Default target: + \ifx\tabudefaulttarget\linewidth \string\linewidth + \ifdim \tabu@thetarget=\linewidth \else + -\the\dimexpr\linewidth-\tabu@thetarget\fi = + \else\ifx\tabudefaulttarget\linegoal\string\linegoal= + \fi\fi + \else (tabu) Default target (nested): \fi + \the\tabu@target \on@line + \ifnum\tabu@nested=\z@ , page \the\c@page\fi} +\def\tabu@message@target {^^J(tabu) Target specified: + \the\tabu@target \on@line, page \the\c@page} +\def\tabu@message@arith {\tabu@header + \tabu@msgalign \tabucolX { }{ }{ }{ }{ }\@@ + \tabu@msgalign \wd\tabu@box { }{ }{ }{ }{ }\@@ + \tabu@msgalign \tabu@target { }{ }{ }{ }{ }\@@ + \tabu@msgalign@PT \dimen@ { }{}{}{}{}{}{}\@@ + \ifdim \tabu@DELTA<\tabu@hfuzz giving space\else + \tabu@msgalign \dimexpr (\@tempdima-\tabu@DELTA) *\p@/\tabu@Xsum -\tabucolX {}{}{}{}{}\@@ + \fi +}% \tabu@message@arith +\def\tabu@message@spreadarith {\tabu@spreadheader + \tabu@msgalign \tabu@spreadtarget { }{ }{ }{ }{}\@@ + \tabu@msgalign \wd\tabu@box { }{ }{ }{ }{}\@@ + \tabu@msgalign -\tabu@naturalXmax { }{}{}{}{}\@@ + \tabu@msgalign \tabu@naturalXmin { }{ }{ }{ }{}\@@ + \tabu@msgalign \ifdim \dimexpr\@tempdimc>\tabu@target \tabu@target + \else \@tempdimc+\tabu@spreadtarget \fi + {}{}{}{}{}\@@} +\def\tabu@message@negcoef #1#2{ + \tabu@spaces\tabu@spaces\space * #1. X[\rem@pt#2]: + \space width = \tabu@wd {#1} + \expandafter\string\csname tabu@\the\tabu@nested.W\number#1\endcsname + \ifdim -\tabu@pt#2\tabucolX<\tabu@target + < \number-\rem@pt#2 X + = \the\dimexpr -\tabu@pt#2\tabucolX \relax + \else + <= \the\tabu@target\space < \number-\rem@pt#2 X\fi} +\def\tabu@message@reached{\tabu@header + ******* Reached Target: + hfuzz = \tabu@hfuzz\on@line\space *******} +\def\tabu@message@etime{\edef\tabu@stoptime{\the\pdfelapsedtime}% + \tabu@message{(tabu)\tabu@spaces Time elapsed during measure: + \the\numexpr(\tabu@stoptime-\tabu@starttime-32767)/65536\relax sec + \the\numexpr\numexpr(\tabu@stoptime-\tabu@starttime) + -\numexpr(\tabu@stoptime-\tabu@starttime-32767)/65536\relax*65536\relax + *1000/65536\relax ms \tabu@spaces(\the\tabu@cnt\space + cycle\ifnum\tabu@cnt>\@ne s\fi)^^J^^J}} +\def\tabu@message@verticalsp {% + \ifdim \@tempdima>\tabu@ht + \ifdim \@tempdimb>\tabu@dp + \expandafter\expandafter\expandafter\string\tabu@ht = + \tabu@msgalign \@tempdima { }{ }{ }{ }{ }\@@ + \expandafter\expandafter\expandafter\string\tabu@dp = + \tabu@msgalign \@tempdimb { }{ }{ }{ }{ }\@@^^J% + \else + \expandafter\expandafter\expandafter\string\tabu@ht = + \tabu@msgalign \@tempdima { }{ }{ }{ }{ }\@@^^J% + \fi + \else\ifdim \@tempdimb>\tabu@dp + \tabu@spaces\tabu@spaces\tabu@spaces + \expandafter\expandafter\expandafter\string\tabu@dp = + \tabu@msgalign \@tempdimb { }{ }{ }{ }{ }\@@^^J\fi + \fi +}% \tabu@message@verticalsp +\edef\tabu@spaces{\@spaces} +\def\tabu@strippt{\expandafter\tabu@pt\the} +{\@makeother\P \@makeother\T\lowercase{\gdef\tabu@pt #1PT{#1}}} +\def\tabu@msgalign{\expandafter\tabu@msg@align\the\dimexpr} +\def\tabu@msgalign@PT{\expandafter\tabu@msg@align\romannumeral-`\0\tabu@strippt} +\def\do #1{% + \def\tabu@msg@align##1.##2##3##4##5##6##7##8##9\@@{% + \ifnum##1<10 #1 #1\else + \ifnum##1<100 #1 \else + \ifnum##1<\@m #1\fi\fi\fi + ##1.##2##3##4##5##6##7##8#1}% + \def\tabu@header{(tabu) \ifnum\tabu@cnt<10 #1\fi\the\tabu@cnt) }% + \def\tabu@titles{\ifnum \tabu@nested=\z@ + (tabu) Try#1 #1 tabu X #1 #1 #1tabu Width #1 #1 Target + #1 #1 #1 Coefs #1 #1 #1 Update^^J\fi}% + \def\tabu@spreadheader{% + (tabu) Try#1 #1 Spread #1 #1 tabu Width #1 #1 #1 Nat. X #1 #1 #1 #1Nat. Min. + #1 New Target^^J% + (tabu) sprd} + \def\tabu@message@save {\begingroup + \def\x ####1{\tabu@msg@align ####1{ }{ }{ }{ }{}\@@} + \def\z ####1{\expandafter\x\expandafter{\romannumeral-`\0\tabu@strippt + \dimexpr####1\p@{ }{ }}}% + \let\color \relax \def\tabu@rulesstyle ####1####2{\detokenize{####1}}% + \let\CT@arc@ \relax \let\@preamble \@gobble + \let\tabu@savedpream \@firstofone + \let\tabu@savedparams \@firstofone + \def\tabu@target ####1\relax {(tabu) target #1 #1 #1 #1 #1 = \x{####1}^^J}% + \def\tabucolX ####1\relax {(tabu) X columns width#1 = \x{####1}^^J}% + \def\tabu@nbcols ####1\relax {(tabu) Number of columns: \z{####1}^^J}% + \def\tabu@aligndefault ####1{(tabu) Default alignment: #1 #1 ####1^^J}% + \def\col@sep ####1\relax {(tabu) column sep #1 #1 #1 = \x{####1}^^J}% + \def\arrayrulewidth ####1\relax{(tabu) arrayrulewidth #1 = \x{####1}}% + \def\doublerulesep ####1\relax { doublerulesep = \x{####1}^^J}% + \def\extratabsurround####1\relax{(tabu) extratabsurround = \x{####1}^^J}% + \def\extrarowheight ####1\relax{(tabu) extrarowheight #1 = \x{####1}}% + \def\extrarowdepth ####1\relax {extrarowdepth = \x{####1}^^J}% + \def\abovetabulinesep####1\relax{(tabu) abovetabulinesep=\x{####1} }% + \def\belowtabulinesep####1\relax{ belowtabulinesep=\x{####1}^^J}% + \def\arraystretch ####1{(tabu) arraystretch #1 #1 = \z{####1}^^J}% + \def\minrowclearance####1\relax{(tabu) minrowclearance #1 = \x{####1}^^J}% + \def\tabu@arc@L ####1{(tabu) taburulecolor #1 #1 = ####1^^J}% + \def\tabu@drsc@L ####1{(tabu) tabudoublerulecolor= ####1^^J}% + \def\tabu@evr@L ####1{(tabu) everyrow #1 #1 #1 #1 = \detokenize{####1}^^J}% + \def\tabu@ls@L ####1{(tabu) line style = \detokenize{####1}^^J}% + \def\NC@find ####1\@nil{(tabu) tabu preamble#1 #1 = \detokenize{####1}^^J}% + \def\tabu@wddef####1####2{(tabu) Natural width ####1 = \x{####2}^^J}% + \let\edef \@gobbletwo \let\def \@empty \let\let \@gobbletwo + \tabu@message{% + (tabu) \string\savetabu{\tabu@temp}: \on@line^^J% + \tabu@usetabu \@nil^^J}% + \endgroup} +}\do{ } +%% Measuring the natural width (varwidth) - store the results ------- +\def\tabu@startpboxmeasure #1{\bgroup % entering \vtop + \edef\tabu@temp{\expandafter\@secondoftwo \ifx\tabu@hsize #1\else\relax\fi}% + \ifodd 1\ifx \tabu@temp\@empty 0 \else % starts with \tabu@hsize ? + \iftabu@spread \else % if spread -> measure + \ifdim \tabu@temp\p@>\z@ 0 \fi\fi\fi% if coef>0 -> do not measure + \let\@startpbox \tabu@startpboxORI % restore immediately (nesting) + \tabu@measuringtrue % for the quick option... + \tabu@Xcol =\expandafter\@firstoftwo\ifx\tabu@hsize #1\fi + \ifdim \tabu@temp\p@>\z@ \ifdim \tabu@temp\tabucolX<\tabu@target + \tabu@target=\tabu@temp\tabucolX \fi\fi + \setbox\tabu@box \hbox \bgroup + \begin{varwidth}\tabu@target + \let\FV@ListProcessLine \tabu@FV@ListProcessLine % \hbox to natural width... + \narrowragged \arraybackslash \parfillskip \@flushglue + \ifdefined\pdfadjustspacing \pdfadjustspacing\z@ \fi + \bgroup \aftergroup\tabu@endpboxmeasure + \ifdefined \cellspacetoplimit \tabu@cellspacepatch \fi + \else \expandafter\@gobble + \tabu@startpboxquick{#1}% \@gobble \bgroup + \fi +}% \tabu@startpboxmeasure +\def\tabu@cellspacepatch{\def\bcolumn##1\@nil{}\let\ecolumn\@empty + \bgroup\color@begingroup} +\def\tabu@endpboxmeasure {% + \@finalstrut \@arstrutbox + \end{varwidth}\egroup % + \ifdim \tabu@temp\p@ <\z@ % neg coef + \ifdim \tabu@wd\tabu@Xcol <\wd\tabu@box + \tabu@wddef\tabu@Xcol {\the\wd\tabu@box}% + \tabu@debug{\tabu@message@endpboxmeasure}% + \fi + \else % spread coef>0 + \global\advance \tabu@naturalX \wd\tabu@box + \@tempdima =\dimexpr \wd\tabu@box *\p@/\dimexpr \tabu@temp\p@\relax \relax + \ifdim \tabu@naturalXmax <\tabu@naturalX + \xdef\tabu@naturalXmax {\the\tabu@naturalX}\fi + \ifdim \tabu@naturalXmin <\@tempdima + \xdef\tabu@naturalXmin {\the\@tempdima}\fi + \fi + \box\tabu@box \egroup % end of \vtop (measure) restore \tabu@target +}% \tabu@endpboxmeasure +\def\tabu@wddef #1{\expandafter\xdef + \csname tabu@\the\tabu@nested.W\number#1\endcsname} +\def\tabu@wd #1{\csname tabu@\the\tabu@nested.W\number#1\endcsname} +\def\tabu@message@endpboxmeasure{\tabu@spaces\tabu@spaces<-> % <-> save natural wd + \the\tabu@Xcol. X[\tabu@temp]: + target = \the\tabucolX \space + \expandafter\expandafter\expandafter\string\tabu@wd\tabu@Xcol + =\tabu@wd\tabu@Xcol +}% \tabu@message@endpboxmeasure +\def\tabu@startpboxquick {\bgroup + \let\@startpbox \tabu@startpboxORI % restore immediately + \let\tabu \tabu@quick % \begin is expanded before... + \expandafter\@gobble \@startpbox % gobbles \bgroup +}% \tabu@startpboxquick +\def\tabu@quick {\begingroup \iffalse{\fi \ifnum0=`}\fi + \toks@{}\def\tabu@stack{b}\tabu@collectbody \tabu@endquick +}% \tabu@quick +\def\tabu@endquick {% + \ifodd 1\ifx\tabu@end@envir\tabu@endtabu \else + \ifx\tabu@end@envir\tabu@endtabus \else 0\fi\fi\relax + \endgroup + \else \let\endtabu \relax + \tabu@end@envir + \fi +}% \tabu@quick +\def\tabu@endtabu {\end{tabu}} +\def\tabu@endtabus {\end{tabu*}} +%% Measuring the heights and depths - store the results ------------- +\def\tabu@verticalmeasure{\everypar{}% + \ifnum \currentgrouptype>12 % 14=semi-simple, 15=math shift group + \setbox\tabu@box =\hbox\bgroup + \let\tabu@verticalspacing \tabu@verticalsp@lcr + \d@llarbegin % after \hbox ... + \else + \edef\tabu@temp{\ifnum\currentgrouptype=5\vtop + \else\ifnum\currentgrouptype=12\vcenter + \else\vbox\fi\fi}% + \setbox\tabu@box \hbox\bgroup$\tabu@temp \bgroup + \let\tabu@verticalspacing \tabu@verticalsp@pmb + \fi +}% \tabu@verticalmeasure +\def\tabu@verticalsp@lcr{% + \d@llarend \egroup % + \@tempdima \dimexpr \ht\tabu@box+\abovetabulinesep + \@tempdimb \dimexpr \dp\tabu@box+\belowtabulinesep \relax + \ifdim\tabustrutrule>\z@ \tabu@debug{\tabu@message@verticalsp}\fi + \ifdim \tabu@ht<\@tempdima \tabu@htdef{\the\@tempdima}\fi + \ifdim \tabu@dp<\@tempdimb \tabu@dpdef{\the\@tempdimb}\fi + \noindent\vrule height\@tempdima depth\@tempdimb +}% \tabu@verticalsp@lcr +\def\tabu@verticalsp@pmb{% inserts struts as needed + \par \expandafter\egroup + \expandafter$\expandafter + \egroup \expandafter + \@tempdimc \the\prevdepth + \@tempdima \dimexpr \ht\tabu@box+\abovetabulinesep + \@tempdimb \dimexpr \dp\tabu@box+\belowtabulinesep \relax + \ifdim\tabustrutrule>\z@ \tabu@debug{\tabu@message@verticalsp}\fi + \ifdim \tabu@ht<\@tempdima \tabu@htdef{\the\@tempdima}\fi + \ifdim \tabu@dp<\@tempdimb \tabu@dpdef{\the\@tempdimb}\fi + \let\@finalstrut \@gobble + \hrule height\@tempdima depth\@tempdimb width\hsize +%% \box\tabu@box +}% \tabu@verticalsp@pmb + +\def\tabu@verticalinit{% + \ifnum \c@taburow=\z@ \tabu@rearstrut \fi % after \tabu@reset ! + \advance\c@taburow \@ne + \tabu@htdef{\the\ht\@arstrutbox}\tabu@dpdef{\the\dp\@arstrutbox}% + \advance\c@taburow \m@ne +}% \tabu@verticalinit +\def\tabu@htdef {\expandafter\xdef \csname tabu@\the\tabu@nested.H\the\c@taburow\endcsname} +\def\tabu@ht {\csname tabu@\the\tabu@nested.H\the\c@taburow\endcsname} +\def\tabu@dpdef {\expandafter\xdef \csname tabu@\the\tabu@nested.D\the\c@taburow\endcsname} +\def\tabu@dp {\csname tabu@\the\tabu@nested.D\the\c@taburow\endcsname} +\def\tabu@verticaldynamicadjustment {% + \advance\c@taburow \@ne + \extrarowheight \dimexpr\tabu@ht - \ht\strutbox + \extrarowdepth \dimexpr\tabu@dp - \dp\strutbox + \let\arraystretch \@empty + \advance\c@taburow \m@ne +}% \tabu@verticaldynamicadjustment +\def\tabuphantomline{\crcr \noalign{% + {\globaldefs \@ne + \setbox\@arstrutbox \box\voidb@x + \let\tabu@@celllalign \tabu@celllalign + \let\tabu@@cellralign \tabu@cellralign + \let\tabu@@cellleft \tabu@cellleft + \let\tabu@@cellright \tabu@cellright + \let\tabu@@thevline \tabu@thevline + \let\tabu@celllalign \@empty + \let\tabu@cellralign \@empty + \let\tabu@cellright \@empty + \let\tabu@cellleft \@empty + \let\tabu@thevline \relax}% + \edef\tabu@temp{\tabu@multispan \tabu@nbcols{\noindent &}}% + \toks@\expandafter{\tabu@temp \noindent\tabu@everyrowfalse \cr + \noalign{\tabu@rearstrut + {\globaldefs\@ne + \let\tabu@celllalign \tabu@@celllalign + \let\tabu@cellralign \tabu@@cellralign + \let\tabu@cellleft \tabu@@cellleft + \let\tabu@cellright \tabu@@cellright + \let\tabu@thevline \tabu@@thevline}}}% + \expandafter}\the\toks@ +}% \tabuphantomline +%% \firsthline and \lasthline corrections --------------------------- +\def\tabu@firstline {\tabu@hlineAZ \tabu@firsthlinecorrection {}} +\def\tabu@firsthline{\tabu@hlineAZ \tabu@firsthlinecorrection \hline} +\def\tabu@lastline {\tabu@hlineAZ \tabu@lasthlinecorrection {}} +\def\tabu@lasthline {\tabu@hlineAZ \tabu@lasthlinecorrection \hline} +\def\tabu@hline {% replaces \hline if no colortbl (see \AtBeginDocument) + \noalign{\ifnum0=`}\fi + {\CT@arc@\hrule height\arrayrulewidth}% + \futurelet \tabu@temp \tabu@xhline +}% \tabu@hline +\def\tabu@xhline{% + \ifx \tabu@temp \hline + {\ifx \CT@drsc@\relax \vskip + \else\ifx \CT@drsc@\@empty \vskip + \else \CT@drsc@\hrule height + \fi\fi + \doublerulesep}% + \fi + \ifnum0=`{\fi}% +}% \tabu@xhline +\def\tabu@hlineAZ #1#2{\noalign{\ifnum0=`}\fi \dimen@ \z@ \count@ \z@ + \toks@{}\def\tabu@hlinecorrection{#1}\def\tabu@temp{#2}% + \tabu@hlineAZsurround +}% \tabu@hlineAZ +\newcommand*\tabu@hlineAZsurround[1][\extratabsurround]{% + \extratabsurround #1\let\tabucline \tabucline@scan + \let\hline \tabu@hlinescan \let\firsthline \hline + \let\cline \tabu@clinescan \let\lasthline \hline + \expandafter \futurelet \expandafter \tabu@temp + \expandafter \tabu@nexthlineAZ \tabu@temp +}% \tabu@hlineAZsurround +\def\tabu@hlinescan {\tabu@thick \arrayrulewidth \tabu@xhlineAZ \hline} +\def\tabu@clinescan #1{\tabu@thick \arrayrulewidth \tabu@xhlineAZ {\cline{#1}}} +\def\tabucline@scan{\@testopt \tabucline@sc@n {}} +\def\tabucline@sc@n #1[#2]{\tabu@xhlineAZ {\tabucline[{#1}]{#2}}} +\def\tabu@nexthlineAZ{% + \ifx \tabu@temp\hline \else + \ifx \tabu@temp\cline \else + \ifx \tabu@temp\tabucline \else + \tabu@hlinecorrection + \fi\fi\fi +}% \tabu@nexthlineAZ +\def\tabu@xhlineAZ #1{% + \toks@\expandafter{\the\toks@ #1}% + \@tempdimc \tabu@thick % The last line width + \ifcase\count@ \@tempdimb \tabu@thick % The first line width + \else \advance\dimen@ \dimexpr \tabu@thick+\doublerulesep \relax + \fi + \advance\count@ \@ne \futurelet \tabu@temp \tabu@nexthlineAZ +}% \tabu@xhlineAZ +\def\tabu@firsthlinecorrection{% \count@ = number of \hline -1 + \@tempdima \dimexpr \ht\@arstrutbox+\dimen@ + \edef\firsthline{% + \omit \hbox to\z@{\hss{\noexpand\tabu@DBG{yellow}\vrule + height \the\dimexpr\@tempdima+\extratabsurround + depth \dp\@arstrutbox + width \tabustrutrule}\hss}\cr + \noalign{\vskip -\the\dimexpr \@tempdima+\@tempdimb + +\dp\@arstrutbox \relax}% + \the\toks@ + }\ifnum0=`{\fi + \expandafter}\firsthline % we are then ! +}% \tabu@firsthlinecorrection +\def\tabu@lasthlinecorrection{% + \@tempdima \dimexpr \dp\@arstrutbox+\dimen@+\@tempdimb+\@tempdimc + \edef\lasthline{% + \the\toks@ + \noalign{\vskip -\the\dimexpr\dimen@+\@tempdimb+\dp\@arstrutbox}% + \omit \hbox to\z@{\hss{\noexpand\tabu@DBG{yellow}\vrule + depth \the\dimexpr \dp\@arstrutbox+\@tempdimb+\dimen@ + +\extratabsurround-\@tempdimc + height \z@ + width \tabustrutrule}\hss}\cr + }\ifnum0=`{\fi + \expandafter}\lasthline % we are then ! +}% \tabu@lasthlinecorrection +\def\tabu@LT@@hline{% + \ifx\LT@next\hline + \global\let\LT@next \@gobble + \ifx \CT@drsc@\relax + \gdef\CT@LT@sep{% + \noalign{\penalty-\@medpenalty\vskip\doublerulesep}}% + \else + \gdef\CT@LT@sep{% + \multispan\LT@cols{% + \CT@drsc@\leaders\hrule\@height\doublerulesep\hfill}\cr}% + \fi + \else + \global\let\LT@next\empty + \gdef\CT@LT@sep{% + \noalign{\penalty-\@lowpenalty\vskip-\arrayrulewidth}}% + \fi + \ifnum0=`{\fi}% + \multispan\LT@cols + {\CT@arc@\leaders\hrule\@height\arrayrulewidth\hfill}\cr + \CT@LT@sep + \multispan\LT@cols + {\CT@arc@\leaders\hrule\@height\arrayrulewidth\hfill}\cr + \noalign{\penalty\@M}% + \LT@next +}% \tabu@LT@@hline +%% Horizontal lines : \tabucline ------------------------------------ +\let\tabu@start \@tempcnta +\let\tabu@stop \@tempcntb +\newcommand*\tabucline{\noalign{\ifnum0=`}\fi \tabu@cline} +\newcommand*\tabu@cline[2][]{\tabu@startstop{#2}% + \ifnum \tabu@stop<\z@ \toks@{}% + \else \tabu@clinearg{#1}\tabu@thestyle + \edef\tabucline{\toks@{% + \ifnum \tabu@start>\z@ \omit + \tabu@multispan\tabu@start {\span\omit}&\fi + \omit \tabu@multispan\tabu@stop {\span\omit}% + \tabu@thehline\cr + }}\tabucline + \tabu@tracinglines{(tabu:tabucline) Style: #1^^J\the\toks@^^J^^J}% + \fi + \futurelet \tabu@temp \tabu@xcline +}% \tabu@cline +\def\tabu@clinearg #1{% + \ifx\\#1\\\let\tabu@thestyle \tabu@ls@ + \else \@defaultunits \expandafter\let\expandafter\@tempa + \romannumeral-`\0#1\relax \@nnil + \ifx \hbox\@tempa \tabu@clinebox{#1}% + \else\ifx \box\@tempa \tabu@clinebox{#1}% + \else\ifx \vbox\@tempa \tabu@clinebox{#1}% + \else\ifx \vtop\@tempa \tabu@clinebox{#1}% + \else\ifx \copy\@tempa \tabu@clinebox{#1}% + \else\ifx \leaders\@tempa \tabu@clineleads{#1}% + \else\ifx \cleaders\@tempa \tabu@clineleads{#1}% + \else\ifx \xleaders\@tempa \tabu@clineleads{#1}% + \else\tabu@getline {#1}% + \fi\fi\fi\fi\fi\fi\fi\fi + \fi +}% \tabu@clinearg +\def\tabu@clinebox #1{\tabu@clineleads{\xleaders#1\hss}} +\def\tabu@clineleads #1{% + \let\tabu@thestyle \relax \let\tabu@leaders \@undefined + \gdef\tabu@thehrule{#1}} +\def\tabu@thehline{\begingroup + \ifdefined\tabu@leaders + \noexpand\tabu@thehleaders + \else \noexpand\tabu@thehrule + \fi \endgroup +}% \tabu@thehline +\def\tabu@xcline{% + \ifx \tabu@temp\tabucline + \toks@\expandafter{\the\toks@ \noalign + {\ifx\CT@drsc@\relax \vskip + \else \CT@drsc@\hrule height + \fi + \doublerulesep}}% + \fi + \tabu@docline +}% \tabu@xcline +\def\tabu@docline {\ifnum0=`{\fi \expandafter}\the\toks@} +\def\tabu@docline@evr {\xdef\tabu@doclineafter{\the\toks@}% + \ifnum0=`{\fi}\aftergroup\tabu@doclineafter} +\def\tabu@multispan #1#2{% + \ifnum\numexpr#1>\@ne #2\expandafter\tabu@multispan + \else \expandafter\@gobbletwo + \fi {#1-1}{#2}% +}% \tabu@multispan +\def\tabu@startstop #1{\tabu@start@stop #1\relax 1-\tabu@nbcols \@nnil} +\def\tabu@start@stop #1-#2\@nnil{% + \@defaultunits \tabu@start\number 0#1\relax \@nnil + \@defaultunits \tabu@stop \number 0#2\relax \@nnil + \tabu@stop \ifnum \tabu@start>\tabu@nbcols \m@ne + \else\ifnum \tabu@stop=\z@ \tabu@nbcols + \else\ifnum \tabu@stop>\tabu@nbcols \tabu@nbcols + \else \tabu@stop + \fi\fi\fi + \advance\tabu@start \m@ne + \ifnum \tabu@start>\z@ \advance\tabu@stop -\tabu@start \fi +}% \tabu@start@stop +%% Numbers: siunitx S columns (and \tabudecimal) ------------------- +\def\tabu@tabudecimal #1{% + \def\tabu@decimal{#1}\@temptokena{}% + \let\tabu@getdecimal@ \tabu@getdecimal@ignorespaces + \tabu@scandecimal +}% \tabu@tabudecimal +\def\tabu@scandecimal{\futurelet \tabu@temp \tabu@getdecimal@} +\def\tabu@skipdecimal#1{#1\tabu@scandecimal} +\def\tabu@getdecimal@ignorespaces{% + \ifcase 0\ifx\tabu@temp\ignorespaces\else + \ifx\tabu@temp\@sptoken1\else + 2\fi\fi\relax + \let\tabu@getdecimal@ \tabu@getdecimal + \expandafter\tabu@skipdecimal + \or \expandafter\tabu@gobblespace\expandafter\tabu@scandecimal + \else \expandafter\tabu@skipdecimal + \fi +}% \tabu@getdecimal@ignorespaces +\def\tabu@get@decimal#1{\@temptokena\expandafter{\the\@temptokena #1}% + \tabu@scandecimal} +\def\do#1{% + \def\tabu@get@decimalspace#1{% + \@temptokena\expandafter{\the\@temptokena #1}\tabu@scandecimal}% +}\do{ } +\let\tabu@@tabudecimal \tabu@tabudecimal +\def\tabu@getdecimal{% + \ifcase 0\ifx 0\tabu@temp\else + \ifx 1\tabu@temp\else + \ifx 2\tabu@temp\else + \ifx 3\tabu@temp\else + \ifx 4\tabu@temp\else + \ifx 5\tabu@temp\else + \ifx 6\tabu@temp\else + \ifx 7\tabu@temp\else + \ifx 8\tabu@temp\else + \ifx 9\tabu@temp\else + \ifx .\tabu@temp\else + \ifx ,\tabu@temp\else + \ifx -\tabu@temp\else + \ifx +\tabu@temp\else + \ifx e\tabu@temp\else + \ifx E\tabu@temp\else + \ifx\tabu@cellleft\tabu@temp1\else + \ifx\ignorespaces\tabu@temp1\else + \ifx\@sptoken\tabu@temp2\else + 3\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\fi\relax + \expandafter\tabu@get@decimal + \or \expandafter\tabu@skipdecimal + \or \expandafter\tabu@get@decimalspace + \else\expandafter\tabu@printdecimal + \fi +}% \tabu@getdecimal +\def\tabu@printdecimal{% + \edef\tabu@temp{\the\@temptokena}% + \ifx\tabu@temp\@empty\else + \ifx\tabu@temp\space\else + \expandafter\tabu@decimal\expandafter{\the\@temptokena}% + \fi\fi +}% \tabu@printdecimal +%% Verbatim inside X columns ---------------------------------------- +\def\tabu@verbatim{% + \let\verb \tabu@verb + \let\FV@DefineCheckEnd \tabu@FV@DefineCheckEnd +}% \tabu@verbatim +\let\tabu@ltx@verb \verb +\def\tabu@verb{\@ifstar {\tabu@ltx@verb*} \tabu@ltx@verb} +\def\tabu@fancyvrb {% + \def\tabu@FV@DefineCheckEnd ##1{% + \def\tabu@FV@DefineCheckEnd{% + ##1% + \let\FV@CheckEnd \tabu@FV@CheckEnd + \let\FV@@CheckEnd \tabu@FV@@CheckEnd + \let\FV@@@CheckEnd \tabu@FV@@@CheckEnd + \edef\FV@EndScanning{% + \def\noexpand\next{\noexpand\end{\FV@EnvironName}}% + \global\let\noexpand\FV@EnvironName\relax + \noexpand\next}% + \xdef\FV@EnvironName{\detokenize\expandafter{\FV@EnvironName}}}% + }\expandafter\tabu@FV@DefineCheckEnd\expandafter{\FV@DefineCheckEnd} +}% \tabu@fancyvrb +\def\tabu@FV@CheckEnd #1{\expandafter\FV@@CheckEnd \detokenize{#1\end{}}\@nil} +\edef\tabu@FV@@@CheckEnd {\detokenize{\end{}}} +\begingroup +\catcode`\[1 \catcode`\]2 +\@makeother\{ \@makeother\} + \edef\x[\endgroup + \def\noexpand\tabu@FV@@CheckEnd ##1\detokenize[\end{]##2\detokenize[}]##3% + ]\x \@nil{\def\@tempa{#2}\def\@tempb{#3}} +\def\tabu@FV@ListProcessLine #1{% + \hbox {%to \hsize{% + \kern\leftmargin + \hbox {%to \linewidth{% + \FV@LeftListNumber + \FV@LeftListFrame + \FancyVerbFormatLine{#1}\hss +%% DG/SR modification begin - Jan. 28, 1998 (for numbers=right add-on) +%% \FV@RightListFrame}% + \FV@RightListFrame + \FV@RightListNumber}% +%% DG/SR modification end + \hss}} +%% \savetabu -------------------------------------------------------- +\newcommand*\savetabu[1]{\noalign{% + \tabu@sanitizearg{#1}\tabu@temp + \ifx \tabu@temp\@empty \tabu@savewarn{}{The tabu will not be saved}\else + \@ifundefined{tabu@saved@\tabu@temp}{}{\tabu@savewarn{#1}{Overwriting}}% + \ifdefined\tabu@restored \expandafter\let + \csname tabu@saved@\tabu@temp \endcsname \tabu@restored + \else {\tabu@save}% + \fi + \fi}% +}% \savetabu +\def\tabu@save {% + \toks0\expandafter{\tabu@saved@}% + \iftabu@negcoef + \let\tabu@wddef \relax \let\tabu@ \tabu@savewd \edef\tabu@savewd{\tabu@Xcoefs}% + \toks0\expandafter{\the\toks\expandafter0\tabu@savewd}\fi + \toks1\expandafter{\tabu@savedpream}% + \toks2\expandafter{\tabu@savedpreamble}% + \let\@preamble \relax + \let\tabu@savedpream \relax \let\tabu@savedparams \relax + \edef\tabu@preamble{% + \def\noexpand\tabu@aligndefault{\tabu@align}% + \def\tabu@savedparams {\noexpand\the\toks0}% + \def\tabu@savedpream {\noexpand\the\toks1}}% + \edef\tabu@usetabu{% + \def\@preamble {\noexpand\the\toks2}% + \tabu@target \the\tabu@target \relax + \tabucolX \the\tabucolX \relax + \tabu@nbcols \the\tabu@nbcols \relax + \def\noexpand\tabu@aligndefault{\tabu@align}% + \def\tabu@savedparams {\noexpand\the\toks0}% + \def\tabu@savedpream {\noexpand\the\toks1}}% + \let\tabu@aligndefault \relax \let\@sharp \relax + \edef\@tempa{\noexpand\tabu@s@ved + {\tabu@usetabu} + {\tabu@preamble} + {\the\toks1}}\@tempa + \tabu@message@save +}% \tabu@save +\long\def\tabu@s@ved #1#2#3{% + \def\tabu@usetabu{#1}% + \expandafter\gdef\csname tabu@saved@\tabu@temp\endcsname ##1{% + \ifodd ##1% \usetabu + \tabu@measuringfalse \tabu@spreadfalse % Just in case... + \gdef\tabu@usetabu {% + \ifdim \tabu@target>\z@ \tabu@warn@usetabu \fi + \global\let\tabu@usetabu \@undefined + \def\@halignto {to\tabu@target}% + #1% + \ifx \tabu@align\tabu@aligndefault@text + \ifnum \tabu@nested=\z@ + \let\tabu@align \tabu@aligndefault \fi\fi}% + \else % \preamble + \gdef\tabu@preamble {% + \global\let\tabu@preamble \@undefined + #2% + \ifx \tabu@align\tabu@aligndefault@text + \ifnum \tabu@nested=\z@ + \let\tabu@align \tabu@aligndefault \fi\fi}% + \fi + #3}% +}% \tabu@s@ved +\def\tabu@aligndefault@text {\tabu@aligndefault}% +\def\tabu@warn@usetabu {\PackageWarning{tabu} + {Specifying a target with \string\usetabu\space is useless + \MessageBreak The target cannot be changed!}} +\def\tabu@savewd #1#2{\ifdim #2\p@<\z@ \tabu@wddef{#1}{\tabu@wd{#1}}\fi} +\def\tabu@savewarn#1#2{\PackageInfo{tabu} + {User-name `#1' already used for \string\savetabu + \MessageBreak #2}}% +\def\tabu@saveerr#1{\PackageError{tabu} + {User-name `#1' is unknown for \string\usetabu + \MessageBreak I cannot restore an unknown preamble!}\@ehd} +%% \rowfont --------------------------------------------------------- +\newskip \tabu@cellskip +\def\tabu@rowfont{\ifdim \baselineskip=\z@\noalign\fi + {\ifnum0=`}\fi \tabu@row@font} +\newcommand*\tabu@row@font[2][]{% + \ifnum7=\currentgrouptype + \global\let\tabu@@cellleft \tabu@cellleft + \global\let\tabu@@cellright \tabu@cellright + \global\let\tabu@@celllalign \tabu@celllalign + \global\let\tabu@@cellralign \tabu@cellralign + \global\let\tabu@@rowfontreset\tabu@rowfontreset + \fi + \global\let\tabu@rowfontreset \tabu@rowfont@reset + \expandafter\gdef\expandafter\tabu@cellleft\expandafter{\tabu@cellleft #2}% + \ifcsname tabu@cell@#1\endcsname % row alignment + \csname tabu@cell@#1\endcsname \fi + \ifnum0=`{\fi}% end of group / noalign group +}% \rowfont +\def\tabu@ifcolorleavevmode #1{\let\color \tabu@leavevmodecolor #1\let\color\tabu@color}% +\def\tabu@rowfont@reset{% + \global\let\tabu@rowfontreset \tabu@@rowfontreset + \global\let\tabu@cellleft \tabu@@cellleft + \global\let\tabu@cellright \tabu@@cellright + \global\let\tabu@cellfont \@empty + \global\let\tabu@celllalign \tabu@@celllalign + \global\let\tabu@cellralign \tabu@@cellralign +}% \tabu@@rowfontreset +\let\tabu@rowfontreset \@empty % overwritten \AtBeginDocument if colortbl +%% \tabu@prepnext@tok ----------------------------------------------- +\newif \iftabu@cellright +\def\tabu@prepnext@tok{% + \ifnum \count@<\z@ % + \@tempcnta \@M % + \tabu@nbcols\z@ + \let\tabu@fornoopORI \@fornoop + \tabu@cellrightfalse + \else + \ifcase \numexpr \count@-\@tempcnta \relax % (case 0): prev. token is left + \advance \tabu@nbcols \@ne + \iftabu@cellright % before-previous token is right and is finished + \tabu@cellrightfalse % + \tabu@righttok + \fi + \tabu@lefttok + \or % (case 1) previous token is right + \tabu@cellrighttrue \let\@fornoop \tabu@lastnoop + \else % special column: do not change the token + \iftabu@cellright % before-previous token is right + \tabu@cellrightfalse + \tabu@righttok + \fi + \fi % \ifcase + \fi + \tabu@prepnext@tokORI +}% \tabu@prepnext@tok +\long\def\tabu@lastnoop#1\@@#2#3{\tabu@lastn@@p #2\@nextchar \in@\in@@} +\def\tabu@lastn@@p #1\@nextchar #2#3\in@@{% + \ifx \in@#2\else + \let\@fornoop \tabu@fornoopORI + \xdef\tabu@mkpreambuffer{\tabu@nbcols\the\tabu@nbcols \tabu@mkpreambuffer}% + \toks0\expandafter{\expandafter\tabu@everyrowtrue \the\toks0}% + \expandafter\prepnext@tok + \fi +}% \tabu@lastnoop +\def\tabu@righttok{% + \advance \count@ \m@ne + \toks\count@\expandafter {\the\toks\count@ \tabu@cellright \tabu@cellralign}% + \advance \count@ \@ne +}% \tabu@righttok +\def\tabu@lefttok{\toks\count@\expandafter{\expandafter\tabu@celllalign + \the\toks\count@ \tabu@cellleft}% after because of $ +}% \tabu@lefttok +%% Neutralisation of glues ------------------------------------------ +\let\tabu@cellleft \@empty +\let\tabu@cellright \@empty +\tabu@celllalign@def{\tabu@cellleft}% +\let\tabu@cellralign \@empty +\def\tabu@cell@align #1#2#3{% + \let\tabu@maybesiunitx \toks@ \tabu@celllalign + \global \expandafter \tabu@celllalign@def \expandafter {\the\toks@ #1}% + \toks@\expandafter{\tabu@cellralign #2}% + \xdef\tabu@cellralign{\the\toks@}% + \toks@\expandafter{\tabu@cellleft #3}% + \xdef\tabu@cellleft{\the\toks@}% +}% \tabu@cell@align +\def\tabu@cell@l{% force alignment to left + \tabu@cell@align + {\tabu@removehfil \raggedright \tabu@cellleft}% left + {\tabu@flush1\tabu@ignorehfil}% right + \raggedright +}% \tabu@cell@l +\def\tabu@cell@c{% force alignment to center + \tabu@cell@align + {\tabu@removehfil \centering \tabu@flush{.5}\tabu@cellleft} + {\tabu@flush{.5}\tabu@ignorehfil} + \centering +}% \tabu@cell@c +\def\tabu@cell@r{% force alignment to right + \tabu@cell@align + {\tabu@removehfil \raggedleft \tabu@flush1\tabu@cellleft} + \tabu@ignorehfil + \raggedleft +}% \tabu@cell@r +\def\tabu@cell@j{% force justification (for p, m, b columns) + \tabu@cell@align + {\tabu@justify\tabu@cellleft} + {} + \tabu@justify +}% \tabu@cell@j +\def\tabu@justify{% + \leftskip\z@skip \@rightskip\leftskip \rightskip\@rightskip + \parfillskip\@flushglue +}% \tabu@justify +%% ragged2e settings +\def\tabu@cell@L{% force alignment to left (ragged2e) + \tabu@cell@align + {\tabu@removehfil \RaggedRight \tabu@cellleft} + {\tabu@flush 1\tabu@ignorehfil} + \RaggedRight +}% \tabu@cell@L +\def\tabu@cell@C{% force alignment to center (ragged2e) + \tabu@cell@align + {\tabu@removehfil \Centering \tabu@flush{.5}\tabu@cellleft} + {\tabu@flush{.5}\tabu@ignorehfil} + \Centering +}% \tabu@cell@C +\def\tabu@cell@R{% force alignment to right (ragged2e) + \tabu@cell@align + {\tabu@removehfil \RaggedLeft \tabu@flush 1\tabu@cellleft} + \tabu@ignorehfil + \RaggedLeft +}% \tabu@cell@R +\def\tabu@cell@J{% force justification (ragged2e) + \tabu@cell@align + {\justifying \tabu@cellleft} + {} + \justifying +}% \tabu@cell@J +\def\tabu@flush#1{% + \iftabu@colortbl % colortbl uses \hfill rather than \hfil + \hskip \ifnum13<\currentgrouptype \stretch{#1}% + \else \ifdim#1pt<\p@ \tabu@cellskip + \else \stretch{#1} + \fi\fi \relax + \else % array.sty + \ifnum 13<\currentgrouptype + \hfil \hskip1sp \relax \fi + \fi +}% \tabu@flush +\let\tabu@hfil \hfil +\let\tabu@hfill \hfill +\let\tabu@hskip \hskip +\def\tabu@removehfil{% + \iftabu@colortbl + \unkern \tabu@cellskip =\lastskip + \ifnum\gluestretchorder\tabu@cellskip =\tw@ \hskip-\tabu@cellskip + \else \tabu@cellskip \z@skip + \fi + \else + \ifdim\lastskip=1sp\unskip\fi + \ifnum\gluestretchorder\lastskip =\@ne + \hfilneg % \hfilneg for array.sty but not for colortbl... + \fi + \fi +}% \tabu@removehfil +\def\tabu@ignorehfil{\aftergroup \tabu@nohfil} +\def\tabu@nohfil{% \hfil -> do nothing + restore original \hfil + \def\hfil{\let\hfil \tabu@hfil}% local to (alignment template) group +}% \tabu@nohfil +\def\tabu@colortblalignments {% if colortbl + \def\tabu@nohfil{% + \def\hfil {\let\hfil \tabu@hfil}% local to (alignment template) group + \def\hfill {\let\hfill \tabu@hfill}% (colortbl uses \hfill) pfff... + \def\hskip ####1\relax{\let\hskip \tabu@hskip}}% local +}% \tabu@colortblalignments +%% Taking care of footnotes and hyperfootnotes ---------------------- +\long\def\tabu@footnotetext #1{% + \edef\@tempa{\the\tabu@footnotes + \noexpand\footnotetext [\the\csname c@\@mpfn\endcsname]}% + \global\tabu@footnotes\expandafter{\@tempa {#1}}}% +\long\def\tabu@xfootnotetext [#1]#2{% + \global\tabu@footnotes\expandafter{\the\tabu@footnotes + \footnotetext [{#1}]{#2}}} +\let\tabu@xfootnote \@xfootnote +\long\def\tabu@Hy@ftntext{\tabu@Hy@ftntxt {\the \c@footnote }} +\long\def\tabu@Hy@xfootnote [#1]{% + \begingroup + \value\@mpfn #1\relax + \protected@xdef \@thefnmark {\thempfn}% + \endgroup + \@footnotemark \tabu@Hy@ftntxt {#1}% +}% \tabu@Hy@xfootnote +\long\def\tabu@Hy@ftntxt #1#2{% + \edef\@tempa{% + \the\tabu@footnotes + \begingroup + \value\@mpfn #1\relax + \noexpand\protected@xdef\noexpand\@thefnmark {\noexpand\thempfn}% + \expandafter \noexpand \expandafter + \tabu@Hy@footnotetext \expandafter{\Hy@footnote@currentHref}% + }% + \global\tabu@footnotes\expandafter{\@tempa {#2}% + \endgroup}% +}% \tabu@Hy@ftntxt +\long\def\tabu@Hy@footnotetext #1#2{% + \H@@footnotetext{% + \ifHy@nesting + \hyper@@anchor {#1}{#2}% + \else + \Hy@raisedlink{% + \hyper@@anchor {#1}{\relax}% + }% + \def\@currentHref {#1}% + \let\@currentlabelname \@empty + #2% + \fi + }% +}% \tabu@Hy@footnotetext +%% No need for \arraybackslash ! ------------------------------------ +\def\tabu@latextwoe {% +\def\tabu@temp##1##2##3{{\toks@\expandafter{##2##3}\xdef##1{\the\toks@}}} +\tabu@temp \tabu@centering \centering \arraybackslash +\tabu@temp \tabu@raggedleft \raggedleft \arraybackslash +\tabu@temp \tabu@raggedright \raggedright \arraybackslash +}% \tabu@latextwoe +\def\tabu@raggedtwoe {% +\def\tabu@temp ##1##2##3{{\toks@\expandafter{##2##3}\xdef##1{\the\toks@}}} +\tabu@temp \tabu@Centering \Centering \arraybackslash +\tabu@temp \tabu@RaggedLeft \RaggedLeft \arraybackslash +\tabu@temp \tabu@RaggedRight \RaggedRight \arraybackslash +\tabu@temp \tabu@justifying \justifying \arraybackslash +}% \tabu@raggedtwoe +\def\tabu@normalcrbackslash{\let\\\@normalcr} +\def\tabu@trivlist{\expandafter\def\expandafter\@trivlist\expandafter{% + \expandafter\tabu@normalcrbackslash \@trivlist}} +%% Utilities: \fbox \fcolorbox and \tabudecimal ------------------- +\def\tabu@fbox {\leavevmode\afterassignment\tabu@beginfbox \setbox\@tempboxa\hbox} +\def\tabu@beginfbox {\bgroup \kern\fboxsep + \bgroup\aftergroup\tabu@endfbox} +\def\tabu@endfbox {\kern\fboxsep\egroup\egroup + \@frameb@x\relax} +\def\tabu@color@b@x #1#2{\leavevmode \bgroup + \def\tabu@docolor@b@x{#1{#2\color@block{\wd\z@}{\ht\z@}{\dp\z@}\box\z@}}% + \afterassignment\tabu@begincolor@b@x \setbox\z@ \hbox +}% \tabu@color@b@x +\def\tabu@begincolor@b@x {\kern\fboxsep \bgroup + \aftergroup\tabu@endcolor@b@x \set@color} +\def\tabu@endcolor@b@x {\kern\fboxsep \egroup + \dimen@\ht\z@ \advance\dimen@ \fboxsep \ht\z@ \dimen@ + \dimen@\dp\z@ \advance\dimen@ \fboxsep \dp\z@ \dimen@ + \tabu@docolor@b@x \egroup +}% \tabu@endcolor@b@x +%% Corrections (arydshln, delarray, colortbl) ----------------------- +\def\tabu@fix@arrayright {%% \@arrayright is missing from \endarray + \iftabu@colortbl + \ifdefined\adl@array % + \def\tabu@endarray{% + \adl@endarray \egroup \adl@arrayrestore \CT@end \egroup % + \@arrayright % + \gdef\@preamble{}}% + \else % + \def\tabu@endarray{% + \crcr \egroup \egroup % + \@arrayright % + \gdef\@preamble{}\CT@end}% + \fi + \else + \ifdefined\adl@array % + \def\tabu@endarray{% + \adl@endarray \egroup \adl@arrayrestore \egroup % + \@arrayright % + \gdef\@preamble{}}% + \else % + \PackageWarning{tabu} + {\string\@arrayright\space is missing from the + \MessageBreak definition of \string\endarray. + \MessageBreak Compatibility with delarray.sty is broken.}% + \fi\fi +}% \tabu@fix@arrayright +\def\tabu@adl@xarraydashrule #1#2#3{% + \ifnum\@lastchclass=\adl@class@start\else + \ifnum\@lastchclass=\@ne\else + \ifnum\@lastchclass=5 \else % @-arg (class 5) and !-arg (class 1) + \adl@leftrulefalse \fi\fi % must be treated the same + \fi + \ifadl@zwvrule\else \ifadl@inactive\else + \@addtopreamble{\vrule\@width\arrayrulewidth + \@height\z@ \@depth\z@}\fi \fi + \ifadl@leftrule + \@addtopreamble{\adl@vlineL{\CT@arc@}{\adl@dashgapcolor}% + {\number#1}#3}% + \else \@addtopreamble{\adl@vlineR{\CT@arc@}{\adl@dashgapcolor}% + {\number#2}#3} + \fi +}% \tabu@adl@xarraydashrule +\def\tabu@adl@act@endpbox {% + \unskip \ifhmode \nobreak \fi \@finalstrut \@arstrutbox + \egroup \egroup + \adl@colhtdp \box\adl@box \hfil +}% \tabu@adl@act@endpbox +\def\tabu@adl@fix {% + \let\adl@xarraydashrule \tabu@adl@xarraydashrule % arydshln + \let\adl@act@endpbox \tabu@adl@act@endpbox % arydshln + \let\adl@act@@endpbox \tabu@adl@act@endpbox % arydshln + \let\@preamerror \@preamerr % arydshln +}% \tabu@adl@fix +%% Correction for longtable' \@startbox definition ------------------ +%% => \everypar is ``missing'' : TeX should be in vertical mode +\def\tabu@LT@startpbox #1{% + \bgroup + \let\@footnotetext\LT@p@ftntext + \setlength\hsize{#1}% + \@arrayparboxrestore + \everypar{% + \vrule \@height \ht\@arstrutbox \@width \z@ + \everypar{}}% +}% \tabu@LT@startpbox +%% \tracingtabu and the package options ------------------ +\DeclareOption{delarray}{\AtEndOfPackage{\RequirePackage{delarray}}} +\DeclareOption{linegoal}{% + \AtEndOfPackage{% + \RequirePackage{linegoal}[2010/12/07]% + \let\tabudefaulttarget \linegoal% \linegoal is \linewidth if not pdfTeX +}} +\DeclareOption{scantokens}{\tabuscantokenstrue} +\DeclareOption{debugshow}{\AtEndOfPackage{\tracingtabu=\tw@}} +\def\tracingtabu {\begingroup\@ifnextchar=% + {\afterassignment\tabu@tracing\count@} + {\afterassignment\tabu@tracing\count@1\relax}} +\def\tabu@tracing{\expandafter\endgroup + \expandafter\tabu@tr@cing \the\count@ \relax +}% \tabu@tracing +\def\tabu@tr@cing #1\relax {% + \ifnum#1>\thr@@ \let\tabu@tracinglines\message + \else \let\tabu@tracinglines\@gobble + \fi + \ifnum#1>\tw@ \let\tabu@DBG \tabu@@DBG + \def\tabu@mkarstrut {\tabu@DBG@arstrut}% + \tabustrutrule 1.5\p@ + \else \let\tabu@DBG \@gobble + \def\tabu@mkarstrut {\tabu@arstrut}% + \tabustrutrule \z@ + \fi + \ifnum#1>\@ne \let\tabu@debug \message + \else \let\tabu@debug \@gobble + \fi + \ifnum#1>\z@ + \let\tabu@message \message + \let\tabu@tracing@save \tabu@message@save + \let\tabu@starttimer \tabu@pdftimer + \else + \let\tabu@message \@gobble + \let\tabu@tracing@save \@gobble + \let\tabu@starttimer \relax + \fi +}% \tabu@tr@cing +%% Setup \AtBeginDocument +\AtBeginDocument{\tabu@AtBeginDocument} +\def\tabu@AtBeginDocument{\let\tabu@AtBeginDocument \@undefined + \ifdefined\arrayrulecolor \tabu@colortbltrue % + \tabu@colortblalignments % different glues are used + \else \tabu@colortblfalse \fi + \ifdefined\CT@arc@ \else \let\CT@arc@ \relax \fi + \ifdefined\CT@drsc@\else \let\CT@drsc@ \relax \fi + \let\tabu@arc@L \CT@arc@ \let\tabu@drsc@L \CT@drsc@ + \ifodd 1\ifcsname siunitx_table_collect_begin:Nn\endcsname % + \expandafter\ifx + \csname siunitx_table_collect_begin:Nn\endcsname\relax 0\fi\fi\relax + \tabu@siunitxtrue + \else \let\tabu@maybesiunitx \@firstofone % + \let\tabu@siunitx \tabu@nosiunitx + \tabu@siunitxfalse + \fi + \ifdefined\adl@array % + \else \let\tabu@adl@fix \relax + \let\tabu@adl@endtrial \@empty \fi + \ifdefined\longtable % + \else \let\longtabu \tabu@nolongtabu \fi + \ifdefined\cellspacetoplimit \tabu@warn@cellspace\fi + \csname\ifcsname ifHy@hyperfootnotes\endcsname % + ifHy@hyperfootnotes\else iffalse\fi\endcsname + \let\tabu@footnotetext \tabu@Hy@ftntext + \let\tabu@xfootnote \tabu@Hy@xfootnote \fi + \ifdefined\FV@DefineCheckEnd% + \tabu@fancyvrb \fi + \ifdefined\color % + \let\tabu@color \color + \def\tabu@leavevmodecolor ##1{% + \def\tabu@leavevmodecolor {\leavevmode ##1}% + }\expandafter\tabu@leavevmodecolor\expandafter{\color}% + \else + \let\tabu@color \tabu@nocolor + \let\tabu@leavevmodecolor \@firstofone \fi + \tabu@latextwoe + \ifdefined\@raggedtwoe@everyselectfont % + \tabu@raggedtwoe + \else + \let\tabu@cell@L \tabu@cell@l + \let\tabu@cell@R \tabu@cell@r + \let\tabu@cell@C \tabu@cell@c + \let\tabu@cell@J \tabu@cell@j \fi + \expandafter\in@ \expandafter\@arrayright \expandafter{\endarray}% + \ifin@ \let\tabu@endarray \endarray + \else \tabu@fix@arrayright \fi% + \everyrow{}% +}% \tabu@AtBeginDocument +\def\tabu@warn@cellspace{% + \PackageWarning{tabu}{% + Package cellspace has some limitations + \MessageBreak And redefines some macros of array.sty. + \MessageBreak Please use \string\tabulinesep\space to control + \MessageBreak vertical spacing of lines inside tabu environment}% +}% \tabu@warn@cellspace +%% tabu Package initialisation +\tabuscantokensfalse +\let\tabu@arc@G \relax +\let\tabu@drsc@G \relax +\let\tabu@evr@G \@empty +\let\tabu@rc@G \@empty +\def\tabu@ls@G {\tabu@linestyle@}% +\let\tabu@@rowfontreset \@empty % +\let\tabu@@celllalign \@empty +\let\tabu@@cellralign \@empty +\let\tabu@@cellleft \@empty +\let\tabu@@cellright \@empty +\def\tabu@naturalXmin {\z@} +\def\tabu@naturalXmax {\z@} +\let\tabu@rowfontreset \@empty +\def\tabulineon {4pt}\let\tabulineoff \tabulineon +\tabu@everyrowtrue +\ifdefined\pdfelapsedtime % + \def\tabu@pdftimer {\xdef\tabu@starttime{\the\pdfelapsedtime}}% +\else \let\tabu@pdftimer \relax \let\tabu@message@etime \relax +\fi +\tracingtabu=\z@ +\newtabulinestyle {=\maxdimen}% creates the 'factory' settings \tabu@linestyle@ +\tabulinestyle{} +\taburowcolors{} +\let\tabudefaulttarget \linewidth +\ProcessOptions* % \ProcessOptions* is quicker ! +\endinput +%% +%% End of file `tabu.sty'. diff --git a/docs/latex/testCPU_8cpp.tex b/docs/latex/testCPU_8cpp.tex new file mode 100644 index 0000000..a37bdf0 --- /dev/null +++ b/docs/latex/testCPU_8cpp.tex @@ -0,0 +1,2 @@ +\hypertarget{testCPU_8cpp}{}\doxysection{tests/test\+C\+PU.cpp File Reference} +\label{testCPU_8cpp}\index{tests/testCPU.cpp@{tests/testCPU.cpp}} diff --git a/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw.tex b/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw.tex new file mode 100644 index 0000000..247669e --- /dev/null +++ b/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw.tex @@ -0,0 +1,131 @@ +\hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}{}\doxysection{Com\+Square\+::A\+PU\+::Internal\+Registers\+::psw Union Reference} +\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw}\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} + + +Program Status Word register. + + + + +{\ttfamily \#include $<$A\+P\+U.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::A\+PU\+::Internal\+Registers\+::psw\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=223pt]{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +bool \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a825eadfcbe83588f78979591d0b66c8a}{n}}\+: 1 +\begin{DoxyCompactList}\small\item\em Negative flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a4db64a4db0cac482ee526c503c13f851}{v}}\+: 1 +\begin{DoxyCompactList}\small\item\em Overflow flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a56220907c4d99adc99bb1eaca51f7ca7}{p}}\+: 1 +\begin{DoxyCompactList}\small\item\em Direct page flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_ace2ade4d080b6618c33082ad7da7f3c8}{b}}\+: 1 +\begin{DoxyCompactList}\small\item\em Break flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_aba11008885c1cbf99a4061197ae973af}{h}}\+: 1 +\begin{DoxyCompactList}\small\item\em Half carry flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a30d83a81d2653bdfe9a0ea7643464c70}{i}}\+: 1 +\begin{DoxyCompactList}\small\item\em Interrupt enabled flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_ae44c6480df77a3ed532b27c07f9a2b79}{z}}\+: 1 +\begin{DoxyCompactList}\small\item\em Zero flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a1aa82796ccff9ede72269eb73a5904e8}{c}}\+: 1 +\begin{DoxyCompactList}\small\item\em Carry flag. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +Program Status Word register. + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_ace2ade4d080b6618c33082ad7da7f3c8}\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_ace2ade4d080b6618c33082ad7da7f3c8}} +\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}!b@{b}} +\index{b@{b}!ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} +\doxysubsubsection{\texorpdfstring{b}{b}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw\+::b} + + + +Break flag. + +\mbox{\Hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a1aa82796ccff9ede72269eb73a5904e8}\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a1aa82796ccff9ede72269eb73a5904e8}} +\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}!c@{c}} +\index{c@{c}!ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} +\doxysubsubsection{\texorpdfstring{c}{c}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw\+::c} + + + +Carry flag. + +\mbox{\Hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_aba11008885c1cbf99a4061197ae973af}\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_aba11008885c1cbf99a4061197ae973af}} +\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}!h@{h}} +\index{h@{h}!ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} +\doxysubsubsection{\texorpdfstring{h}{h}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw\+::h} + + + +Half carry flag. + +\mbox{\Hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a30d83a81d2653bdfe9a0ea7643464c70}\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a30d83a81d2653bdfe9a0ea7643464c70}} +\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}!i@{i}} +\index{i@{i}!ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} +\doxysubsubsection{\texorpdfstring{i}{i}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw\+::i} + + + +Interrupt enabled flag. + +\mbox{\Hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a825eadfcbe83588f78979591d0b66c8a}\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a825eadfcbe83588f78979591d0b66c8a}} +\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}!n@{n}} +\index{n@{n}!ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} +\doxysubsubsection{\texorpdfstring{n}{n}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw\+::n} + + + +Negative flag. + +\mbox{\Hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a56220907c4d99adc99bb1eaca51f7ca7}\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a56220907c4d99adc99bb1eaca51f7ca7}} +\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}!p@{p}} +\index{p@{p}!ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} +\doxysubsubsection{\texorpdfstring{p}{p}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw\+::p} + + + +Direct page flag. + +\mbox{\Hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a4db64a4db0cac482ee526c503c13f851}\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_a4db64a4db0cac482ee526c503c13f851}} +\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}!v@{v}} +\index{v@{v}!ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} +\doxysubsubsection{\texorpdfstring{v}{v}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw\+::v} + + + +Overflow flag. + +\mbox{\Hypertarget{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_ae44c6480df77a3ed532b27c07f9a2b79}\label{unionComSquare_1_1APU_1_1InternalRegisters_1_1psw_ae44c6480df77a3ed532b27c07f9a2b79}} +\index{ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}!z@{z}} +\index{z@{z}!ComSquare::APU::InternalRegisters::psw@{ComSquare::APU::InternalRegisters::psw}} +\doxysubsubsection{\texorpdfstring{z}{z}} +{\footnotesize\ttfamily bool Com\+Square\+::\+A\+P\+U\+::\+Internal\+Registers\+::psw\+::z} + + + +Zero flag. + + + +The documentation for this union was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+A\+P\+U/\mbox{\hyperlink{APU_8hpp}{A\+P\+U.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.md5 b/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.md5 new file mode 100644 index 0000000..43ab149 --- /dev/null +++ b/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.md5 @@ -0,0 +1 @@ +686ec89da339fdad6e6d5ff04ebffd6a \ No newline at end of file diff --git a/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.pdf b/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.pdf new file mode 100644 index 0000000..1e5a1bf Binary files /dev/null and b/docs/latex/unionComSquare_1_1APU_1_1InternalRegisters_1_1psw__coll__graph.pdf differ diff --git a/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p.tex b/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p.tex new file mode 100644 index 0000000..464ef17 --- /dev/null +++ b/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p.tex @@ -0,0 +1,153 @@ +\hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p}{}\doxysection{Com\+Square\+::C\+PU\+::Registers\+::p Union Reference} +\label{unionComSquare_1_1CPU_1_1Registers_1_1p}\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} + + +The Processor status register;. + + + + +{\ttfamily \#include $<$C\+P\+U.\+hpp$>$} + + + +Collaboration diagram for Com\+Square\+::C\+PU\+::Registers\+::p\+: +\nopagebreak +\begin{figure}[H] +\begin{center} +\leavevmode +\includegraphics[width=243pt]{unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph} +\end{center} +\end{figure} +\doxysubsection*{Public Attributes} +\begin{DoxyCompactItemize} +\item +bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_a79fb1e23a5513904a314fa643a5345fa}{n}}\+: 1 +\begin{DoxyCompactList}\small\item\em The Negative flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_ae8da7fb7a0058a9fa21d2e561ba5483d}{v}}\+: 1 +\begin{DoxyCompactList}\small\item\em The o\+Verflow flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_a62692730cec2435e0b8fa60b3f91cef2}{m}}\+: 1 +\begin{DoxyCompactList}\small\item\em The accumulator and \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} width flag (in native mode only) \end{DoxyCompactList}\item +\begin{tabbing} +xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill +union \{\\ +\>bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_a3ec9f5d30896da6de362318a57d41288}{x}}: 1\\ +\>\>{\em The indeX register width flag (in native mode only) }\\ +\>bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_a7f78eb7506a2e5215b4716b5ac76361c}{b}}: 1\\ +\>\>{\em The Break flag (in emulation mode only) }\\ +\}; \\ + +\end{tabbing}\item +bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_a6980012f88ee439133118611b8ae5700}{d}}\+: 1 +\begin{DoxyCompactList}\small\item\em The Decimal mode flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_a34bc831614cb1f021f3de7e4d7d2001a}{i}}\+: 1 +\begin{DoxyCompactList}\small\item\em The Interrupt disable flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_ab378733e206cf5e3609e7ad08c586f6a}{z}}\+: 1 +\begin{DoxyCompactList}\small\item\em The Zero flag. \end{DoxyCompactList}\item +bool \mbox{\hyperlink{unionComSquare_1_1CPU_1_1Registers_1_1p_a0a2e971016ff6468b4d6644e89b3e355}{c}}\+: 1 +\begin{DoxyCompactList}\small\item\em The Carry flag. \end{DoxyCompactList}\end{DoxyCompactItemize} + + +\doxysubsection{Detailed Description} +The Processor status register;. + +\doxysubsection{Member Data Documentation} +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_af4f787d47b8d2a76227ccf5d5437eda5}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_af4f787d47b8d2a76227ccf5d5437eda5}} +\doxysubsubsection{\texorpdfstring{"@51}{@51}} +{\footnotesize\ttfamily union \{ ... \} } + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_a7f78eb7506a2e5215b4716b5ac76361c}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_a7f78eb7506a2e5215b4716b5ac76361c}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!b@{b}} +\index{b@{b}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{b}{b}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::b} + + + +The Break flag (in emulation mode only) + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_a0a2e971016ff6468b4d6644e89b3e355}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_a0a2e971016ff6468b4d6644e89b3e355}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!c@{c}} +\index{c@{c}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{c}{c}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::c} + + + +The Carry flag. + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_a6980012f88ee439133118611b8ae5700}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_a6980012f88ee439133118611b8ae5700}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!d@{d}} +\index{d@{d}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{d}{d}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::d} + + + +The Decimal mode flag. + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_a34bc831614cb1f021f3de7e4d7d2001a}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_a34bc831614cb1f021f3de7e4d7d2001a}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!i@{i}} +\index{i@{i}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{i}{i}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::i} + + + +The Interrupt disable flag. + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_a62692730cec2435e0b8fa60b3f91cef2}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_a62692730cec2435e0b8fa60b3f91cef2}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!m@{m}} +\index{m@{m}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{m}{m}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::m} + + + +The accumulator and \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} width flag (in native mode only) + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_a79fb1e23a5513904a314fa643a5345fa}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_a79fb1e23a5513904a314fa643a5345fa}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!n@{n}} +\index{n@{n}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{n}{n}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::n} + + + +The Negative flag. + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_ae8da7fb7a0058a9fa21d2e561ba5483d}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_ae8da7fb7a0058a9fa21d2e561ba5483d}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!v@{v}} +\index{v@{v}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{v}{v}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::v} + + + +The o\+Verflow flag. + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_a3ec9f5d30896da6de362318a57d41288}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_a3ec9f5d30896da6de362318a57d41288}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!x@{x}} +\index{x@{x}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{x}{x}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::x} + + + +The indeX register width flag (in native mode only) + +\mbox{\Hypertarget{unionComSquare_1_1CPU_1_1Registers_1_1p_ab378733e206cf5e3609e7ad08c586f6a}\label{unionComSquare_1_1CPU_1_1Registers_1_1p_ab378733e206cf5e3609e7ad08c586f6a}} +\index{ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}!z@{z}} +\index{z@{z}!ComSquare::CPU::Registers::p@{ComSquare::CPU::Registers::p}} +\doxysubsubsection{\texorpdfstring{z}{z}} +{\footnotesize\ttfamily bool Com\+Square\+::\+C\+P\+U\+::\+Registers\+::p\+::z} + + + +The Zero flag. + + + +The documentation for this union was generated from the following file\+:\begin{DoxyCompactItemize} +\item +sources/\+C\+P\+U/\mbox{\hyperlink{CPU_8hpp}{C\+P\+U.\+hpp}}\end{DoxyCompactItemize} diff --git a/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.md5 b/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.md5 new file mode 100644 index 0000000..170a009 --- /dev/null +++ b/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.md5 @@ -0,0 +1 @@ +f97df3f14a9b2437c7f7293dedae63cc \ No newline at end of file diff --git a/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.pdf b/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.pdf new file mode 100644 index 0000000..594a947 Binary files /dev/null and b/docs/latex/unionComSquare_1_1CPU_1_1Registers_1_1p__coll__graph.pdf differ diff --git a/docs/latex/unit__tests_8dir_2link_8txt.tex b/docs/latex/unit__tests_8dir_2link_8txt.tex new file mode 100644 index 0000000..f315bd7 --- /dev/null +++ b/docs/latex/unit__tests_8dir_2link_8txt.tex @@ -0,0 +1,2 @@ +\hypertarget{unit__tests_8dir_2link_8txt}{}\doxysection{cmake-\/build-\/debug/\+C\+Make\+Files/unit\+\_\+tests.dir/link.txt File Reference} +\label{unit__tests_8dir_2link_8txt}\index{cmake-\/build-\/debug/CMakeFiles/unit\_tests.dir/link.txt@{cmake-\/build-\/debug/CMakeFiles/unit\_tests.dir/link.txt}}