mirror of
https://github.com/zoriya/ComSquare.git
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Reenabling APUs debugger
This commit is contained in:
Zoe Roux
+338
-337
@@ -4,360 +4,361 @@
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#pragma once
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#include "APU/APU.hpp"
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#include "SNES.hpp"
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#include "ClosableWindow.hpp"
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#include "ui/ui_apuView.h"
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namespace ComSquare::Debugger
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namespace ComSquare
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{
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//! @brief List of all types of operands used by the instructions
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enum Operand
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class SNES;
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namespace APU
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{
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None,
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A,
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X,
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Y,
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SP,
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PSW,
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ImmediateData,
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IndexXAddr,
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IndexYAddr,
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AbsoluteBit,
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AbsoluteAddr,
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AbsoluteAddrByX,
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AbsoluteAddrByY,
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AbsoluteByXAddr,
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AbsoluteDirectByXAddr,
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AbsoluteDirectAddrByY,
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DirectAddr,
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DirectAddrByX,
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DirectAddrByY
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};
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class APU;
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}
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//! @brief Small structure to store some values on the instructions
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struct Instruction
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namespace Debugger::APU
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{
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std::string name;
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int size;
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std::tuple<Operand, Operand> operands;
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};
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//! @brief List of all types of operands used by the instructions
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enum Operand
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{
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None,
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A,
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X,
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Y,
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SP,
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PSW,
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ImmediateData,
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IndexXAddr,
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IndexYAddr,
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AbsoluteBit,
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AbsoluteAddr,
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AbsoluteAddrByX,
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AbsoluteAddrByY,
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AbsoluteByXAddr,
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AbsoluteDirectByXAddr,
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AbsoluteDirectAddrByY,
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DirectAddr,
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DirectAddrByX,
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DirectAddrByY
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};
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class APUDebug : public QObject
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{
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private:
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//! @brief List of instructions and their information
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const std::array<Instruction, 0x100> _instructions {{
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{"NOP", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"OR", 2, {DirectAddr, None}},
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{"OR", 3, {AbsoluteAddr, None}},
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{"OR", 1, {IndexXAddr, None}},
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{"OR", 2, {AbsoluteDirectByXAddr, None}},
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{"OR", 2, {ImmediateData, None}},
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{"OR", 3, {DirectAddr, DirectAddr}},
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{"OR1", 3, {AbsoluteBit, None}},
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{"ASL", 2, {DirectAddr, None}},
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{"ASL", 3, {AbsoluteAddr, None}},
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{"PUSH", 1, {PSW, None}},
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{"TSET1", 3, {AbsoluteAddr, None}},
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{"BRK", 1, {None, None}},
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{"BPL", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"OR", 2, {DirectAddrByX, None}},
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{"OR", 3, {AbsoluteAddrByX, None}},
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{"OR", 3, {AbsoluteAddrByY, None}},
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{"OR", 2, {AbsoluteDirectAddrByY, None}},
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{"OR", 3, {DirectAddr, ImmediateData}},
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{"OR", 1, {IndexYAddr, IndexYAddr}},
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{"DECW", 2, {DirectAddr, None}},
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{"ASL", 2, {DirectAddrByX, None}},
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{"ASL", 1, {A, None}},
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{"DEC", 1, {X, None}},
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{"CMP", 3, {X, AbsoluteAddr}},
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{"JMP", 3, {AbsoluteByXAddr, None}},
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{"CLRP", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"AND", 2, {DirectAddr, None}},
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{"AND", 3, {AbsoluteAddr, None}},
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{"AND", 1, {IndexXAddr, None}},
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{"AND", 2, {AbsoluteDirectByXAddr, None}},
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{"AND", 2, {ImmediateData, None}},
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{"AND", 3, {DirectAddr, DirectAddr}},
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{"OR1", 3, {AbsoluteBit, None}},
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{"ROL", 2, {DirectAddr, None}},
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{"ROL", 3, {AbsoluteAddr, None}},
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{"PUSH", 1, {A, None}},
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{"CBNE", 3, {DirectAddrByX, ImmediateData}},
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{"BRA", 2, {ImmediateData, None}},
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{"BMI", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"AND", 2, {DirectAddrByX, None}},
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{"AND", 3, {AbsoluteAddrByX, None}},
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{"AND", 3, {AbsoluteAddrByY, None}},
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{"AND", 2, {AbsoluteDirectAddrByY, None}},
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{"AND", 3, {DirectAddr, ImmediateData}},
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{"AND", 1, {IndexXAddr, IndexYAddr}},
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{"INCW", 2, {DirectAddr, None}},
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{"ROL", 2, {AbsoluteAddrByX, None}},
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{"ROL", 1, {A, None}},
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{"INC", 1, {X, None}},
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{"CMP", 2, {X, DirectAddr}},
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{"CALL", 3, {AbsoluteAddr, None}},
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{"SETP", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"EOR", 2, {DirectAddr, None}},
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{"EOR", 3, {AbsoluteAddr, None}},
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{"EOR", 1, {IndexXAddr, None}},
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{"EOR", 2, {AbsoluteDirectByXAddr, None}},
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{"EOR", 2, {ImmediateData, None}},
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{"EOR", 3, {DirectAddr, DirectAddr}},
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{"AND1", 3, {AbsoluteBit, None}},
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{"LSR", 2, {DirectAddr, None}},
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{"LSR", 3, {AbsoluteAddr, None}},
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{"PUSH", 1, {X, None}},
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{"TCLR1", 3, {AbsoluteAddr, None}},
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{"PCALL", 3, {None, None}},
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{"BVC", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"EOR", 2, {DirectAddrByX, None}},
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{"EOR", 3, {AbsoluteAddrByX, None}},
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{"EOR", 3, {AbsoluteAddrByY, None}},
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{"EOR", 2, {AbsoluteDirectAddrByY, None}},
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{"EOR", 3, {DirectAddr, ImmediateData}},
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{"EOR", 1, {IndexXAddr, IndexYAddr}},
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{"CMPW", 2, {DirectAddr, None}},
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{"LSR", 2, {DirectAddrByX, None}},
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{"LSR", 1, {A, None}},
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{"MOV", 1, {A, X}},
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{"CMP", 3, {Y, AbsoluteAddr}},
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{"JMP", 3, {AbsoluteAddr, None}},
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{"CLRC", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"CMP", 2, {A, DirectAddr}},
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{"CMP", 3, {A, AbsoluteAddr}},
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{"CMP", 1, {A, IndexXAddr,}},
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{"CMP", 2, {A, AbsoluteDirectByXAddr}},
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{"CMP", 2, {A, ImmediateData}},
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{"CMP", 3, {DirectAddr, DirectAddr}},
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{"AND1", 3, {AbsoluteBit, None}},
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{"ROR", 2, {DirectAddr , None}},
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{"ROR", 3, {AbsoluteAddr, None}},
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{"PUSH", 1, {Y, None}},
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{"DBNZ", 3, {ImmediateData, None}},
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{"RET", 1, {None, None}},
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{"BVS", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"CMP", 2, {A, DirectAddrByX}},
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{"CMP", 3, {A, AbsoluteAddrByX}},
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{"CMP", 3, {A, AbsoluteAddrByY}},
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{"CMP", 2, {A, AbsoluteDirectAddrByY}},
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{"CMP", 3, {DirectAddr, ImmediateData}},
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{"CMP", 1, {IndexXAddr, IndexYAddr}},
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{"ADDW", 2, {DirectAddr, None}},
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{"ROR", 2, {DirectAddrByX, None}},
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{"ROR", 1, {A, None}},
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{"MOV", 1, {X, A}},
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{"CMP", 3, {Y, DirectAddr}},
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{"RETI", 1, {None, None}},
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{"SETC", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"ADC", 2, {DirectAddr, None}},
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{"ADC", 3, {AbsoluteAddr, None}},
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{"ADC", 1, {IndexXAddr, None}},
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{"ADC", 2, {AbsoluteDirectByXAddr, None}},
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{"ADC", 2, {ImmediateData, None}},
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{"ADC", 3, {DirectAddr, DirectAddr}},
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{"EOR1", 3, {AbsoluteBit, None}},
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{"DEC", 2, {DirectAddr, None}},
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{"DEC", 3, {AbsoluteAddr, None}},
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{"MOV", 2, {ImmediateData, Y}},
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{"POP", 1, {PSW, None}},
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{"MOV", 3, {DirectAddr, ImmediateData}},
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{"BCC", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"ADC", 2, {DirectAddrByX, None}},
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{"ADC", 3, {AbsoluteAddrByX, None}},
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{"ADC", 3, {AbsoluteAddrByY, None}},
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{"ADC", 2, {AbsoluteDirectAddrByY, None}},
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{"ADC", 3, {DirectAddr, ImmediateData}},
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{"ADC", 1, {IndexXAddr, IndexYAddr}},
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{"SUBW", 2, {DirectAddr, None}},
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{"DEC", 2, {DirectAddrByX, None}},
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{"DEC", 1, {A, None}},
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{"MOV", 1, {SP, X}},
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{"DIV", 1, {None, None}},
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{"XCN", 1, {None, None}},
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{"EI", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"SBC", 2, {DirectAddr, None}},
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{"SBC", 3, {AbsoluteAddr, None}},
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{"SBC", 1, {IndexXAddr, None}},
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{"SBC", 2, {AbsoluteDirectByXAddr, None}},
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{"SBC", 2, {ImmediateData, None}},
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{"SBC", 3, {DirectAddr, DirectAddr}},
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{"MOV1", 3, {AbsoluteBit, None}},
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{"INC", 2, {DirectAddr, None}},
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{"INC", 3, {AbsoluteAddr, None}},
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{"CMP", 2, {Y, ImmediateData}},
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{"POP", 1, {A, None}},
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{"MOV", 1, {A, IndexXAddr}},
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{"BCS", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"SBC", 2, {DirectAddrByX, None}},
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{"SBC", 3, {AbsoluteAddrByX, None}},
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{"SBC", 3, {AbsoluteAddrByY, None}},
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{"SBC", 2, {AbsoluteDirectAddrByY, None}},
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{"SBC", 2, {DirectAddr, ImmediateData}},
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{"SBC", 1, {IndexXAddr, IndexYAddr}},
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{"MOVW", 2, {DirectAddr, None}},
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{"INC", 2, {DirectAddrByX, None}},
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{"INC", 1, {A, None}},
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{"MOV", 1, {X, SP}},
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{"DAS", 1, {None, None}},
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{"MOV", 1, {IndexXAddr, A}},
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{"DI", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"MOV", 2, {A, DirectAddr}},
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{"MOV", 3, {A, AbsoluteAddr}},
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{"MOV", 1, {A, IndexXAddr}},
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{"MOV", 2, {A, AbsoluteDirectByXAddr}},
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{"CMP", 2, {X, ImmediateData}},
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{"MOV", 3, {X, AbsoluteAddr}},
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{"MOV1", 3, {AbsoluteBit, None}},
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{"MOV", 2, {Y, DirectAddr}},
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{"MOV", 3, {Y, AbsoluteAddr}},
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{"MOV", 2, {ImmediateData, X}},
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{"POP", 1, {X, None}},
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{"MUL", 1, {None, None}},
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{"BNE", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"MOV", 2, {A, DirectAddrByX}},
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{"MOV", 3, {A, AbsoluteAddrByX}},
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{"MOV", 3, {A, AbsoluteAddrByY}},
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{"MOV", 2, {A, AbsoluteDirectAddrByY}},
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{"MOV", 2, {X, DirectAddr}},
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{"MOV", 2, {X, DirectAddrByY}},
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{"MOVW", 2, {DirectAddr, None}},
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{"MOV", 2, {Y, DirectAddrByX}},
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{"DEC", 1, {Y, None}},
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{"MOV", 1, {Y, A}},
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{"CBNE", 3, {DirectAddrByX, ImmediateData}},
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{"DAA", 1, {None, None}},
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{"CLRV", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"MOV", 2, {DirectAddr, A}},
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{"MOV", 3, {AbsoluteAddrByX, A}},
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{"MOV", 1, {IndexXAddr, A}},
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{"MOV", 2, {AbsoluteDirectByXAddr, A}},
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{"MOV", 2, {ImmediateData, A}},
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{"MOV", 3, {AbsoluteAddr, X}},
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{"NOT1", 3, {AbsoluteBit, None}},
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{"MOV", 2, {DirectAddr, Y}},
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{"MOV", 3, {AbsoluteAddr, Y}},
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{"NOTC", 1, {None, None}},
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{"POP", 1, {Y, None}},
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{"SLEEP", 1, {None, None}},
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{"BEQ", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"MOV", 2, {DirectAddrByX, A}},
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{"MOV", 3, {AbsoluteAddrByX, A}},
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{"MOV", 3, {AbsoluteAddrByY, A}},
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{"MOV", 2, {AbsoluteDirectAddrByY, A}},
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{"MOV", 2, {DirectAddr, X}},
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{"MOV", 2, {DirectAddrByY, X}},
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{"MOV", 3, {DirectAddr, DirectAddr}},
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{"MOV", 2, {DirectAddrByX, Y}},
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{"INC", 1, {Y, None}},
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{"MOV", 1, {A, Y}},
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{"DBNZ", 3, {ImmediateData, None}},
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{"STOP", 1, {None, None}}
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}};
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//! @brief Small structure to store some values on the instructions
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struct Instruction
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{
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std::string name;
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int size;
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std::tuple<Operand, Operand> operands;
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};
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//! @brief Position of the last instruction executed
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uint16_t _pc;
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class APUDebug : public QObject
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{
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Q_OBJECT
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private:
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//! @brief List of instructions and their information
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const std::array<Instruction, 0x100> _instructions {{
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{"NOP", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"OR", 2, {DirectAddr, None}},
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{"OR", 3, {AbsoluteAddr, None}},
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{"OR", 1, {IndexXAddr, None}},
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{"OR", 2, {AbsoluteDirectByXAddr, None}},
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{"OR", 2, {ImmediateData, None}},
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{"OR", 3, {DirectAddr, DirectAddr}},
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{"OR1", 3, {AbsoluteBit, None}},
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{"ASL", 2, {DirectAddr, None}},
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{"ASL", 3, {AbsoluteAddr, None}},
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{"PUSH", 1, {PSW, None}},
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{"TSET1", 3, {AbsoluteAddr, None}},
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{"BRK", 1, {None, None}},
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{"BPL", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"OR", 2, {DirectAddrByX, None}},
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{"OR", 3, {AbsoluteAddrByX, None}},
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{"OR", 3, {AbsoluteAddrByY, None}},
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{"OR", 2, {AbsoluteDirectAddrByY, None}},
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{"OR", 3, {DirectAddr, ImmediateData}},
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{"OR", 1, {IndexYAddr, IndexYAddr}},
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{"DECW", 2, {DirectAddr, None}},
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{"ASL", 2, {DirectAddrByX, None}},
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{"ASL", 1, {A, None}},
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{"DEC", 1, {X, None}},
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{"CMP", 3, {X, AbsoluteAddr}},
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{"JMP", 3, {AbsoluteByXAddr, None}},
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{"CLRP", 1, {None, None}},
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{"TCALL", 1, {None, None}},
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{"SET1", 2, {DirectAddr, None}},
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{"BBS", 3, {DirectAddr, ImmediateData}},
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{"AND", 2, {DirectAddr, None}},
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{"AND", 3, {AbsoluteAddr, None}},
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{"AND", 1, {IndexXAddr, None}},
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{"AND", 2, {AbsoluteDirectByXAddr, None}},
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{"AND", 2, {ImmediateData, None}},
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{"AND", 3, {DirectAddr, DirectAddr}},
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{"OR1", 3, {AbsoluteBit, None}},
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{"ROL", 2, {DirectAddr, None}},
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{"ROL", 3, {AbsoluteAddr, None}},
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{"PUSH", 1, {A, None}},
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{"CBNE", 3, {DirectAddrByX, ImmediateData}},
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{"BRA", 2, {ImmediateData, None}},
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{"BMI", 2, {ImmediateData, None}},
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{"TCALL", 1, {None, None}},
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{"CLR1", 2, {DirectAddr, None}},
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{"BBC", 3, {DirectAddr, ImmediateData}},
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{"AND", 2, {DirectAddrByX, None}},
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{"AND", 3, {AbsoluteAddrByX, None}},
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{"AND", 3, {AbsoluteAddrByY, None}},
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{"AND", 2, {AbsoluteDirectAddrByY, None}},
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{"AND", 3, {DirectAddr, ImmediateData}},
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{"AND", 1, {IndexXAddr, IndexYAddr}},
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{"INCW", 2, {DirectAddr, None}},
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{"ROL", 2, {AbsoluteAddrByX, None}},
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{"ROL", 1, {A, None}},
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{"INC", 1, {X, None}},
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{"CMP", 2, {X, DirectAddr}},
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{"CALL", 3, {AbsoluteAddr, None}},
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{"SETP", 1, {None, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"SET1", 2, {DirectAddr, None}},
|
||||
{"BBS", 3, {DirectAddr, ImmediateData}},
|
||||
{"EOR", 2, {DirectAddr, None}},
|
||||
{"EOR", 3, {AbsoluteAddr, None}},
|
||||
{"EOR", 1, {IndexXAddr, None}},
|
||||
{"EOR", 2, {AbsoluteDirectByXAddr, None}},
|
||||
{"EOR", 2, {ImmediateData, None}},
|
||||
{"EOR", 3, {DirectAddr, DirectAddr}},
|
||||
{"AND1", 3, {AbsoluteBit, None}},
|
||||
{"LSR", 2, {DirectAddr, None}},
|
||||
{"LSR", 3, {AbsoluteAddr, None}},
|
||||
{"PUSH", 1, {X, None}},
|
||||
{"TCLR1", 3, {AbsoluteAddr, None}},
|
||||
{"PCALL", 3, {None, None}},
|
||||
{"BVC", 2, {ImmediateData, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"CLR1", 2, {DirectAddr, None}},
|
||||
{"BBC", 3, {DirectAddr, ImmediateData}},
|
||||
{"EOR", 2, {DirectAddrByX, None}},
|
||||
{"EOR", 3, {AbsoluteAddrByX, None}},
|
||||
{"EOR", 3, {AbsoluteAddrByY, None}},
|
||||
{"EOR", 2, {AbsoluteDirectAddrByY, None}},
|
||||
{"EOR", 3, {DirectAddr, ImmediateData}},
|
||||
{"EOR", 1, {IndexXAddr, IndexYAddr}},
|
||||
{"CMPW", 2, {DirectAddr, None}},
|
||||
{"LSR", 2, {DirectAddrByX, None}},
|
||||
{"LSR", 1, {A, None}},
|
||||
{"MOV", 1, {A, X}},
|
||||
{"CMP", 3, {Y, AbsoluteAddr}},
|
||||
{"JMP", 3, {AbsoluteAddr, None}},
|
||||
{"CLRC", 1, {None, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"SET1", 2, {DirectAddr, None}},
|
||||
{"BBS", 3, {DirectAddr, ImmediateData}},
|
||||
{"CMP", 2, {A, DirectAddr}},
|
||||
{"CMP", 3, {A, AbsoluteAddr}},
|
||||
{"CMP", 1, {A, IndexXAddr,}},
|
||||
{"CMP", 2, {A, AbsoluteDirectByXAddr}},
|
||||
{"CMP", 2, {A, ImmediateData}},
|
||||
{"CMP", 3, {DirectAddr, DirectAddr}},
|
||||
{"AND1", 3, {AbsoluteBit, None}},
|
||||
{"ROR", 2, {DirectAddr, None}},
|
||||
{"ROR", 3, {AbsoluteAddr, None}},
|
||||
{"PUSH", 1, {Y, None}},
|
||||
{"DBNZ", 3, {ImmediateData, None}},
|
||||
{"RET", 1, {None, None}},
|
||||
{"BVS", 2, {ImmediateData, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"CLR1", 2, {DirectAddr, None}},
|
||||
{"BBC", 3, {DirectAddr, ImmediateData}},
|
||||
{"CMP", 2, {A, DirectAddrByX}},
|
||||
{"CMP", 3, {A, AbsoluteAddrByX}},
|
||||
{"CMP", 3, {A, AbsoluteAddrByY}},
|
||||
{"CMP", 2, {A, AbsoluteDirectAddrByY}},
|
||||
{"CMP", 3, {DirectAddr, ImmediateData}},
|
||||
{"CMP", 1, {IndexXAddr, IndexYAddr}},
|
||||
{"ADDW", 2, {DirectAddr, None}},
|
||||
{"ROR", 2, {DirectAddrByX, None}},
|
||||
{"ROR", 1, {A, None}},
|
||||
{"MOV", 1, {X, A}},
|
||||
{"CMP", 3, {Y, DirectAddr}},
|
||||
{"RETI", 1, {None, None}},
|
||||
{"SETC", 1, {None, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"SET1", 2, {DirectAddr, None}},
|
||||
{"BBS", 3, {DirectAddr, ImmediateData}},
|
||||
{"ADC", 2, {DirectAddr, None}},
|
||||
{"ADC", 3, {AbsoluteAddr, None}},
|
||||
{"ADC", 1, {IndexXAddr, None}},
|
||||
{"ADC", 2, {AbsoluteDirectByXAddr, None}},
|
||||
{"ADC", 2, {ImmediateData, None}},
|
||||
{"ADC", 3, {DirectAddr, DirectAddr}},
|
||||
{"EOR1", 3, {AbsoluteBit, None}},
|
||||
{"DEC", 2, {DirectAddr, None}},
|
||||
{"DEC", 3, {AbsoluteAddr, None}},
|
||||
{"MOV", 2, {ImmediateData, Y}},
|
||||
{"POP", 1, {PSW, None}},
|
||||
{"MOV", 3, {DirectAddr, ImmediateData}},
|
||||
{"BCC", 2, {ImmediateData, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"CLR1", 2, {DirectAddr, None}},
|
||||
{"BBC", 3, {DirectAddr, ImmediateData}},
|
||||
{"ADC", 2, {DirectAddrByX, None}},
|
||||
{"ADC", 3, {AbsoluteAddrByX, None}},
|
||||
{"ADC", 3, {AbsoluteAddrByY, None}},
|
||||
{"ADC", 2, {AbsoluteDirectAddrByY, None}},
|
||||
{"ADC", 3, {DirectAddr, ImmediateData}},
|
||||
{"ADC", 1, {IndexXAddr, IndexYAddr}},
|
||||
{"SUBW", 2, {DirectAddr, None}},
|
||||
{"DEC", 2, {DirectAddrByX, None}},
|
||||
{"DEC", 1, {A, None}},
|
||||
{"MOV", 1, {SP, X}},
|
||||
{"DIV", 1, {None, None}},
|
||||
{"XCN", 1, {None, None}},
|
||||
{"EI", 1, {None, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"SET1", 2, {DirectAddr, None}},
|
||||
{"BBS", 3, {DirectAddr, ImmediateData}},
|
||||
{"SBC", 2, {DirectAddr, None}},
|
||||
{"SBC", 3, {AbsoluteAddr, None}},
|
||||
{"SBC", 1, {IndexXAddr, None}},
|
||||
{"SBC", 2, {AbsoluteDirectByXAddr, None}},
|
||||
{"SBC", 2, {ImmediateData, None}},
|
||||
{"SBC", 3, {DirectAddr, DirectAddr}},
|
||||
{"MOV1", 3, {AbsoluteBit, None}},
|
||||
{"INC", 2, {DirectAddr, None}},
|
||||
{"INC", 3, {AbsoluteAddr, None}},
|
||||
{"CMP", 2, {Y, ImmediateData}},
|
||||
{"POP", 1, {A, None}},
|
||||
{"MOV", 1, {A, IndexXAddr}},
|
||||
{"BCS", 2, {ImmediateData, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"CLR1", 2, {DirectAddr, None}},
|
||||
{"BBC", 3, {DirectAddr, ImmediateData}},
|
||||
{"SBC", 2, {DirectAddrByX, None}},
|
||||
{"SBC", 3, {AbsoluteAddrByX, None}},
|
||||
{"SBC", 3, {AbsoluteAddrByY, None}},
|
||||
{"SBC", 2, {AbsoluteDirectAddrByY, None}},
|
||||
{"SBC", 2, {DirectAddr, ImmediateData}},
|
||||
{"SBC", 1, {IndexXAddr, IndexYAddr}},
|
||||
{"MOVW", 2, {DirectAddr, None}},
|
||||
{"INC", 2, {DirectAddrByX, None}},
|
||||
{"INC", 1, {A, None}},
|
||||
{"MOV", 1, {X, SP}},
|
||||
{"DAS", 1, {None, None}},
|
||||
{"MOV", 1, {IndexXAddr, A}},
|
||||
{"DI", 1, {None, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"SET1", 2, {DirectAddr, None}},
|
||||
{"BBS", 3, {DirectAddr, ImmediateData}},
|
||||
{"MOV", 2, {A, DirectAddr}},
|
||||
{"MOV", 3, {A, AbsoluteAddr}},
|
||||
{"MOV", 1, {A, IndexXAddr}},
|
||||
{"MOV", 2, {A, AbsoluteDirectByXAddr}},
|
||||
{"CMP", 2, {X, ImmediateData}},
|
||||
{"MOV", 3, {X, AbsoluteAddr}},
|
||||
{"MOV1", 3, {AbsoluteBit, None}},
|
||||
{"MOV", 2, {Y, DirectAddr}},
|
||||
{"MOV", 3, {Y, AbsoluteAddr}},
|
||||
{"MOV", 2, {ImmediateData, X}},
|
||||
{"POP", 1, {X, None}},
|
||||
{"MUL", 1, {None, None}},
|
||||
{"BNE", 2, {ImmediateData, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"CLR1", 2, {DirectAddr, None}},
|
||||
{"BBC", 3, {DirectAddr, ImmediateData}},
|
||||
{"MOV", 2, {A, DirectAddrByX}},
|
||||
{"MOV", 3, {A, AbsoluteAddrByX}},
|
||||
{"MOV", 3, {A, AbsoluteAddrByY}},
|
||||
{"MOV", 2, {A, AbsoluteDirectAddrByY}},
|
||||
{"MOV", 2, {X, DirectAddr}},
|
||||
{"MOV", 2, {X, DirectAddrByY}},
|
||||
{"MOVW", 2, {DirectAddr, None}},
|
||||
{"MOV", 2, {Y, DirectAddrByX}},
|
||||
{"DEC", 1, {Y, None}},
|
||||
{"MOV", 1, {Y, A}},
|
||||
{"CBNE", 3, {DirectAddrByX, ImmediateData}},
|
||||
{"DAA", 1, {None, None}},
|
||||
{"CLRV", 1, {None, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"SET1", 2, {DirectAddr, None}},
|
||||
{"BBS", 3, {DirectAddr, ImmediateData}},
|
||||
{"MOV", 2, {DirectAddr, A}},
|
||||
{"MOV", 3, {AbsoluteAddrByX, A}},
|
||||
{"MOV", 1, {IndexXAddr, A}},
|
||||
{"MOV", 2, {AbsoluteDirectByXAddr, A}},
|
||||
{"MOV", 2, {ImmediateData, A}},
|
||||
{"MOV", 3, {AbsoluteAddr, X}},
|
||||
{"NOT1", 3, {AbsoluteBit, None}},
|
||||
{"MOV", 2, {DirectAddr, Y}},
|
||||
{"MOV", 3, {AbsoluteAddr, Y}},
|
||||
{"NOTC", 1, {None, None}},
|
||||
{"POP", 1, {Y, None}},
|
||||
{"SLEEP", 1, {None, None}},
|
||||
{"BEQ", 2, {ImmediateData, None}},
|
||||
{"TCALL", 1, {None, None}},
|
||||
{"CLR1", 2, {DirectAddr, None}},
|
||||
{"BBC", 3, {DirectAddr, ImmediateData}},
|
||||
{"MOV", 2, {DirectAddrByX, A}},
|
||||
{"MOV", 3, {AbsoluteAddrByX, A}},
|
||||
{"MOV", 3, {AbsoluteAddrByY, A}},
|
||||
{"MOV", 2, {AbsoluteDirectAddrByY, A}},
|
||||
{"MOV", 2, {DirectAddr, X}},
|
||||
{"MOV", 2, {DirectAddrByY, X}},
|
||||
{"MOV", 3, {DirectAddr, DirectAddr}},
|
||||
{"MOV", 2, {DirectAddrByX, Y}},
|
||||
{"INC", 1, {Y, None}},
|
||||
{"MOV", 1, {A, Y}},
|
||||
{"DBNZ", 3, {ImmediateData, None}},
|
||||
{"STOP", 1, {None, None}}
|
||||
}};
|
||||
|
||||
//! @brief Add instruction to disassembly
|
||||
int _appendInstruction(int row);
|
||||
//! @brief Add instruction to disassembly
|
||||
int _appendInstruction(int row);
|
||||
|
||||
//! @brief The QT window for this debugger.
|
||||
ClosableWindow *_window;
|
||||
//! @brief The QT window for this debugger.
|
||||
ClosableWindow *_window;
|
||||
|
||||
//! @brief A widget that contain the whole UI.
|
||||
Ui::APUView _ui;
|
||||
//! @brief A widget that contain the whole UI.
|
||||
Ui::APUView _ui;
|
||||
|
||||
//! @brief If this is set to true, the execution of the APU will be paused.
|
||||
bool _isPaused = true;
|
||||
//! @brief If this is set to true, the APU will execute one instruction and pause itself.
|
||||
bool _isStepping = false;
|
||||
//! @brief If this is set to true, the execution of the APU will be paused.
|
||||
bool _isPaused = true;
|
||||
//! @brief If this is set to true, the APU will execute one instruction and pause itself.
|
||||
bool _isStepping = false;
|
||||
|
||||
//! @brief A reference to the snes (to disable the debugger).
|
||||
SNES &_snes;
|
||||
//! @brief The APU to debug.
|
||||
ComSquare::APU::APU &_apu;
|
||||
|
||||
//! @brief Update the debugger panel values
|
||||
void _updatePanel();
|
||||
//! @brief Update the debugger panel values
|
||||
void _updatePanel();
|
||||
|
||||
//! @brief Updates the object that serves as the disassembly
|
||||
void _updateLogger();
|
||||
//! @brief Updates the object that serves as the disassembly
|
||||
void _updateLogger();
|
||||
|
||||
//! @brief Replace original _executeInstruction to write to the logger.
|
||||
int _executeInstruction() override;
|
||||
//! @brief Retrieves the instruction from the SP location
|
||||
[[nodiscard]] const Instruction &_getInstruction() const;
|
||||
|
||||
//! @brief Retrieves the instruction from the SP location
|
||||
Instruction &_getInstruction();
|
||||
//! @brief Returns an operand in text format
|
||||
[[nodiscard]] std::string _getOperand(Operand ope) const;
|
||||
|
||||
//! @brief Returns an operand in text format
|
||||
std::string _getOperand(Operand ope);
|
||||
public slots:
|
||||
//! @brief Pause/Resume the APU.
|
||||
void pause();
|
||||
//! @brief Step - Execute a single instruction.
|
||||
void step();
|
||||
//! @brief Override the apu's update to disable debugging.
|
||||
void update(unsigned cycles);
|
||||
public:
|
||||
//! @brief Convert a basic APU to a debugging APU.
|
||||
explicit APUDebug(ComSquare::APU::APU &apu, SNES &snes);
|
||||
APUDebug(const APUDebug &) = delete;
|
||||
APUDebug &operator=(const APUDebug &) = delete;
|
||||
~APUDebug() override = default;
|
||||
|
||||
public slots:
|
||||
//! @brief Pause/Resume the APU.
|
||||
void pause();
|
||||
//! @brief Step - Execute a single instruction.
|
||||
void step();
|
||||
//! @brief Called when the window is closed. Turn off the debugger and revert to a basic APU.
|
||||
void disableDebugger();
|
||||
public:
|
||||
//! @brief Convert a basic APU to a debugging APU.
|
||||
explicit APUDebug(ComSquare::APU::APU &apu, SNES &snes);
|
||||
APUDebug(const APUDebug &) = delete;
|
||||
APUDebug &operator=(const APUDebug &) = delete;
|
||||
~APUDebug() override = default;
|
||||
|
||||
//! @brief Override the apu's update to disable debugging.
|
||||
void update(unsigned cycles) override;
|
||||
|
||||
//! @brief Focus the debugger's window.
|
||||
void focus();
|
||||
};
|
||||
//! @brief Focus the debugger's window.
|
||||
void focus();
|
||||
};
|
||||
}
|
||||
}
|
||||
Reference in New Issue
Block a user