From 997bb4fa7c2396e4cd0d006f37a8d499eee0d463 Mon Sep 17 00:00:00 2001
From: AnonymusRaccoon
Date: Thu, 13 Feb 2020 14:05:47 +0100
Subject: [PATCH] Implementing the STX
---
sources/CPU/CPU.cpp | 4 ++++
sources/CPU/CPU.hpp | 8 +++++++-
.../CPU/Instructions/MemoryInstructions.cpp | 10 ++++++++++
tests/CPU/testStore.cpp | 20 +++++++++++++++++++
4 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/sources/CPU/CPU.cpp b/sources/CPU/CPU.cpp
index 54403c0..6e20259 100644
--- a/sources/CPU/CPU.cpp
+++ b/sources/CPU/CPU.cpp
@@ -236,6 +236,10 @@ namespace ComSquare::CPU
case Instructions::STA_SR: this->STA(this->_getStackRelativeAddr()); return 4 + !this->_registers.p.m;
case Instructions::STA_SRYi: this->STA(this->_getStackRelativeIndirectIndexedYAddr()); return 7 + !this->_registers.p.m;
+ case Instructions::STX_ABS: this->STX(this->_getAbsoluteAddr()); return 4 + !this->_registers.p.m;
+ case Instructions::STX_DP: this->STX(this->_getAbsoluteAddr()); return 3 + !this->_registers.p.m + this->_registers.dl != 0;
+ case Instructions::STX_DPY: this->STX(this->_getAbsoluteAddr()); return 4 + !this->_registers.p.m + this->_registers.dl != 0;
+
default:
throw InvalidOpcode("CPU", opcode);
}
diff --git a/sources/CPU/CPU.hpp b/sources/CPU/CPU.hpp
index b8d46c9..4c9a3e0 100644
--- a/sources/CPU/CPU.hpp
+++ b/sources/CPU/CPU.hpp
@@ -218,7 +218,11 @@ namespace ComSquare::CPU
STA_DPYi = 0x91,
STA_DPYil = 0x97,
STA_SR = 0x83,
- STA_SRYi = 0x93
+ STA_SRYi = 0x93,
+
+ STX_ABS = 0x8E,
+ STX_DP = 0x86,
+ STX_DPY = 0x96
};
//! @brief The main CPU
@@ -305,6 +309,8 @@ namespace ComSquare::CPU
void ADC(uint24_t valueAddr);
//! @brief Store the accumulator to memory.
void STA(uint24_t addr);
+ //! @brief Store the index register X to memory.
+ void STX(uint24_t addr);
public:
explicit CPU(std::shared_ptr bus, Cartridge::Header &cartridgeHeader);
//! @brief This function continue to execute the Cartridge code.
diff --git a/sources/CPU/Instructions/MemoryInstructions.cpp b/sources/CPU/Instructions/MemoryInstructions.cpp
index 56bba9a..e8dce2c 100644
--- a/sources/CPU/Instructions/MemoryInstructions.cpp
+++ b/sources/CPU/Instructions/MemoryInstructions.cpp
@@ -15,4 +15,14 @@ namespace ComSquare::CPU
this->_bus->write(addr + 1, this->_registers.ah);
}
}
+
+ void CPU::STX(uint24_t addr)
+ {
+ if (this->_registers.p.x_b)
+ this->_bus->write(addr, this->_registers.xl);
+ else {
+ this->_bus->write(addr, this->_registers.xl);
+ this->_bus->write(addr + 1, this->_registers.xh);
+ }
+ }
}
\ No newline at end of file
diff --git a/tests/CPU/testStore.cpp b/tests/CPU/testStore.cpp
index c344c78..7610aac 100644
--- a/tests/CPU/testStore.cpp
+++ b/tests/CPU/testStore.cpp
@@ -27,4 +27,24 @@ Test(STA, 16bits)
pair.second.cpu->STA(0x0);
auto data = pair.second.wram->_data[0] + (pair.second.wram->_data[1] << 8u);
cr_assert_eq(data, 0x11AB, "The stored value should be 0x11AB but it was 0x%x.", data);
+}
+
+Test(STX, 8bits)
+{
+ auto pair = Init();
+ pair.second.cpu->_registers.p.x_b = true;
+ pair.second.cpu->_registers.x = 0x11;
+ pair.second.cpu->STX(0x0);
+ auto data = pair.second.wram->_data[0];
+ cr_assert_eq(data, 0x11, "The stored value should be 0x11 but it was 0x%x.", data);
+}
+
+Test(STX, 16bits)
+{
+ auto pair = Init();
+ pair.second.cpu->_registers.p.x_b = false;
+ pair.second.cpu->_registers.x = 0x11AB;
+ pair.second.cpu->STX(0x0);
+ auto data = pair.second.wram->_data[0] + (pair.second.wram->_data[1] << 8u);
+ cr_assert_eq(data, 0x11AB, "The stored value should be 0x11AB but it was 0x%x.", data);
}
\ No newline at end of file