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Solving timing issues

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This commit is contained in:
Anonymus Raccoon
2020-03-28 20:47:13 +01:00
parent f44cd8a106
commit 9be49e283d
18 changed files with 432 additions and 485 deletions
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sources/CPU/Instructions/BitsInstructions.cpp
+23 -2
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@@ -7,7 +7,7 @@
namespace ComSquare::CPU
{
int CPU::AND(uint24_t valueAddr)
int CPU::AND(uint24_t valueAddr, AddressingMode mode)
{
unsigned negativeMask = this->_isEmulationMode ? 0x80u : 0x8000u;
unsigned value = this->_bus->read(valueAddr);
@@ -17,6 +17,27 @@ namespace ComSquare::CPU
this->_registers.a &= value;
this->_registers.p.n = this->_registers.a & negativeMask;
this->_registers.p.z = this->_registers.a == 0;
return 0;
int cycles = !this->_registers.p.m;
switch (mode) {
case DirectPage:
case DirectPageIndirect:
case DirectPageIndirectLong:
case DirectPageIndexedByX:
case DirectPageIndirectIndexedByX:
case DirectPageIndirectIndexedByYLong:
cycles += this->_registers.dl != 0;
break;
case AbsoluteIndexedByX:
case AbsoluteIndexedByY:
cycles += this->_hasIndexCrossedPageBoundary;
break;
case DirectPageIndirectIndexedByY:
cycles += this->_registers.dl != 0 + this->_hasIndexCrossedPageBoundary;
break;
default:
break;
}
return cycles;
}
}