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This commit is contained in:
AnonymusRaccoon
2020-02-28 19:20:59 +01:00
parent 68b82c9cda
commit d1561f1be3
6 changed files with 417 additions and 2 deletions
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sources/CPU/CPU.cpp
+12 -1
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@@ -328,7 +328,7 @@ namespace ComSquare::CPU
case Instructions::XCE: this->XCE(); return 2;
case Instructions::SBC_IM: this->SBC(this->_getImmediateAddrForA()); return 2 + !this->_registers.p.m;
case Instructions::SBC_IM: this->SBC(this->_getImmediateAddrForA()); return 2 + !this->_registers.p.m;
case Instructions::SBC_ABS: this->SBC(this->_getAbsoluteAddr()); return 4 + !this->_registers.p.m;
case Instructions::SBC_ABSl: this->SBC(this->_getAbsoluteLongAddr()); return 5 + !this->_registers.p.m;
case Instructions::SBC_DP: this->SBC(this->_getDirectAddr()); return 3 + !this->_registers.p.m + this->_registers.dl != 0;
@@ -359,6 +359,17 @@ namespace ComSquare::CPU
case Instructions::CPY_ABS: this->CPY(this->_getAbsoluteAddr()); return 4 + !this->_registers.p.m;
case Instructions::CPY_DP: this->CPY(this->_getDirectAddr()); return 3 + !this->_registers.p.m + this->_registers.dl != 0;
case Instructions::BCC: return this->BCC(this->_registers.pc++) + 2 + this->_isEmulationMode;
case Instructions::BCS: return this->BCS(this->_registers.pc++) + 2 + this->_isEmulationMode;
case Instructions::BEQ: return this->BEQ(this->_registers.pc++) + 2 + this->_isEmulationMode;
case Instructions::BNE: return this->BNE(this->_registers.pc++) + 2 + this->_isEmulationMode;
case Instructions::BMI: return this->BMI(this->_registers.pc++) + 2 + this->_isEmulationMode;
case Instructions::BPL: return this->BPL(this->_registers.pc++) + 2 + this->_isEmulationMode;
case Instructions::BVC: return this->BVC(this->_registers.pc++) + 2 + this->_isEmulationMode;
case Instructions::BVS: return this->BVS(this->_registers.pc++) + 2 + this->_isEmulationMode;
case Instructions::BRA: this->BRA(this->_registers.pc++); return 3 + this->_isEmulationMode;
case Instructions::BRL: this->BRL(this->_registers.pc); this->_registers.pc += 2; return 4;
default:
throw InvalidOpcode("CPU", opcode);
}
sources/CPU/CPU.hpp
+32 -1
View File
@@ -341,7 +341,18 @@ namespace ComSquare::CPU
CPY_IM = 0xC0,
CPY_ABS = 0xCC,
CPY_DP = 0xC4
CPY_DP = 0xC4,
BCC = 0x90,
BCS = 0xB0,
BEQ = 0xF0,
BNE = 0xD0,
BMI = 0x30,
BPL = 0x10,
BVC = 0x50,
BVS = 0x70,
BRA = 0x80,
BRL = 0x82
};
//! @brief The main CPU
@@ -509,6 +520,26 @@ namespace ComSquare::CPU
void CPX(uint24_t valueAddr);
//! @brief Compare the Y register with the memory
void CPY(uint24_t valueAddr);
//! @brief Branch if carry clear
bool BCC(uint24_t valueAddr);
//! @brief Branch if carry set
bool BCS(uint24_t valueAddr);
//! @brief Branch if equal
bool BEQ(uint24_t valueAddr);
//! @brief Branch if not equal
bool BNE(uint24_t valueAddr);
//! @brief Branch if minus
bool BMI(uint24_t valueAddr);
//! @brief Branch if plus
bool BPL(uint24_t valueAddr);
//! @brief Branch if Overflow Clear
bool BVC(uint24_t valueAddr);
//! @brief Branch if Overflow Set
bool BVS(uint24_t valueAddr);
//! @brief Branch always
bool BRA(uint24_t valueAddr);
//! @brief Branch always long
bool BRL(uint24_t valueAddr);
public:
explicit CPU(std::shared_ptr<Memory::MemoryBus> bus, Cartridge::Header &cartridgeHeader);
CPU(const CPU &) = default;
sources/CPU/Instructions/InternalInstruction.cpp
+71
View File
@@ -226,4 +226,75 @@ namespace ComSquare::CPU
this->_registers.p.n = y & 0x8000u;
}
}
bool CPU::BCC(uint24_t valueAddr)
{
if (!this->_registers.p.c)
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return !this->_registers.p.c;
}
bool CPU::BCS(uint24_t valueAddr)
{
if (this->_registers.p.c)
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return this->_registers.p.c;
}
bool CPU::BEQ(uint24_t valueAddr)
{
if (this->_registers.p.z)
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return this->_registers.p.z;
}
bool CPU::BNE(uint24_t valueAddr)
{
if (!this->_registers.p.z)
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return !this->_registers.p.z;
}
bool CPU::BMI(uint24_t valueAddr)
{
if (this->_registers.p.n)
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return this->_registers.p.n;
}
bool CPU::BPL(uint24_t valueAddr)
{
if (!this->_registers.p.n)
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return !this->_registers.p.n;
}
bool CPU::BRA(uint24_t valueAddr)
{
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return true;
}
bool CPU::BRL(uint24_t valueAddr)
{
unsigned value = this->_bus->read(valueAddr);
value += this->_bus->read(valueAddr + 1) << 8u;
this->_registers.pac += static_cast<int16_t>(value);
return true;
}
bool CPU::BVC(uint24_t valueAddr)
{
if (!this->_registers.p.v)
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return !this->_registers.p.v;
}
bool CPU::BVS(uint24_t valueAddr)
{
if (this->_registers.p.v)
this->_registers.pac += static_cast<int8_t>(this->_bus->read(valueAddr));
return this->_registers.p.v;
}
}