diff --git a/CMakeLists.txt b/CMakeLists.txt
index fe78bb8..1110f31 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -11,7 +11,7 @@ add_compile_options(-W -Wall -Wextra -Wshadow)
 add_executable(unit_tests
         tests/CPU/testAddressingMode.cpp
         tests/tests.cpp
-        tests/CPU/testCPU.cpp
+        tests/CPU/testInterupts.cpp
         tests/testMemoryBus.cpp
         tests/tests.hpp
         sources/SNES.cpp
@@ -58,6 +58,14 @@ add_executable(unit_tests
         sources/APU/Instructions/ProgramStatusWord.cpp
         sources/APU/Instructions/Bit.cpp
         tests/APU/testAPU.cpp
+        sources/CPU/Instructions/MathematicalOperations.cpp
+        tests/CPU/testAddressingMode.cpp
+        tests/tests.cpp
+        tests/PPU/testPpuWrite.cpp
+        tests/PPU/testPpuWriteFromVmain.cpp
+        sources/CPU/Instructions/MathematicalOperations.cpp
+        tests/CPU/Math/testADC.cpp
+        tests/CPU/testStore.cpp
 )
 
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+/* Identify known platforms by name.  */
+#if defined(__linux) || defined(__linux__) || defined(linux)
+# define PLATFORM_ID "Linux"
+
+#elif defined(__CYGWIN__)
+# define PLATFORM_ID "Cygwin"
+
+#elif defined(__MINGW32__)
+# define PLATFORM_ID "MinGW"
+
+#elif defined(__APPLE__)
+# define PLATFORM_ID "Darwin"
+
+#elif defined(_WIN32) || defined(__WIN32__) || defined(WIN32)
+# define PLATFORM_ID "Windows"
+
+#elif defined(__FreeBSD__) || defined(__FreeBSD)
+# define PLATFORM_ID "FreeBSD"
+
+#elif defined(__NetBSD__) || defined(__NetBSD)
+# define PLATFORM_ID "NetBSD"
+
+#elif defined(__OpenBSD__) || defined(__OPENBSD)
+# define PLATFORM_ID "OpenBSD"
+
+#elif defined(__sun) || defined(sun)
+# define PLATFORM_ID "SunOS"
+
+#elif defined(_AIX) || defined(__AIX) || defined(__AIX__) || defined(__aix) || defined(__aix__)
+# define PLATFORM_ID "AIX"
+
+#elif defined(__hpux) || defined(__hpux__)
+# define PLATFORM_ID "HP-UX"
+
+#elif defined(__HAIKU__)
+# define PLATFORM_ID "Haiku"
+
+#elif defined(__BeOS) || defined(__BEOS__) || defined(_BEOS)
+# define PLATFORM_ID "BeOS"
+
+#elif defined(__QNX__) || defined(__QNXNTO__)
+# define PLATFORM_ID "QNX"
+
+#elif defined(__tru64) || defined(_tru64) || defined(__TRU64__)
+# define PLATFORM_ID "Tru64"
+
+#elif defined(__riscos) || defined(__riscos__)
+# define PLATFORM_ID "RISCos"
+
+#elif defined(__sinix) || defined(__sinix__) || defined(__SINIX__)
+# define PLATFORM_ID "SINIX"
+
+#elif defined(__UNIX_SV__)
+# define PLATFORM_ID "UNIX_SV"
+
+#elif defined(__bsdos__)
+# define PLATFORM_ID "BSDOS"
+
+#elif defined(_MPRAS) || defined(MPRAS)
+# define PLATFORM_ID "MP-RAS"
+
+#elif defined(__osf) || defined(__osf__)
+# define PLATFORM_ID "OSF1"
+
+#elif defined(_SCO_SV) || defined(SCO_SV) || defined(sco_sv)
+# define PLATFORM_ID "SCO_SV"
+
+#elif defined(__ultrix) || defined(__ultrix__) || defined(_ULTRIX)
+# define PLATFORM_ID "ULTRIX"
+
+#elif defined(__XENIX__) || defined(_XENIX) || defined(XENIX)
+# define PLATFORM_ID "Xenix"
+
+#elif defined(__WATCOMC__)
+# if defined(__LINUX__)
+#  define PLATFORM_ID "Linux"
+
+# elif defined(__DOS__)
+#  define PLATFORM_ID "DOS"
+
+# elif defined(__OS2__)
+#  define PLATFORM_ID "OS2"
+
+# elif defined(__WINDOWS__)
+#  define PLATFORM_ID "Windows3x"
+
+# else /* unknown platform */
+#  define PLATFORM_ID
+# endif
+
+#elif defined(__INTEGRITY)
+# if defined(INT_178B)
+#  define PLATFORM_ID "Integrity178"
+
+# else /* regular Integrity */
+#  define PLATFORM_ID "Integrity"
+# endif
+
+#else /* unknown platform */
+# define PLATFORM_ID
+
+#endif
+
+/* For windows compilers MSVC and Intel we can determine
+   the architecture of the compiler being used.  This is because
+   the compilers do not have flags that can change the architecture,
+   but rather depend on which compiler is being used
+*/
+#if defined(_WIN32) && defined(_MSC_VER)
+# if defined(_M_IA64)
+#  define ARCHITECTURE_ID "IA64"
+
+# elif defined(_M_X64) || defined(_M_AMD64)
+#  define ARCHITECTURE_ID "x64"
+
+# elif defined(_M_IX86)
+#  define ARCHITECTURE_ID "X86"
+
+# elif defined(_M_ARM64)
+#  define ARCHITECTURE_ID "ARM64"
+
+# elif defined(_M_ARM)
+#  if _M_ARM == 4
+#   define ARCHITECTURE_ID "ARMV4I"
+#  elif _M_ARM == 5
+#   define ARCHITECTURE_ID "ARMV5I"
+#  else
+#   define ARCHITECTURE_ID "ARMV" STRINGIFY(_M_ARM)
+#  endif
+
+# elif defined(_M_MIPS)
+#  define ARCHITECTURE_ID "MIPS"
+
+# elif defined(_M_SH)
+#  define ARCHITECTURE_ID "SHx"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__WATCOMC__)
+# if defined(_M_I86)
+#  define ARCHITECTURE_ID "I86"
+
+# elif defined(_M_IX86)
+#  define ARCHITECTURE_ID "X86"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
+# if defined(__ICCARM__)
+#  define ARCHITECTURE_ID "ARM"
+
+# elif defined(__ICCRX__)
+#  define ARCHITECTURE_ID "RX"
+
+# elif defined(__ICCRH850__)
+#  define ARCHITECTURE_ID "RH850"
+
+# elif defined(__ICCRL78__)
+#  define ARCHITECTURE_ID "RL78"
+
+# elif defined(__ICCRISCV__)
+#  define ARCHITECTURE_ID "RISCV"
+
+# elif defined(__ICCAVR__)
+#  define ARCHITECTURE_ID "AVR"
+
+# elif defined(__ICC430__)
+#  define ARCHITECTURE_ID "MSP430"
+
+# elif defined(__ICCV850__)
+#  define ARCHITECTURE_ID "V850"
+
+# elif defined(__ICC8051__)
+#  define ARCHITECTURE_ID "8051"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+
+#elif defined(__ghs__)
+# if defined(__PPC64__)
+#  define ARCHITECTURE_ID "PPC64"
+
+# elif defined(__ppc__)
+#  define ARCHITECTURE_ID "PPC"
+
+# elif defined(__ARM__)
+#  define ARCHITECTURE_ID "ARM"
+
+# elif defined(__x86_64__)
+#  define ARCHITECTURE_ID "x64"
+
+# elif defined(__i386__)
+#  define ARCHITECTURE_ID "X86"
+
+# else /* unknown architecture */
+#  define ARCHITECTURE_ID ""
+# endif
+#else
+#  define ARCHITECTURE_ID
+#endif
+
+/* Convert integer to decimal digit literals.  */
+#define DEC(n)                   \
+  ('0' + (((n) / 10000000)%10)), \
+  ('0' + (((n) / 1000000)%10)),  \
+  ('0' + (((n) / 100000)%10)),   \
+  ('0' + (((n) / 10000)%10)),    \
+  ('0' + (((n) / 1000)%10)),     \
+  ('0' + (((n) / 100)%10)),      \
+  ('0' + (((n) / 10)%10)),       \
+  ('0' +  ((n) % 10))
+
+/* Convert integer to hex digit literals.  */
+#define HEX(n)             \
+  ('0' + ((n)>>28 & 0xF)), \
+  ('0' + ((n)>>24 & 0xF)), \
+  ('0' + ((n)>>20 & 0xF)), \
+  ('0' + ((n)>>16 & 0xF)), \
+  ('0' + ((n)>>12 & 0xF)), \
+  ('0' + ((n)>>8  & 0xF)), \
+  ('0' + ((n)>>4  & 0xF)), \
+  ('0' + ((n)     & 0xF))
+
+/* Construct a string literal encoding the version number components. */
+#ifdef COMPILER_VERSION_MAJOR
+char const info_version[] = {
+  'I', 'N', 'F', 'O', ':',
+  'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','[',
+  COMPILER_VERSION_MAJOR,
+# ifdef COMPILER_VERSION_MINOR
+  '.', COMPILER_VERSION_MINOR,
+#  ifdef COMPILER_VERSION_PATCH
+   '.', COMPILER_VERSION_PATCH,
+#   ifdef COMPILER_VERSION_TWEAK
+    '.', COMPILER_VERSION_TWEAK,
+#   endif
+#  endif
+# endif
+  ']','\0'};
+#endif
+
+/* Construct a string literal encoding the internal version number. */
+#ifdef COMPILER_VERSION_INTERNAL
+char const info_version_internal[] = {
+  'I', 'N', 'F', 'O', ':',
+  'c','o','m','p','i','l','e','r','_','v','e','r','s','i','o','n','_',
+  'i','n','t','e','r','n','a','l','[',
+  COMPILER_VERSION_INTERNAL,']','\0'};
+#endif
+
+/* Construct a string literal encoding the version number components. */
+#ifdef SIMULATE_VERSION_MAJOR
+char const info_simulate_version[] = {
+  'I', 'N', 'F', 'O', ':',
+  's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[',
+  SIMULATE_VERSION_MAJOR,
+# ifdef SIMULATE_VERSION_MINOR
+  '.', SIMULATE_VERSION_MINOR,
+#  ifdef SIMULATE_VERSION_PATCH
+   '.', SIMULATE_VERSION_PATCH,
+#   ifdef SIMULATE_VERSION_TWEAK
+    '.', SIMULATE_VERSION_TWEAK,
+#   endif
+#  endif
+# endif
+  ']','\0'};
+#endif
+
+/* Construct the string literal in pieces to prevent the source from
+   getting matched.  Store it in a pointer rather than an array
+   because some compilers will just produce instructions to fill the
+   array rather than assigning a pointer to a static array.  */
+char const* info_platform = "INFO" ":" "platform[" PLATFORM_ID "]";
+char const* info_arch = "INFO" ":" "arch[" ARCHITECTURE_ID "]";
+
+
+
+
+#if !defined(__STDC__)
+# if (defined(_MSC_VER) && !defined(__clang__)) \
+  || (defined(__ibmxl__) || defined(__IBMC__))
+#  define C_DIALECT "90"
+# else
+#  define C_DIALECT
+# endif
+#elif __STDC_VERSION__ >= 201000L
+# define C_DIALECT "11"
+#elif __STDC_VERSION__ >= 199901L
+# define C_DIALECT "99"
+#else
+# define C_DIALECT "90"
+#endif
+const char* info_language_dialect_default =
+  "INFO" ":" "dialect_default[" C_DIALECT "]";
+
+/*--------------------------------------------------------------------------*/
+
+#ifdef ID_VOID_MAIN
+void main() {}
+#else
+# if defined(__CLASSIC_C__)
+int main(argc, argv) int argc; char *argv[];
+# else
+int main(int argc, char* argv[])
+# endif
+{
+  int require = 0;
+  require += info_compiler[argc];
+  require += info_platform[argc];
+  require += info_arch[argc];
+#ifdef COMPILER_VERSION_MAJOR
+  require += info_version[argc];
+#endif
+#ifdef COMPILER_VERSION_INTERNAL
+  require += info_version_internal[argc];
+#endif
+#ifdef SIMULATE_ID
+  require += info_simulate[argc];
+#endif
+#ifdef SIMULATE_VERSION_MAJOR
+  require += info_simulate_version[argc];
+#endif
+#if defined(__CRAYXE) || defined(__CRAYXC)
+  require += info_cray[argc];
+#endif
+  require += info_language_dialect_default[argc];
+  (void)argv;
+  return require;
+}
+#endif
diff --git a/build/CMakeFiles/3.16.3/CompilerIdC/a.out b/build/CMakeFiles/3.16.3/CompilerIdC/a.out
new file mode 100755
index 0000000..bde766c
Binary files /dev/null and b/build/CMakeFiles/3.16.3/CompilerIdC/a.out differ
diff --git a/build/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp b/build/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp
new file mode 100644
index 0000000..69cfdba
--- /dev/null
+++ b/build/CMakeFiles/3.16.3/CompilerIdCXX/CMakeCXXCompilerId.cpp
@@ -0,0 +1,660 @@
+/* This source file must have a .cpp extension so that all C++ compilers
+   recognize the extension without flags.  Borland does not know .cxx for
+   example.  */
+#ifndef __cplusplus
+# error "A C compiler has been selected for C++."
+#endif
+
+
+/* Version number components: V=Version, R=Revision, P=Patch
+   Version date components:   YYYY=Year, MM=Month,   DD=Day  */
+
+#if defined(__COMO__)
+# define COMPILER_ID "Comeau"
+  /* __COMO_VERSION__ = VRR */
+# define COMPILER_VERSION_MAJOR DEC(__COMO_VERSION__ / 100)
+# define COMPILER_VERSION_MINOR DEC(__COMO_VERSION__ % 100)
+
+#elif defined(__INTEL_COMPILER) || defined(__ICC)
+# define COMPILER_ID "Intel"
+# if defined(_MSC_VER)
+#  define SIMULATE_ID "MSVC"
+# endif
+# if defined(__GNUC__)
+#  define SIMULATE_ID "GNU"
+# endif
+  /* __INTEL_COMPILER = VRP */
+# define COMPILER_VERSION_MAJOR DEC(__INTEL_COMPILER/100)
+# define COMPILER_VERSION_MINOR DEC(__INTEL_COMPILER/10 % 10)
+# if defined(__INTEL_COMPILER_UPDATE)
+#  define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER_UPDATE)
+# else
+#  define COMPILER_VERSION_PATCH DEC(__INTEL_COMPILER   % 10)
+# endif
+# if defined(__INTEL_COMPILER_BUILD_DATE)
+  /* __INTEL_COMPILER_BUILD_DATE = YYYYMMDD */
+#  define COMPILER_VERSION_TWEAK DEC(__INTEL_COMPILER_BUILD_DATE)
+# endif
+# if defined(_MSC_VER)
+   /* _MSC_VER = VVRR */
+#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+# endif
+# if defined(__GNUC__)
+#  define SIMULATE_VERSION_MAJOR DEC(__GNUC__)
+# elif defined(__GNUG__)
+#  define SIMULATE_VERSION_MAJOR DEC(__GNUG__)
+# endif
+# if defined(__GNUC_MINOR__)
+#  define SIMULATE_VERSION_MINOR DEC(__GNUC_MINOR__)
+# endif
+# if defined(__GNUC_PATCHLEVEL__)
+#  define SIMULATE_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
+# endif
+
+#elif defined(__PATHCC__)
+# define COMPILER_ID "PathScale"
+# define COMPILER_VERSION_MAJOR DEC(__PATHCC__)
+# define COMPILER_VERSION_MINOR DEC(__PATHCC_MINOR__)
+# if defined(__PATHCC_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__PATHCC_PATCHLEVEL__)
+# endif
+
+#elif defined(__BORLANDC__) && defined(__CODEGEARC_VERSION__)
+# define COMPILER_ID "Embarcadero"
+# define COMPILER_VERSION_MAJOR HEX(__CODEGEARC_VERSION__>>24 & 0x00FF)
+# define COMPILER_VERSION_MINOR HEX(__CODEGEARC_VERSION__>>16 & 0x00FF)
+# define COMPILER_VERSION_PATCH DEC(__CODEGEARC_VERSION__     & 0xFFFF)
+
+#elif defined(__BORLANDC__)
+# define COMPILER_ID "Borland"
+  /* __BORLANDC__ = 0xVRR */
+# define COMPILER_VERSION_MAJOR HEX(__BORLANDC__>>8)
+# define COMPILER_VERSION_MINOR HEX(__BORLANDC__ & 0xFF)
+
+#elif defined(__WATCOMC__) && __WATCOMC__ < 1200
+# define COMPILER_ID "Watcom"
+   /* __WATCOMC__ = VVRR */
+# define COMPILER_VERSION_MAJOR DEC(__WATCOMC__ / 100)
+# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
+# if (__WATCOMC__ % 10) > 0
+#  define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
+# endif
+
+#elif defined(__WATCOMC__)
+# define COMPILER_ID "OpenWatcom"
+   /* __WATCOMC__ = VVRP + 1100 */
+# define COMPILER_VERSION_MAJOR DEC((__WATCOMC__ - 1100) / 100)
+# define COMPILER_VERSION_MINOR DEC((__WATCOMC__ / 10) % 10)
+# if (__WATCOMC__ % 10) > 0
+#  define COMPILER_VERSION_PATCH DEC(__WATCOMC__ % 10)
+# endif
+
+#elif defined(__SUNPRO_CC)
+# define COMPILER_ID "SunPro"
+# if __SUNPRO_CC >= 0x5100
+   /* __SUNPRO_CC = 0xVRRP */
+#  define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>12)
+#  define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xFF)
+#  define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC    & 0xF)
+# else
+   /* __SUNPRO_CC = 0xVRP */
+#  define COMPILER_VERSION_MAJOR HEX(__SUNPRO_CC>>8)
+#  define COMPILER_VERSION_MINOR HEX(__SUNPRO_CC>>4 & 0xF)
+#  define COMPILER_VERSION_PATCH HEX(__SUNPRO_CC    & 0xF)
+# endif
+
+#elif defined(__HP_aCC)
+# define COMPILER_ID "HP"
+  /* __HP_aCC = VVRRPP */
+# define COMPILER_VERSION_MAJOR DEC(__HP_aCC/10000)
+# define COMPILER_VERSION_MINOR DEC(__HP_aCC/100 % 100)
+# define COMPILER_VERSION_PATCH DEC(__HP_aCC     % 100)
+
+#elif defined(__DECCXX)
+# define COMPILER_ID "Compaq"
+  /* __DECCXX_VER = VVRRTPPPP */
+# define COMPILER_VERSION_MAJOR DEC(__DECCXX_VER/10000000)
+# define COMPILER_VERSION_MINOR DEC(__DECCXX_VER/100000  % 100)
+# define COMPILER_VERSION_PATCH DEC(__DECCXX_VER         % 10000)
+
+#elif defined(__IBMCPP__) && defined(__COMPILER_VER__)
+# define COMPILER_ID "zOS"
+  /* __IBMCPP__ = VRP */
+# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
+# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__IBMCPP__    % 10)
+
+#elif defined(__ibmxl__) && defined(__clang__)
+# define COMPILER_ID "XLClang"
+# define COMPILER_VERSION_MAJOR DEC(__ibmxl_version__)
+# define COMPILER_VERSION_MINOR DEC(__ibmxl_release__)
+# define COMPILER_VERSION_PATCH DEC(__ibmxl_modification__)
+# define COMPILER_VERSION_TWEAK DEC(__ibmxl_ptf_fix_level__)
+
+
+#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ >= 800
+# define COMPILER_ID "XL"
+  /* __IBMCPP__ = VRP */
+# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
+# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__IBMCPP__    % 10)
+
+#elif defined(__IBMCPP__) && !defined(__COMPILER_VER__) && __IBMCPP__ < 800
+# define COMPILER_ID "VisualAge"
+  /* __IBMCPP__ = VRP */
+# define COMPILER_VERSION_MAJOR DEC(__IBMCPP__/100)
+# define COMPILER_VERSION_MINOR DEC(__IBMCPP__/10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__IBMCPP__    % 10)
+
+#elif defined(__PGI)
+# define COMPILER_ID "PGI"
+# define COMPILER_VERSION_MAJOR DEC(__PGIC__)
+# define COMPILER_VERSION_MINOR DEC(__PGIC_MINOR__)
+# if defined(__PGIC_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__PGIC_PATCHLEVEL__)
+# endif
+
+#elif defined(_CRAYC)
+# define COMPILER_ID "Cray"
+# define COMPILER_VERSION_MAJOR DEC(_RELEASE_MAJOR)
+# define COMPILER_VERSION_MINOR DEC(_RELEASE_MINOR)
+
+#elif defined(__TI_COMPILER_VERSION__)
+# define COMPILER_ID "TI"
+  /* __TI_COMPILER_VERSION__ = VVVRRRPPP */
+# define COMPILER_VERSION_MAJOR DEC(__TI_COMPILER_VERSION__/1000000)
+# define COMPILER_VERSION_MINOR DEC(__TI_COMPILER_VERSION__/1000   % 1000)
+# define COMPILER_VERSION_PATCH DEC(__TI_COMPILER_VERSION__        % 1000)
+
+#elif defined(__FUJITSU) || defined(__FCC_VERSION) || defined(__fcc_version)
+# define COMPILER_ID "Fujitsu"
+
+#elif defined(__ghs__)
+# define COMPILER_ID "GHS"
+/* __GHS_VERSION_NUMBER = VVVVRP */
+# ifdef __GHS_VERSION_NUMBER
+# define COMPILER_VERSION_MAJOR DEC(__GHS_VERSION_NUMBER / 100)
+# define COMPILER_VERSION_MINOR DEC(__GHS_VERSION_NUMBER / 10 % 10)
+# define COMPILER_VERSION_PATCH DEC(__GHS_VERSION_NUMBER      % 10)
+# endif
+
+#elif defined(__SCO_VERSION__)
+# define COMPILER_ID "SCO"
+
+#elif defined(__ARMCC_VERSION) && !defined(__clang__)
+# define COMPILER_ID "ARMCC"
+#if __ARMCC_VERSION >= 1000000
+  /* __ARMCC_VERSION = VRRPPPP */
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/1000000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 100)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION     % 10000)
+#else
+  /* __ARMCC_VERSION = VRPPPP */
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCC_VERSION/100000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCC_VERSION/10000 % 10)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCC_VERSION    % 10000)
+#endif
+
+
+#elif defined(__clang__) && defined(__apple_build_version__)
+# define COMPILER_ID "AppleClang"
+# if defined(_MSC_VER)
+#  define SIMULATE_ID "MSVC"
+# endif
+# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
+# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
+# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
+# if defined(_MSC_VER)
+   /* _MSC_VER = VVRR */
+#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+# endif
+# define COMPILER_VERSION_TWEAK DEC(__apple_build_version__)
+
+#elif defined(__clang__) && defined(__ARMCOMPILER_VERSION)
+# define COMPILER_ID "ARMClang"
+  # define COMPILER_VERSION_MAJOR DEC(__ARMCOMPILER_VERSION/1000000)
+  # define COMPILER_VERSION_MINOR DEC(__ARMCOMPILER_VERSION/10000 % 100)
+  # define COMPILER_VERSION_PATCH DEC(__ARMCOMPILER_VERSION     % 10000)
+# define COMPILER_VERSION_INTERNAL DEC(__ARMCOMPILER_VERSION)
+
+#elif defined(__clang__)
+# define COMPILER_ID "Clang"
+# if defined(_MSC_VER)
+#  define SIMULATE_ID "MSVC"
+# endif
+# define COMPILER_VERSION_MAJOR DEC(__clang_major__)
+# define COMPILER_VERSION_MINOR DEC(__clang_minor__)
+# define COMPILER_VERSION_PATCH DEC(__clang_patchlevel__)
+# if defined(_MSC_VER)
+   /* _MSC_VER = VVRR */
+#  define SIMULATE_VERSION_MAJOR DEC(_MSC_VER / 100)
+#  define SIMULATE_VERSION_MINOR DEC(_MSC_VER % 100)
+# endif
+
+#elif defined(__GNUC__) || defined(__GNUG__)
+# define COMPILER_ID "GNU"
+# if defined(__GNUC__)
+#  define COMPILER_VERSION_MAJOR DEC(__GNUC__)
+# else
+#  define COMPILER_VERSION_MAJOR DEC(__GNUG__)
+# endif
+# if defined(__GNUC_MINOR__)
+#  define COMPILER_VERSION_MINOR DEC(__GNUC_MINOR__)
+# endif
+# if defined(__GNUC_PATCHLEVEL__)
+#  define COMPILER_VERSION_PATCH DEC(__GNUC_PATCHLEVEL__)
+# endif
+
+#elif defined(_MSC_VER)
+# define COMPILER_ID "MSVC"
+  /* _MSC_VER = VVRR */
+# define COMPILER_VERSION_MAJOR DEC(_MSC_VER / 100)
+# define COMPILER_VERSION_MINOR DEC(_MSC_VER % 100)
+# if defined(_MSC_FULL_VER)
+#  if _MSC_VER >= 1400
+    /* _MSC_FULL_VER = VVRRPPPPP */
+#   define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 100000)
+#  else
+    /* _MSC_FULL_VER = VVRRPPPP */
+#   define COMPILER_VERSION_PATCH DEC(_MSC_FULL_VER % 10000)
+#  endif
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+# endif
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+# define COMPILER_VERSION_MINOR HEX(__VISUALDSPVERSION__>>16 & 0xFF)
+# define COMPILER_VERSION_PATCH HEX(__VISUALDSPVERSION__>>8  & 0xFF)
+#endif
+
+#elif defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)
+# define COMPILER_ID "IAR"
+# if defined(__VER__) && defined(__ICCARM__)
+#  define COMPILER_VERSION_MAJOR DEC((__VER__) / 1000000)
+#  define COMPILER_VERSION_MINOR DEC(((__VER__) / 1000) % 1000)
+#  define COMPILER_VERSION_PATCH DEC((__VER__) % 1000)
+#  define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
+# elif defined(__VER__) && (defined(__ICCAVR__) || defined(__ICCRX__) || defined(__ICCRH850__) || defined(__ICCRL78__) || defined(__ICC430__) || defined(__ICCRISCV__) || defined(__ICCV850__) || defined(__ICC8051__))
+#  define COMPILER_VERSION_MAJOR DEC((__VER__) / 100)
+#  define COMPILER_VERSION_MINOR DEC((__VER__) - (((__VER__) / 100)*100))
+#  define COMPILER_VERSION_PATCH DEC(__SUBVERSION__)
+#  define COMPILER_VERSION_INTERNAL DEC(__IAR_SYSTEMS_ICC__)
+# endif
+
+
+/* These compilers are either not known or too old to define an
+  identification macro.  Try to identify the platform and guess that
+  it is the native compiler.  */
+#elif defined(__hpux) || defined(__hpua)
+# define COMPILER_ID "HP"
+
+#else /* unknown compiler */
+# define COMPILER_ID ""
+#endif
+
+/* Construct the string literal in pieces to prevent the source from
+   getting matched.  Store it in a pointer rather than an array
+   because some compilers will just produce instructions to fill the
+   array rather than assigning a pointer to a static array.  */
+char const* info_compiler = "INFO" ":" "compiler[" COMPILER_ID "]";
+#ifdef SIMULATE_ID
+char const* info_simulate = "INFO" ":" "simulate[" SIMULATE_ID "]";
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+#define STRINGIFY(X) STRINGIFY_HELPER(X)
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+# define PLATFORM_ID "Linux"
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+#elif defined(__CYGWIN__)
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+# if defined(__LINUX__)
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+#  define PLATFORM_ID "DOS"
+
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+#  define PLATFORM_ID "OS2"
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+#  define PLATFORM_ID "Windows3x"
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+# if defined(INT_178B)
+#  define PLATFORM_ID "Integrity178"
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+# else /* regular Integrity */
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+# endif
+
+#else /* unknown platform */
+# define PLATFORM_ID
+
+#endif
+
+/* For windows compilers MSVC and Intel we can determine
+   the architecture of the compiler being used.  This is because
+   the compilers do not have flags that can change the architecture,
+   but rather depend on which compiler is being used
+*/
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+# if defined(_M_IA64)
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+  ('0' + (((n) / 10000000)%10)), \
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+  ('0' + (((n) / 10)%10)),       \
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+
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+  ('0' + ((n)>>28 & 0xF)), \
+  ('0' + ((n)>>24 & 0xF)), \
+  ('0' + ((n)>>20 & 0xF)), \
+  ('0' + ((n)>>16 & 0xF)), \
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+char const info_version[] = {
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+#  ifdef COMPILER_VERSION_PATCH
+   '.', COMPILER_VERSION_PATCH,
+#   ifdef COMPILER_VERSION_TWEAK
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+#   endif
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+  COMPILER_VERSION_INTERNAL,']','\0'};
+#endif
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+/* Construct a string literal encoding the version number components. */
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+char const info_simulate_version[] = {
+  'I', 'N', 'F', 'O', ':',
+  's','i','m','u','l','a','t','e','_','v','e','r','s','i','o','n','[',
+  SIMULATE_VERSION_MAJOR,
+# ifdef SIMULATE_VERSION_MINOR
+  '.', SIMULATE_VERSION_MINOR,
+#  ifdef SIMULATE_VERSION_PATCH
+   '.', SIMULATE_VERSION_PATCH,
+#   ifdef SIMULATE_VERSION_TWEAK
+    '.', SIMULATE_VERSION_TWEAK,
+#   endif
+#  endif
+# endif
+  ']','\0'};
+#endif
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+
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+#else
+#  define CXX_STD __cplusplus
+#endif
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+  "20"
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+#endif
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+int main(int argc, char* argv[])
+{
+  int require = 0;
+  require += info_compiler[argc];
+  require += info_platform[argc];
+#ifdef COMPILER_VERSION_MAJOR
+  require += info_version[argc];
+#endif
+#ifdef COMPILER_VERSION_INTERNAL
+  require += info_version_internal[argc];
+#endif
+#ifdef SIMULATE_ID
+  require += info_simulate[argc];
+#endif
+#ifdef SIMULATE_VERSION_MAJOR
+  require += info_simulate_version[argc];
+#endif
+#if defined(__CRAYXE) || defined(__CRAYXC)
+  require += info_cray[argc];
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+endif()
+
+string(REPLACE ";" "\n" CMAKE_INSTALL_MANIFEST_CONTENT
+       "${CMAKE_INSTALL_MANIFEST_FILES}")
+file(WRITE "/home/vtrencic/CLionProjects/ComSquare/build/${CMAKE_INSTALL_MANIFEST}"
+     "${CMAKE_INSTALL_MANIFEST_CONTENT}")
diff --git a/build/unit_tests b/build/unit_tests
new file mode 100755
index 0000000..f48c9a6
Binary files /dev/null and b/build/unit_tests differ
diff --git a/docs/PPU_8hpp_source.html b/docs/PPU_8hpp_source.html
index 6153de7..aa413c7 100644
--- a/docs/PPU_8hpp_source.html
+++ b/docs/PPU_8hpp_source.html
@@ -504,7 +504,7 @@ $(function() {
 <div class="ttc" id="aclassComSquare_1_1PPU_1_1PPU_html_a80b5f1858b503dca7142a3b4a1b77ed0"><div class="ttname"><a href="classComSquare_1_1PPU_1_1PPU.html#a80b5f1858b503dca7142a3b4a1b77ed0">ComSquare::PPU::PPU::enableWindowDisplayBg4</a></div><div class="ttdeci">bool enableWindowDisplayBg4</div><div class="ttdef"><b>Definition:</b> PPU.hpp:281</div></div>
 <div class="ttc" id="aclassComSquare_1_1PPU_1_1PPU_html_ac0a304abc8eb072b4e6579992a50a7af"><div class="ttname"><a href="classComSquare_1_1PPU_1_1PPU.html#ac0a304abc8eb072b4e6579992a50a7af">ComSquare::PPU::PPU::enableColorMathBg1</a></div><div class="ttdeci">bool enableColorMathBg1</div><div class="ttdef"><b>Definition:</b> PPU.hpp:345</div></div>
 <div class="ttc" id="aclassComSquare_1_1PPU_1_1PPU_html_affb09d2bee7fafdc75eef3e8cd75f036"><div class="ttname"><a href="classComSquare_1_1PPU_1_1PPU.html#affb09d2bee7fafdc75eef3e8cd75f036">ComSquare::PPU::PPU::objectSize</a></div><div class="ttdeci">uint8_t objectSize</div><div class="ttdef"><b>Definition:</b> PPU.hpp:28</div></div>
-<div class="ttc" id="aclassComSquare_1_1PPU_1_1PPU_html_af6c4596ba682a867608d4587db646774"><div class="ttname"><a href="classComSquare_1_1PPU_1_1PPU.html#af6c4596ba682a867608d4587db646774">ComSquare::PPU::PPU::m7ofs</a></div><div class="ttdeci">union ComSquare::PPU::PPU::@88 m7ofs</div><div class="ttdoc">M7HOFS Register (Mode 7 BG Horizontal Scroll)</div></div>
+<div class="ttc" id="aclassComSquare_1_1PPU_1_1PPU_html_af6c4596ba682a867608d4587db646774"><div class="ttname"><a href="classComSquare_1_1PPU_1_1PPU.html#af6c4596ba682a867608d4587db646774">ComSquare::PPU::PPU::m7ofs</a></div><div class="ttdeci">union ComSquare::PPU::PPU::@88 m7ofs</div><div class="ttdoc">M7HOFS Register (Mode 7 _BG Horizontal Scroll)</div></div>
 <div class="ttc" id="aclassComSquare_1_1PPU_1_1PPU_html_aa328d9626498061e58c55fe9635049e2"><div class="ttname"><a href="classComSquare_1_1PPU_1_1PPU.html#aa328d9626498061e58c55fe9635049e2">ComSquare::PPU::PPU::pixelSize</a></div><div class="ttdeci">uint8_t pixelSize</div><div class="ttdef"><b>Definition:</b> PPU.hpp:64</div></div>
 <div class="ttc" id="aclassComSquare_1_1PPU_1_1PPU_html_a4307e93f303ac9a58e00f3fd0dc5181a"><div class="ttname"><a href="classComSquare_1_1PPU_1_1PPU.html#a4307e93f303ac9a58e00f3fd0dc5181a">ComSquare::PPU::PPU::affectBg3</a></div><div class="ttdeci">bool affectBg3</div><div class="ttdef"><b>Definition:</b> PPU.hpp:66</div></div>
 <div class="ttc" id="aclassComSquare_1_1PPU_1_1PPU_html_af7d7b2b470817c568e12e7c8b5f08da4"><div class="ttname"><a href="classComSquare_1_1PPU_1_1PPU.html#af7d7b2b470817c568e12e7c8b5f08da4">ComSquare::PPU::PPU::clipColorToBlackBeforeMath</a></div><div class="ttdeci">uint8_t clipColorToBlackBeforeMath</div><div class="ttdef"><b>Definition:</b> PPU.hpp:327</div></div>
diff --git a/docs/classComSquare_1_1PPU_1_1PPU.html b/docs/classComSquare_1_1PPU_1_1PPU.html
index b80dfdd..cf36417 100644
--- a/docs/classComSquare_1_1PPU_1_1PPU.html
+++ b/docs/classComSquare_1_1PPU_1_1PPU.html
@@ -328,7 +328,7 @@ Private Attributes</h2></td></tr>
 <tr class="memitem:a9dcb2ac75dbbc472eebc14e463a95728"><td class="memItemLeft" >&#160;&#160;&#160;uint8_t&#160;&#160;&#160;<a class="el" href="classComSquare_1_1PPU_1_1PPU.html#a37f1fce3b3a72717fff33803b3c4633a">raw</a></td></tr>
 <tr class="separator:a9dcb2ac75dbbc472eebc14e463a95728"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:af6c4596ba682a867608d4587db646774"><td class="memItemLeft" valign="top">}&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="classComSquare_1_1PPU_1_1PPU.html#af6c4596ba682a867608d4587db646774">m7ofs</a></td></tr>
-<tr class="memdesc:af6c4596ba682a867608d4587db646774"><td class="mdescLeft">&#160;</td><td class="mdescRight">M7HOFS Register (Mode 7 BG Horizontal Scroll)  <a href="classComSquare_1_1PPU_1_1PPU.html#af6c4596ba682a867608d4587db646774">More...</a><br /></td></tr>
+<tr class="memdesc:af6c4596ba682a867608d4587db646774"><td class="mdescLeft">&#160;</td><td class="mdescRight">M7HOFS Register (Mode 7 _BG Horizontal Scroll)  <a href="classComSquare_1_1PPU_1_1PPU.html#af6c4596ba682a867608d4587db646774">More...</a><br /></td></tr>
 <tr class="separator:af6c4596ba682a867608d4587db646774"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a5a31b91f72d4980d173fa98139adbe48"><td class="memItemLeft" >union {</td></tr>
 <tr class="memitem:a72068e442d574a7c7366af510501fd4b"><td class="memItemLeft" >&#160;&#160;&#160;struct {</td></tr>
@@ -1934,8 +1934,8 @@ Private Attributes</h2></td></tr>
       </table>
 </div><div class="memdoc">
 
-<p>M7HOFS Register (Mode 7 BG Horizontal Scroll) </p>
-<p>M7VOFS Register (Mode 7 BG Vertical Scroll) </p>
+<p>M7HOFS Register (Mode 7 _BG Horizontal Scroll) </p>
+<p>M7VOFS Register (Mode 7 _BG Vertical Scroll) </p>
 
 </div>
 </div>
diff --git a/docs/latex/classComSquare_1_1PPU_1_1PPU.tex b/docs/latex/classComSquare_1_1PPU_1_1PPU.tex
index 65f37ec..4237964 100644
--- a/docs/latex/classComSquare_1_1PPU_1_1PPU.tex
+++ b/docs/latex/classComSquare_1_1PPU_1_1PPU.tex
@@ -203,7 +203,7 @@ union \{\\
 \>uint8\_t \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_a37f1fce3b3a72717fff33803b3c4633a}{raw}}\\
 \} \mbox{\hyperlink{classComSquare_1_1PPU_1_1PPU_af6c4596ba682a867608d4587db646774}{m7ofs}}\\
 
-\end{tabbing}\begin{DoxyCompactList}\small\item\em M7\+H\+O\+FS Register (Mode 7 BG Horizontal Scroll) \end{DoxyCompactList}\item 
+\end{tabbing}\begin{DoxyCompactList}\small\item\em M7\+H\+O\+FS Register (Mode 7 _BG Horizontal Scroll) \end{DoxyCompactList}\item
 \begin{tabbing}
 xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=xx\=\kill
 union \{\\
@@ -1093,9 +1093,9 @@ I\+N\+I\+D\+I\+SP Register (F-\/blank and Brightness)
 
 
 
-M7\+H\+O\+FS Register (Mode 7 BG Horizontal Scroll) 
+M7\+H\+O\+FS Register (Mode 7 _BG Horizontal Scroll)
 
-M7\+V\+O\+FS Register (Mode 7 BG Vertical Scroll) \mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a1915ae2586d7f0e7ad3f0046e98c4082}\label{classComSquare_1_1PPU_1_1PPU_a1915ae2586d7f0e7ad3f0046e98c4082}} 
+M7\+V\+O\+FS Register (Mode 7 _BG Vertical Scroll) \mbox{\Hypertarget{classComSquare_1_1PPU_1_1PPU_a1915ae2586d7f0e7ad3f0046e98c4082}\label{classComSquare_1_1PPU_1_1PPU_a1915ae2586d7f0e7ad3f0046e98c4082}}
 \index{ComSquare::PPU::PPU@{ComSquare::PPU::PPU}!m7sel@{m7sel}}
 \index{m7sel@{m7sel}!ComSquare::PPU::PPU@{ComSquare::PPU::PPU}}
 \doxysubsubsection{\texorpdfstring{m7sel}{m7sel}}
diff --git a/sources/APU/APU.cpp b/sources/APU/APU.cpp
index 3a9036c..3417671 100644
--- a/sources/APU/APU.cpp
+++ b/sources/APU/APU.cpp
@@ -2,6 +2,7 @@
 // Created by Melefo on 27/01/2020.
 //
 
+#include <cstring>
 #include "APU.hpp"
 #include "../Exceptions/NotImplementedException.hpp"
 #include "../Exceptions/InvalidAddress.hpp"
@@ -15,6 +16,7 @@ namespace ComSquare::APU
 		this->_map.Page1 = std::make_shared<Ram::Ram>(Ram::Ram(0x0100));
 		this->_map.Memory = std::make_shared<Ram::Ram>(Ram::Ram(0xFDC0));
 		this->_map.IPL = std::make_shared<Ram::Ram>(Ram::Ram(0x0040));
+		this->reset();
 	}
 
 	uint8_t APU::_internalRead(uint24_t addr) {
@@ -150,6 +152,10 @@ namespace ComSquare::APU
 		}
 	}
 
+	void APU::reset()
+	{
+	}
+
 	int APU::executeInstruction()
 	{
 		uint8_t opcode = this->_internalRead(this->_internalRegisters.pc++);
@@ -159,32 +165,48 @@ namespace ComSquare::APU
 			return this->NOP();
 		case 0x02:
 			return this->SET1(_getDirectAddr(), 0);
+		case 0x12:
+			return this->CLR1(_getDirectAddr(), 0);
 		case 0x20:
 			return this->CLRP();
 		case 0x22:
 			return this->SET1(_getDirectAddr(), 1);
+		case 0x32:
+			return this->CLR1(_getDirectAddr(), 1);
 		case 0x40:
 			return this->SETP();
 		case 0x42:
 			return this->SET1(_getDirectAddr(), 2);
+		case 0x52:
+			return this->CLR1(_getDirectAddr(), 2);
 		case 0x60:
 			return this->CLRC();
 		case 0x62:
 			return this->SET1(_getDirectAddr(), 3);
+		case 0x72:
+			return this->CLR1(_getDirectAddr(), 3);
 		case 0x80:
 			return this->SETC();
 		case 0x82:
 			return this->SET1(_getDirectAddr(), 4);
+		case 0x92:
+			return this->CLR1(_getDirectAddr(), 4);
 		case 0xA0:
 			return this->EI();
 		case 0xA2:
 			return this->SET1(_getDirectAddr(), 5);
+		case 0xB2:
+			return this->CLR1(_getDirectAddr(), 5);
 		case 0xC0:
 			return this->DI();
 		case 0xC2:
 			return this->SET1(_getDirectAddr(), 6);
-		case 0x32:
+		case 0xD2:
+			return this->CLR1(_getDirectAddr(), 6);
+		case 0xE2:
 			return this->SET1(_getDirectAddr(), 7);
+		case 0xF2:
+			return this->CLR1(_getDirectAddr(), 7);
 		case 0xED:
 			return this->NOTC();
 		case 0xEF:
@@ -209,10 +231,18 @@ namespace ComSquare::APU
 
 	uint24_t APU::_getDirectAddr()
 	{
-		uint8_t addr = this->_internalRead(this->_internalRegisters.pc++);
+		uint24_t addr = this->_internalRead(this->_internalRegisters.pc++);
 
 		if (this->_internalRegisters.p)
 			addr += 0x100;
 		return addr;
 	}
+
+	uint24_t APU::_getAbsoluteAddr()
+	{
+		uint24_t addr1 = this->_internalRead(this->_internalRegisters.pc++);
+		uint24_t addr2 = this->_internalRead(this->_internalRegisters.pc++);
+
+		return (addr2 << 8u) | addr1;
+	}
 }
\ No newline at end of file
diff --git a/sources/APU/APU.hpp b/sources/APU/APU.hpp
index 5e5693d..521b0a7 100644
--- a/sources/APU/APU.hpp
+++ b/sources/APU/APU.hpp
@@ -29,7 +29,7 @@ namespace ComSquare::APU
 		};
 
 		//! @brief The Stack pointer register
-		uint8_t sp = 0x00FF;
+		uint8_t sp;
 
 		//! @brief The Program counter register
 		union {
@@ -158,6 +158,8 @@ namespace ComSquare::APU
 
 		//! @brief Get direct page offset
 		uint24_t _getDirectAddr();
+		//! @brief Get absolute direct page offset
+		uint24_t _getAbsoluteAddr();
 
 		//! @brief Execute a single instruction.
 		//! @return The number of cycles that the instruction took.
@@ -189,6 +191,10 @@ namespace ComSquare::APU
 
 		//! @brief Set 1-bit instruction, set a bit in direct page
 		int SET1(uint24_t dp, uint8_t bit);
+		//! @brief Clear 1-bit instruction, clear a bit in direct page
+		int CLR1(uint24_t dp, uint8_t bit);
+		//! @brief test set 1-bit instruction, Test and set bits with absolute address
+		int TSET1();
 	public:
 		explicit APU();
 
@@ -205,6 +211,9 @@ namespace ComSquare::APU
 		//! @brief This function execute the instructions received until the maximum number of cycles is reached.
 		//! @return The number of cycles that elapsed.
 		void update(unsigned cycles);
+
+		//! @brief This function is executed when the SNES is powered on or the reset button is pushed.
+		void reset();
 	};
 }
 
diff --git a/sources/APU/Instructions/Bit.cpp b/sources/APU/Instructions/Bit.cpp
index 4fba0d0..89b1327 100644
--- a/sources/APU/Instructions/Bit.cpp
+++ b/sources/APU/Instructions/Bit.cpp
@@ -13,4 +13,17 @@ namespace ComSquare::APU
 		this->_internalWrite(dp, data | (1u << bit));
 		return 4;
 	}
+
+	int APU::CLR1(uint24_t dp, uint8_t bit)
+	{
+		uint8_t data = this->_internalRead(dp);
+
+		this->_internalWrite(dp, data & ~(1u << bit));
+		return 4;
+	}
+
+	int APU::TSET1()
+	{
+		return 6;
+	}
 }
\ No newline at end of file
diff --git a/sources/CPU/CPU.cpp b/sources/CPU/CPU.cpp
index e40669f..40246b7 100644
--- a/sources/CPU/CPU.cpp
+++ b/sources/CPU/CPU.cpp
@@ -15,7 +15,7 @@ namespace ComSquare::CPU
 	CPU::CPU(std::shared_ptr<Memory::MemoryBus> bus, Cartridge::Header &cartridgeHeader)
 		: _bus(std::move(bus)), _cartridgeHeader(cartridgeHeader)
 	{
-		this->_registers.pc = this->_cartridgeHeader.emulationInterrupts.reset;
+		this->RESB();
 	}
 
 	//! @bref The CPU's internal registers starts at $4200	and finish at $421F.
@@ -194,46 +194,76 @@ namespace ComSquare::CPU
 		return cycles;
 	}
 
-	int CPU::executeInstruction()
+	unsigned CPU::executeInstruction()
 	{
 		uint8_t opcode = this->_bus->read(this->_registers.pc);
 
-		switch (opcode) {
-		case Instructions::BRK: return this->BRK();
+		this->_extraMemoryCycles = 0;
 
-		case Instructions::ADC_DPXi: return this->ADC(this->_getDirectIndirectIndexedXAddr());
-		case Instructions::ADC_SR:   return this->ADC(this->_getStackRelativeAddr());
-		case Instructions::ADC_DP:   return this->ADC(this->_getDirectAddr());
-		case Instructions::ADC_DPil: return this->ADC(this->_getDirectIndirectLongAddr());
-		case Instructions::ADC_IM:   return this->ADC(this->_getImmediateAddr());
-		case Instructions::ADC_ABS:  return this->ADC(this->_getAbsoluteAddr());
-		case Instructions::ADC_ABSl: return this->ADC(this->_getAbsoluteLongAddr());
-		case Instructions::ADC_DPYi: return this->ADC(this->_getDirectIndirectIndexedYAddr());
-		case Instructions::ADC_DPi:  return this->ADC(this->_getDirectIndirectAddr());
-		case Instructions::ADC_SRYi: return this->ADC(this->_getStackRelativeIndirectIndexedYAddr());
-		case Instructions::ADC_DPX:  return this->ADC(this->_getDirectIndexedByXAddr());
-		case Instructions::ADC_DPYil:return this->ADC(this->_getDirectIndirectIndexedYLongAddr());
-		case Instructions::ADC_ABSY: return this->ADC(this->_getAbsoluteIndexedByYAddr());
-		case Instructions::ADC_ABSX: return this->ADC(this->_getAbsoluteIndexedByXAddr());
-		case Instructions::ADC_ABSXl:return this->ADC(this->_getAbsoluteIndexedByXLongAddr());
+		switch (opcode) {
+		case Instructions::BRK:      return 7 + this->BRK();
+
+		case Instructions::RTI:	     return 6 + this->RTI();
+
+		case Instructions::ADC_IM:   return 2 + this->ADC(this->_getImmediateAddr());
+		case Instructions::ADC_ABS:  return 4 + this->ADC(this->_getAbsoluteAddr());
+		case Instructions::ADC_ABSl: return 5 + this->ADC(this->_getAbsoluteLongAddr());
+		case Instructions::ADC_DP:   return 3 + this->ADC(this->_getDirectAddr());
+		case Instructions::ADC_DPi:  return 5 + this->ADC(this->_getDirectIndirectAddr());
+		case Instructions::ADC_DPil: return 6 + this->ADC(this->_getDirectIndirectLongAddr());
+		case Instructions::ADC_ABSX: return 4 + this->ADC(this->_getAbsoluteIndexedByXAddr());
+		case Instructions::ADC_ABSXl:return 5 + this->ADC(this->_getAbsoluteIndexedByXLongAddr());
+		case Instructions::ADC_ABSY: return 4 + this->ADC(this->_getAbsoluteIndexedByYAddr());
+		case Instructions::ADC_DPX:  return 4 + this->ADC(this->_getDirectIndexedByXAddr());
+		case Instructions::ADC_DPXi: return 6 + this->ADC(this->_getDirectIndirectIndexedXAddr());
+		case Instructions::ADC_DPYi: return 5 + this->ADC(this->_getDirectIndirectIndexedYAddr());
+		case Instructions::ADC_DPYil:return 6 + this->ADC(this->_getDirectIndirectIndexedYLongAddr());
+		case Instructions::ADC_SR:   return 4 + this->ADC(this->_getStackRelativeAddr());
+		case Instructions::ADC_SRYi: return 7 + this->ADC(this->_getStackRelativeIndirectIndexedYAddr());
 
 		default:
-			return 0;
-			//throw InvalidOpcode("CPU", opcode);
+			throw InvalidOpcode("CPU", opcode);
 		}
 	}
 
+	void CPU::push(uint8_t data)
+	{
+		this->_bus->write(this->_registers.s--, data);
+	}
+
+	void CPU::push(uint16_t data)
+	{
+		this->_bus->write(this->_registers.s--, data);
+		this->_bus->write(this->_registers.s--, data << 8u);
+	}
+
+	uint8_t CPU::pop()
+	{
+		return this->_bus->read(this->_registers.s++);
+	}
+
+	uint16_t CPU::pop16()
+	{
+		return this->_bus->read(this->_registers.s++) + (this->_bus->read(this->_registers.s++) << 8u);
+	}
+
 	////////////////////////////////////////////////////////////////////
 	/// Addressing modes
 	////////////////////////////////////////////////////////////////////
 
 	uint24_t CPU::_getImmediateAddr()
 	{
-		return this->_registers.pac++;
+		uint24_t effective = this->_registers.pac++;
+		if (this->_registers.p.m)
+			this->_registers.pac++;
+		return effective;
 	}
 
 	uint24_t CPU::_getDirectAddr()
 	{
+		if (this->_registers.dl != 0)
+			this->_extraMemoryCycles++;
+
 		uint8_t addr = this->_bus->read(this->_registers.pac++);
 		return this->_registers.d + addr;
 	}
@@ -256,15 +286,23 @@ namespace ComSquare::CPU
 
 	uint24_t CPU::_getDirectIndirectIndexedYAddr()
 	{
+		if (this->_registers.dl != 0)
+			this->_extraMemoryCycles++;
+
 		uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
 		uint24_t base = this->_bus->read(dp);
 		base += this->_bus->read(dp + 1) << 8u;
 		base += this->_registers.dbr << 16u;
+		if ((base & 0xF0000000u) == (((base + this->_registers.y) & 0xF0000000u)))
+			this->_extraMemoryCycles++;
 		return base + this->_registers.y;
 	}
 
 	uint24_t CPU::_getDirectIndirectIndexedYLongAddr()
 	{
+		if (this->_registers.dl != 0)
+			this->_extraMemoryCycles++;
+
 		uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
 		uint24_t base = this->_bus->read(dp);
 		base += this->_bus->read(dp + 1) << 8u;
@@ -274,6 +312,9 @@ namespace ComSquare::CPU
 
 	uint24_t CPU::_getDirectIndirectIndexedXAddr()
 	{
+		if (this->_registers.dl != 0)
+			this->_extraMemoryCycles++;
+
 		uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
 		dp += this->_registers.x;
 		uint24_t base = this->_bus->read(dp);
@@ -284,6 +325,9 @@ namespace ComSquare::CPU
 
 	uint24_t CPU::_getDirectIndexedByXAddr()
 	{
+		if (this->_registers.dl != 0)
+			this->_extraMemoryCycles++;
+
 		uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
 		dp += this->_registers.x;
 		return dp;
@@ -291,6 +335,9 @@ namespace ComSquare::CPU
 
 	uint24_t CPU::_getDirectIndexedByYAddr()
 	{
+		if (this->_registers.dl != 0)
+			this->_extraMemoryCycles++;
+
 		uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
 		dp += this->_registers.y;
 		return dp;
@@ -301,6 +348,8 @@ namespace ComSquare::CPU
 		uint16_t abs = this->_bus->read(this->_registers.pac++);
 		abs += this->_bus->read(this->_registers.pac++) << 8u;
 		uint24_t effective = abs + (this->_registers.dbr << 16u);
+		if ((effective & 0xF0000000u) == (((effective + this->_registers.x) & 0xF0000000u)))
+			this->_extraMemoryCycles++;
 		return effective + this->_registers.x;
 	}
 
@@ -309,6 +358,8 @@ namespace ComSquare::CPU
 		uint16_t abs = this->_bus->read(this->_registers.pac++);
 		abs += this->_bus->read(this->_registers.pac++) << 8u;
 		uint24_t effective = abs + (this->_registers.dbr << 16u);
+		if ((effective & 0xF0000000u) == (((effective + this->_registers.y) & 0xF0000000u)))
+			this->_extraMemoryCycles++;
 		return effective + this->_registers.y;
 	}
 
@@ -357,6 +408,9 @@ namespace ComSquare::CPU
 
 	uint24_t CPU::_getDirectIndirectAddr()
 	{
+		if (this->_registers.dl != 0)
+			this->_extraMemoryCycles++;
+
 		uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
 		uint24_t effective = this->_bus->read(dp);
 		effective += this->_bus->read(dp + 1) << 8u;
@@ -366,6 +420,9 @@ namespace ComSquare::CPU
 
 	uint24_t CPU::_getDirectIndirectLongAddr()
 	{
+		if (this->_registers.dl != 0)
+			this->_extraMemoryCycles++;
+
 		uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
 		uint24_t effective = this->_bus->read(dp);
 		effective += this->_bus->read(++dp) << 8u;
@@ -384,4 +441,15 @@ namespace ComSquare::CPU
 		base += this->_registers.dbr << 16u;
 		return base + this->_registers.y;
 	}
+
+	unsigned CPU::STA(uint24_t addr)
+	{
+		if (this->_registers.p.m)
+			this->_bus->write(addr, this->_registers.al);
+		else {
+			this->_bus->write(addr, this->_registers.al);
+			this->_bus->write(addr + 1, this->_registers.ah);
+		}
+		return 0;
+	}
 }
\ No newline at end of file
diff --git a/sources/CPU/CPU.hpp b/sources/CPU/CPU.hpp
index 7cd63b2..f74a8bf 100644
--- a/sources/CPU/CPU.hpp
+++ b/sources/CPU/CPU.hpp
@@ -25,7 +25,7 @@ namespace ComSquare::CPU
 		};
 		//! @brief The Data Bank Register;
 		uint8_t dbr;
-		//! @brief The Direct register;
+		//! @brief The Direct Page register;
 		union {
 			struct {
 				uint8_t dh;
@@ -187,6 +187,8 @@ namespace ComSquare::CPU
 	enum Instructions
 	{
 		BRK = 0x00,
+		RTI = 0x40,
+
 		ADC_DPXi = 0x61,
 		ADC_SR = 0x63,
 		ADC_DP = 0x65,
@@ -201,7 +203,7 @@ namespace ComSquare::CPU
 		ADC_DPYil = 0x77,
 		ADC_ABSY = 0x79,
 		ADC_ABSX = 0x7D,
-		ADC_ABSXl = 0x7F
+		ADC_ABSXl = 0x7F,
 	};
 
 	//! @brief The main CPU
@@ -218,6 +220,9 @@ namespace ComSquare::CPU
 		//! @brief The cartridge header (stored for interrupt vectors..
 		Cartridge::Header &_cartridgeHeader;
 
+		//! @brief An additional number of cycles that the current running instruction took to run. (Used for address modes that take longer to run than others).
+		unsigned _extraMemoryCycles = 0;
+
 		//! @brief Immediate address mode is specified with a value. (This functions returns the 24bit space address of the value).
 		uint24_t _getImmediateAddr();
 		//! @brief The destination is formed by adding the direct page register with the 8-bit address to form an effective address. (This functions returns the 24bit space address of the value).
@@ -260,14 +265,31 @@ namespace ComSquare::CPU
 		uint24_t _getStackRelativeIndirectIndexedYAddr();
 
 
+		//! @brief Push 8 bits of data to the stack.
+		void push(uint8_t data);
+		//! @brief Push 16 bits of data to the stack.
+		void push(uint16_t data);
+		//! @brief Pop 8 bits of data from the stack.
+		uint8_t pop();
+		//! @brief Pop 16 bits of data from the stack.
+		uint16_t pop16();
+
+
 		//! @brief Execute a single instruction.
 		//! @return The number of CPU cycles that the instruction took.
-		int executeInstruction();
+		unsigned executeInstruction();
 
+		//! @brief Reset interrupt - Called on boot and when the reset button is pressed.
+		unsigned RESB();
 		//! @brief Break instruction - Causes a software break. The PC is loaded from a vector table.
-		int BRK();
+		unsigned BRK();
+		//! @brief Return from Interrupt - Used to return from a interrupt handler.
+		unsigned RTI();
 		//! @brief Add with carry - Adds operand to the Accumulator; adds an additional 1 if carry is set.
-		int ADC(uint24_t valueAddr);
+		//! @return The number of extra cycles that this operation took.
+		unsigned ADC(uint24_t valueAddr);
+		//! @brief Store the accumulator to memory.
+		unsigned STA(uint24_t addr);
 	public:
 		explicit CPU(std::shared_ptr<Memory::MemoryBus> bus, Cartridge::Header &cartridgeHeader);
 		//! @brief This function continue to execute the Cartridge code.
diff --git a/sources/CPU/Instructions/Interrupts.cpp b/sources/CPU/Instructions/Interrupts.cpp
index e07534a..b175048 100644
--- a/sources/CPU/Instructions/Interrupts.cpp
+++ b/sources/CPU/Instructions/Interrupts.cpp
@@ -6,8 +6,25 @@
 
 namespace ComSquare::CPU
 {
-	int CPU::BRK()
+	unsigned CPU::RESB()
 	{
+		this->_registers.p.i = true;
+		this->_registers.p.d = false;
+		this->_isEmulationMode = true;
+		this->_registers.p.m = true;
+		this->_registers.p.x_b = true;
+		this->_registers.dbr = 0x00;
+		this->_registers.pbr = 0x00;
+		this->_registers.d = 0x0000;
+		this->_registers.sh = 0x01; // the low bit of the stack pointer is undefined on reset.
+		this->_registers.pc = this->_cartridgeHeader.emulationInterrupts.reset;
+		return 0;
+	}
+
+	unsigned CPU::BRK()
+	{
+		// TODO rework this. The PC should be pushed to the stack.
+		// Info here: http://softpixel.com/~cwright/sianse/docs/65816NFO.HTM at BRK Software Break
 		this->_registers.pc += 2;
 
 		this->_registers.p.i = true;
@@ -16,6 +33,18 @@ namespace ComSquare::CPU
 		else
 			this->_registers.pc = this->_cartridgeHeader.nativeInterrupts.brk;
 		this->_registers.p.d = false;
-		return 7 + !this->_isEmulationMode;
+		return !this->_isEmulationMode;
+	}
+
+	unsigned CPU::RTI()
+	{
+		this->_registers.p.flags = this->pop();
+		this->_registers.pc = this->pop16();
+
+		if (!this->_isEmulationMode) {
+			this->_registers.pbr = this->pop16();
+			return 1;
+		}
+		return 0;
 	}
 }
\ No newline at end of file
diff --git a/sources/CPU/Instructions/MathematicalOperations.cpp b/sources/CPU/Instructions/MathematicalOperations.cpp
index e1b205c..78a8dc1 100644
--- a/sources/CPU/Instructions/MathematicalOperations.cpp
+++ b/sources/CPU/Instructions/MathematicalOperations.cpp
@@ -2,14 +2,29 @@
 // Created by anonymus-raccoon on 2/10/20.
 //
 
+#include <iostream>
 #include "../CPU.hpp"
 
 namespace ComSquare::CPU
 {
-	int CPU::ADC(uint24_t valueAddr)
+	unsigned CPU::ADC(uint24_t valueAddr)
 	{
-//		this->_registers.a +=
-		(void)valueAddr;
-		return (0);
+		unsigned value = this->_bus->read(valueAddr) + this->_registers.p.c;
+		if (this->_registers.p.m)
+			value += this->_bus->read(valueAddr + 1) << 8u;
+		unsigned negativeMask = this->_isEmulationMode ? 0xF0u : 0xF000u;
+		unsigned maxValue = this->_isEmulationMode ? UINT8_MAX : UINT16_MAX;
+
+		this->_registers.p.c = static_cast<unsigned>(this->_registers.a) + value > maxValue;
+		if ((this->_registers.a & negativeMask) == (value & negativeMask))
+			this->_registers.p.v = (this->_registers.a & negativeMask) != ((this->_registers.a + value) & negativeMask);
+		else
+			this->_registers.p.v = false;
+		this->_registers.a += value;
+		if (this->_isEmulationMode)
+			this->_registers.a %= 0x100;
+		this->_registers.p.z = this->_registers.a == 0;
+		this->_registers.p.n = this->_registers.a & negativeMask;
+		return this->_extraMemoryCycles + !this->_registers.p.m;
 	}
 }
\ No newline at end of file
diff --git a/sources/Exceptions/InvalidAction.hpp b/sources/Exceptions/InvalidAction.hpp
index a7827ea..8b9c06a 100644
--- a/sources/Exceptions/InvalidAction.hpp
+++ b/sources/Exceptions/InvalidAction.hpp
@@ -11,7 +11,7 @@
 namespace ComSquare
 {
 	//! @brief Exception thrown when someone tries to load an invalid rom.
-	class InvalidAction : std::exception {
+	class InvalidAction : public std::exception {
 	private:
 		std::string _msg;
 	public:
diff --git a/sources/Exceptions/InvalidAddress.hpp b/sources/Exceptions/InvalidAddress.hpp
index beb3d8c..09724ae 100644
--- a/sources/Exceptions/InvalidAddress.hpp
+++ b/sources/Exceptions/InvalidAddress.hpp
@@ -13,7 +13,7 @@
 namespace ComSquare
 {
 	//! @brief Exception thrown when trying to read/write to an invalid address.
-	class InvalidAddress : std::exception {
+	class InvalidAddress : public std::exception {
 	private:
 		std::string _msg;
 	public:
@@ -25,6 +25,24 @@ namespace ComSquare
 		}
 		const char *what() const noexcept override { return this->_msg.c_str(); }
 	};
+
+	//! @brief Exception thrown when trying to read/write to an invalid address in a rectangle memory region.
+	class InvalidRectangleAddress : public std::exception {
+	private:
+		std::string _msg;
+	public:
+		InvalidRectangleAddress(std::string where, int32_t addr, int16_t subaddr, int16_t start, int16_t end)
+		{
+			std::stringstream stream;
+			stream << "Could not read/write data at address: 0x" << std::hex << addr << " from " << where;
+			if (subaddr < start)
+				stream << " (" << std::hex << subaddr << " < " << start << ")";
+			else
+				stream << " (" << std::hex << subaddr << " > " << end << ")";
+			this->_msg = stream.str();
+		}
+		const char *what() const noexcept override { return this->_msg.c_str(); }
+	};
 }
 
 #endif //COMSQUARE_INVALIDADDRESS_HPP
diff --git a/sources/Exceptions/InvalidRom.hpp b/sources/Exceptions/InvalidRom.hpp
index acbf0b3..433c478 100644
--- a/sources/Exceptions/InvalidRom.hpp
+++ b/sources/Exceptions/InvalidRom.hpp
@@ -11,7 +11,7 @@
 namespace ComSquare
 {
 	//! @brief Exception thrown when someone tries to load an invalid rom.
-	class InvalidRomException : std::exception {
+	class InvalidRomException : public std::exception {
 	private:
 		std::string _msg;
 	public:
diff --git a/sources/Exceptions/NotImplementedException.hpp b/sources/Exceptions/NotImplementedException.hpp
index 762c655..8aba3e6 100644
--- a/sources/Exceptions/NotImplementedException.hpp
+++ b/sources/Exceptions/NotImplementedException.hpp
@@ -10,7 +10,7 @@
 namespace ComSquare
 {
 	//! @brief When this is thrown, it means that we should work more.
-	class NotImplementedException : std::exception {
+	class NotImplementedException : public std::exception {
 	public:
 		explicit NotImplementedException() = default;
 		const char *what() const noexcept override { return "Not implemented yet."; }
diff --git a/sources/Memory/IRectangleMemory.cpp b/sources/Memory/IRectangleMemory.cpp
index df5e7ef..9340572 100644
--- a/sources/Memory/IRectangleMemory.cpp
+++ b/sources/Memory/IRectangleMemory.cpp
@@ -31,10 +31,10 @@ namespace ComSquare::Memory
 		unsigned bankCount = bank - this->_startBank;
 		unsigned pageCount = this->_endPage - this->_startPage;
 
-		if (bank < this->_startBank || bank >= this->_endBank)
-			throw InvalidAddress("Rectangle memory write Invalid Bank", addr);
-		if (page < this->_startPage || page >= this->_endPage)
-			throw InvalidAddress("Rectangle memory write Invalid Page", addr);
+		if (bank < this->_startBank || bank > this->_endBank)
+			throw InvalidRectangleAddress("Rectangle memory write Invalid Bank", addr, bank, this->_startBank, this->_endBank);
+		if (page < this->_startPage || page > this->_endPage)
+			throw InvalidRectangleAddress("Rectangle memory write Invalid Page", addr, page, this->_startPage, this->_endPage);
 		page -= this->_startPage;
 		page += pageCount * bankCount;
 		this->write_internal(page, data);
diff --git a/sources/PPU/PPU.cpp b/sources/PPU/PPU.cpp
index df40b39..1e59f57 100644
--- a/sources/PPU/PPU.cpp
+++ b/sources/PPU/PPU.cpp
@@ -2,6 +2,7 @@
 // Created by cbihan on 1/27/20.
 //
 
+#include <iostream>
 #include "PPU.hpp"
 #include "../Exceptions/NotImplementedException.hpp"
 #include "../Exceptions/InvalidAddress.hpp"
@@ -25,44 +26,137 @@ namespace ComSquare::PPU
 	void PPU::write(uint24_t addr, uint8_t data)
 	{
 		switch (addr) {
-		case 0x00:
-			this->inidisp.raw = data;
+		case ppuRegisters::inidisp:
+			this->_inidisp.raw = data;
 			break;
-		case 0x01:
-			this->obsel.raw = data;
+		case ppuRegisters::obsel:
+			this->_obsel.raw = data;
 			break;
-		case 0x02:
-			this->oamadd.oamaddl = data;
+		case ppuRegisters::oamaddl:
+			this->_oamadd.oamaddl = data;
 			break;
-		case 0x03:
-			this->oamadd.oamaddh = data;
+		case ppuRegisters::oamaddh:
+			this->_oamadd.oamaddh = data;
 			break;
-		case 0x04:
-			this->oamdata = data;
+		case ppuRegisters::oamdata:
+			//! @brief not implemented yet.
+			this->_oamdata = data;
 			break;
-		case 0x05:
-			this->bgmode.raw = data;
+		case ppuRegisters::bgmode:
+			this->_bgmode.raw = data;
 			break;
-		case 0x06:
-			this->mosaic.raw = data;
+		case ppuRegisters::mosaic:
+			this->_mosaic.raw = data;
 			break;
-		case 0x07:
-			this->bg1sc.raw = data;
+		case ppuRegisters::bg1sc:
+		case ppuRegisters::bg2sc:
+		case ppuRegisters::bg3sc:
+		case ppuRegisters::bg4sc:
+			this->_bgsc[addr - 0x07].raw = data;
 			break;
-		case 0x08:
-			this->bg2sc.raw = data;
+		case ppuRegisters::bg12nba:
+		case ppuRegisters::bg34nba:
+			this->_bgnba[addr - 0x0B].raw = data;
 			break;
-		case 0x09:
-			this->bg3sc.raw = data;
+		case ppuRegisters::bg1hofs:
+		case ppuRegisters::bg1vofs:
+		case ppuRegisters::bg2hofs:
+		case ppuRegisters::bg2vofs:
+		case ppuRegisters::bg3hofs:
+		case ppuRegisters::bg3vofs:
+		case ppuRegisters::bg4hofs:
+		case ppuRegisters::bg4vofs:
+			// Work in progress !
+			if (addr == ppuRegisters::bg1hofs || addr == ppuRegisters::bg1vofs)
+				this->_m7ofs[addr - ppuRegisters::bg1hofs].raw = data;
+			this->_bgofs[addr - ppuRegisters::bg1hofs].raw = data;
 			break;
-		case 0x0A:
-			this->bg4sc.raw = data;
+		case ppuRegisters::vmain:
+			this->_vmain.raw = data;
 			break;
-		case 0x0B:
-			this->bg12nba.raw = data;
+		case ppuRegisters::vmaddl:
+			this->_vmadd.vmaddl = data;
 			break;
-		case 0x0C:
-			this->bg34nba.raw = data;
+		case ppuRegisters::vmaddh:
+			this->_vmadd.vmaddh = data;
+			break;
+		case ppuRegisters::vmdatal:
+			if (!this->_inidisp.fblank) {
+				this->_vmdata.vmdatal = data;
+				//this->_vram[getVramAddress()] = this->_vmdata.vmdata;
+			}
+			if (!this->_vmain.incrementMode)
+				this->_vmadd.vmadd += this->_vmain.incrementAmount;
+			break;
+		case ppuRegisters::vmdatah:
+			if (!this->_inidisp.fblank) {
+				this->_vmdata.vmdatah = data;
+				//this->_vram[getVramAddress()] = this->_vmdata.vmdata;
+			}
+			if (this->_vmain.incrementMode)
+				this->_vmadd.vmadd += this->_vmain.incrementAmount;
+			break;
+		case ppuRegisters::m7sel:
+			this->_m7sel.raw = data;
+			break;
+		case ppuRegisters::cgadd:
+			this->_cgadd = data;
+			this->_isLowByte = true;
+			break;
+		case ppuRegisters::cgdata:
+			if (this->_isLowByte) {
+				this->_cgdata.cgdatal = data;
+				this->_bus->write(this->_cgadd, this->_cgdata.cgdatal);
+			}
+			else {
+				this->_cgdata.cgdatah = data;
+				this->_bus->write(this->_cgadd, this->_cgdata.cgdatah);
+			}
+			this->_isLowByte = !this->_isLowByte;
+			this->_cgadd++;
+			break;
+		case ppuRegisters::w12sel:
+		case ppuRegisters::w34sel:
+		case ppuRegisters::wobjsel:
+			this->_wsel[addr - ppuRegisters::w12sel].raw = data;
+			break;
+		case ppuRegisters::wh0:
+			this->_wh0 = data;
+			break;
+		case ppuRegisters::wh1:
+			this->_wh1 = data;
+			break;
+		case ppuRegisters::wh2:
+			this->_wh2 = data;
+			break;
+		case ppuRegisters::wh3:
+			this->_wh3 = data;
+			break;
+		case ppuRegisters::wbjlog:
+			this->_wbglog.raw = data;
+			break;
+		case ppuRegisters::wobjlog:
+			this->_wobjlog.raw = data;
+			break;
+		case ppuRegisters::tm:
+		case ppuRegisters::ts:
+			this->_t[addr - ppuRegisters::tm].raw = data;
+			break;
+		case ppuRegisters::tmw:
+		case ppuRegisters::tsw:
+			this->_tw[addr - ppuRegisters::tmw].raw = data;
+			break;
+		case ppuRegisters::cgwsel:
+			this->_cgwsel.raw = data;
+			break;
+		case ppuRegisters::cgadsub:
+			this->_cgadsub.raw = data;
+			break;
+		case ppuRegisters::coldata:
+			this->_coldata.raw = data;
+			break;
+		case ppuRegisters::setini:
+			this->_setini.raw = data;
 			break;
 		//TODO adding the rest of the registers. oaf !
 		default:
@@ -70,8 +164,44 @@ namespace ComSquare::PPU
 		}
 	}
 
+	uint8_t PPU::getVramAddress()
+	{
+		uint16_t vanillaAddress = this->_vmadd.vmadd;
+
+		switch (this->_vmain.addressRemapping) {
+		case 0b00:
+			return vanillaAddress;
+		case 0b01:
+			return (vanillaAddress & 0xFF00U) | (vanillaAddress & 0x00E0U) >> 5U | (vanillaAddress & 0x001FU) << 3U;
+		case 0b10:
+			return (vanillaAddress & 0xFE00U) | (vanillaAddress & 0x01C0U) >> 6U | (vanillaAddress & 0x3FU) << 3U;
+		case 0b11:
+			return (vanillaAddress & 0xFC00U) | (vanillaAddress & 0x0380U) >> 7U | (vanillaAddress & 0x7FU) << 3U;
+		}
+	}
+
 	void PPU::update(unsigned cycles)
 	{
 		(void)cycles;
+		int inc = getVramAddress();
+		//uint32_t pixelTmp = 0xFFFFFFFF;
+		//pixelTmp |= this->_inidisp.brightness;
+		if (!this->_inidisp.fblank) {
+			for (int x = 0; x < 448; x++) {
+				for (int y = 0; y < 512; y++) {
+					//this->_renderer.putPixel(x, y, ((uint32_t)_vram[inc++] << 8U) + 0xFFU);
+					this->_renderer.putPixel(x, y, (uint32_t)this->_bus->read(inc++));
+				}
+			}
+		}
+		this->_renderer.drawScreen();
+	}
+
+	PPU::PPU(const std::shared_ptr<Memory::MemoryBus> &bus, Renderer::IRenderer &renderer):
+		_bus(std::move(bus)),
+		_renderer(renderer)
+	{
+		this->_isLowByte = true;
+		//_vram = new uint16_t[32000];
 	}
 }
\ No newline at end of file
diff --git a/sources/PPU/PPU.hpp b/sources/PPU/PPU.hpp
index 0537100..41020da 100644
--- a/sources/PPU/PPU.hpp
+++ b/sources/PPU/PPU.hpp
@@ -7,231 +7,378 @@
 
 #include <stdint-gcc.h>
 #include "../Memory/IMemory.hpp"
+#include "../Memory/MemoryBus.hpp"
+#include "../Renderer/IRenderer.hpp"
+
+//#define max2BitTiles		4096
+//#define max4BitTiles		2048
+//#define max8BitTiles		1024
+
+
 
 namespace ComSquare::PPU
 {
+
+	enum ppuRegisters {
+	//! @brief INIDISP Register (F-blank and Brightness)
+	inidisp = 0x00,
+	//! @brief OBSEL Register (Object Size and Character Address)
+	obsel = 0x01,
+	//! @brief OAMADDL (OAM Address low byte)
+	oamaddl = 0x02,
+	//! @brief OAMADDH (OAM Address high bit and Obj Priority)
+	oamaddh = 0x03,
+	//! @brief OAMDATA (Data for OAM write)
+	oamdata = 0x04,
+	//! @brief BGMODE (BG Mode and Character Size)
+	bgmode = 0x05,
+	//! @brief MOSAIC (Screen Pixelation)
+	mosaic = 0x06,
+	//! @brief BG1SC (BG1 Tilemap Address and Size)
+	bg1sc = 0x07,
+	//! @brief BG2SC (BG2 Tilemap Address and Size)
+	bg2sc = 0x08,
+	//! @brief BG3SC (BG3 Tilemap Address and Size)
+	bg3sc = 0x09,
+	//! @brief BG4SC (BG4 Tilemap Address and Size)
+	bg4sc = 0x0A,
+	//! @brief BG12NBA (BG1 and 2 Chr Address)
+	bg12nba = 0x0B,
+	//! @brief BG34NBA (BG3 and 4 Chr Address)
+	bg34nba = 0x0C,
+	//! @brief BG1HOFS (BG1 Horizontal Scroll)
+	//! @brief M7HOFS (Mode 7 BG Horizontal Scroll)
+	//! @info When bg mode is 7 the register is used as M7HOFS
+	bg1hofs = 0x0D,
+	//! @brief BG1VOFS (BG1 Vertical Scroll)
+	//! @brief M7VOFS (Mode 7 BG Vertical Scroll)
+	//! @info When bg mode is 7 the register is used as M7VOFS
+	bg1vofs = 0x0E,
+	//! @brief BG2HOFS (BG2 Horizontal Scroll)
+	bg2hofs = 0x0F,
+	//! @brief BG2VOFS (BG2 Vertical Scroll)
+	bg2vofs = 0x10,
+	//! @brief BG3HOFS (BG3 Horizontal Scroll)
+	bg3hofs = 0x11,
+	//! @brief BG3VOFS (BG3 Vertical Scroll)
+	bg3vofs = 0x12,
+	//! @brief BG4HOFS (BG4 Horizontal Scroll)
+	bg4hofs = 0x13,
+	//! @brief BG4VOFS (BG4 Vertical Scroll)
+	bg4vofs = 0x14,
+	//! @brief VMAIN (Video Port Control)
+	vmain = 0x15,
+	//! @brief VMADDL (VRAM Address low byte)
+	vmaddl = 0x16,
+	//! @brief VMADDH (VRAM Address high byte)
+	vmaddh = 0x17,
+	//! @brief VMDATAL (VRAM Data Write low byte)
+	vmdatal = 0x18,
+	//! @brief VMDATAH (VRAM Data Write high byte)
+	vmdatah = 0x19,
+	//! @brief M7SEL (Mode 7 Settings)
+	m7sel = 0x1A,
+	//! @brief M7A (Mode 7 Matrix A) also used with $2134/6
+	m7a = 0x1B,
+	//! @brief M7B (Mode 7 Matrix B) also used with $2134/6
+	m7b = 0x1C,
+	//! @brief M7C (Mode 7 Matrix C)
+	m7c = 0x1D,
+	//! @brief M7D (Mode 7 Matrix D)
+	m7d = 0x1E,
+	//! @brief M7X (Mode 7 Center X)
+	m7x = 0x1F,
+	//! @brief M7Y (Mode 7 Center Y)
+	m7y = 0x20,
+	//! @brief CGADD (CGRAM Address)
+	cgadd = 0x21,
+	//! @brief CGDATA (CGRAM Data write)
+	cgdata = 0x22,
+	//! @brief W12SEL (Window Mask Settings for BG1 and BG2)
+	w12sel = 0x23,
+	//! @brief W34SEL (Window Mask Settings for BG3 and BG4)
+	w34sel = 0x24,
+	//! @brief WOBJSEL (Window Mask Settings for OBJ and Color Window)
+	wobjsel = 0x25,
+	//! @brief WH0 (Window 1 Left Position)
+	wh0 = 0x26,
+	//! @brief WH1 (Window 1 Right Position)
+	wh1 = 0x27,
+	//! @brief WH2 (Window 2 Left Position)
+	wh2 = 0x28,
+	//! @brief WH3 (Window 2 Right Position)
+	wh3 = 0x29,
+	//! @brief WBGLOG (Window mask logic for BGs)
+	wbjlog = 0x2A,
+	//! @brief WOBJLOG (Window mask logic for OBJs and Color Window)
+	wobjlog = 0x2B,
+	//! @brief TM (Main Screen Designation)
+	tm = 0x2C,
+	//! @brief TS (Subscreen Designation)
+	ts = 0x2D,
+	//! @brief TMW (Window Mask Designation for the Main Screen)
+	tmw = 0x2E,
+	//! @brief TSW (Window Mask Designation for the Subscreen)
+	tsw = 0x2F,
+	//! @brief CGWSEL (Color Addition Select)
+	cgwsel = 0x30,
+	//! @brief CGADSUB (Color math designation)
+	cgadsub = 0x31,
+	//! @brief COLDATA (Fixed Color Data)
+	coldata = 0x32,
+	//! @brief SETINI (Screen Mode/Video Select)
+	setini = 0x33,
+	//! @brief MPYL (Multiplication Result low byte)
+	mpyl = 0x34,
+	//! @brief MPYM (Multiplication Result middle byte)
+	mpum = 0x35,
+	//! @brief MPYH (Multiplication Result high byte)
+	mpyh = 0x36,
+	//! @brief SLHV (Software Latch for H/V Counter)
+	slhv = 0x37,
+	//! @brief OAMDATAREAD (Data for OAM read)
+	oamdataread = 0x38,
+	//! @brief VMDATALREAD (VRAM Data Read low byte)
+	vmdatalread = 0x39,
+	//! @brief VMDATAHREAD (VRAM Data Read high byte)
+	vmdatahread = 0x3A,
+	//! @brief CGDATAREAD (CGRAM Data read)
+	cgdataread = 0x3B,
+	//! @brief OPHCT (Horizontal Scanline Location)
+	ophct = 0x3C,
+	//! @brief OPVCT (Vertical Scanline Location)
+	opcvt = 0x3D,
+	//! @brief STAT77 (PPU Status Flag and Version)
+	stat77 = 0x3E,
+	//! @brief STAT78 (PPU Status Flag and Version)
+	stat78 = 0x3F
+	};
+
 	//! @brief The class containing all the registers the PPU
 	class PPU : public Memory::IMemory {
 	private:
+	/*	struct _layerInfo {
+			bool _characterSize;
+		};
+
+		struct {
+			unsigned int height;
+			unsigned int width;
+			bool verticalMirroring;
+			bool horizontalMirroring;
+			int verticalOffset;
+			int horizontalOffset;
+			//! @brief A Character is the base unit of the background it can be 16x16 or 8x8 (16x8 under certain circumstances)
+			unsigned char characterHeight;
+			unsigned char characterWidth;
+		} _BG[4];
+
+		struct object {
+			bool verticalMirroring;
+			bool horizontalMirroring;
+			bool priority;
+			unsigned short graphicAddress;
+		};
+
+		//! @brief INIDISP variables (F-blank and Brightness)
+		struct {
+			bool _fBlank;
+			//! @brief F=max, 0="off".
+			unsigned short _brightness;
+		} _inidisp;
+
+		//! @brief OBSEL variables (Object Size and Character Address)
+		struct {
+			//! @brief "OamMode" this contains the size of the Objects (ex: 8x8 and 16x16)
+			unsigned char _objectSize;
+			//! @brief "OamBaseAddress"
+			unsigned char _baseSelect;
+			//! @brief "OamAddressOffset"
+			unsigned char _nameSelect;
+		} _obsel;
+
+		//! @brief OAMADD variables (OAM Address and Obj Priority)
+		struct {
+			uint16_t _oamAddress;
+			bool _objPriority;
+		} _oamadd;
+
+		//! @brief BGMODE (BG Mode and Character Size)
+		struct {
+			unsigned char _bgMode;
+			bool _mode1Bg3Priority;
+			_layerInfo layers[4];
+		} _bgmode;*/
+
+
+
+
 		//! @brief INIDISP Register (F-blank and Brightness)
 		union {
 			struct {
-				bool fblank: 1;
-				bool _: 3;
 				uint8_t brightness: 4;
+				bool _: 3;
+				bool fblank: 1;
 			};
 			uint8_t raw;
-		} inidisp;
+		} _inidisp;
 		//! @brief OBSEL Register (Object Size and Character Address)
 		union {
 			struct {
-				uint8_t objectSize: 3;
-				bool nameSelect: 2;
 				uint8_t baseSelect: 3;
+				bool nameSelect: 2;
+				uint8_t objectSize: 3;
 			};
 			uint8_t raw;
-		} obsel;
+		} _obsel;
 		//! @brief OAMADD Register (OAM Address and Obj Priority)
 		union {
 			struct {
-				bool objPriorityActivationBit: 1;
-				uint8_t _: 6;
 				uint32_t oamAddress: 9;
+				uint8_t _: 6;
+				bool objPriorityActivationBit: 1;
 			};
 			struct {
-				uint8_t oamaddh;
 				uint8_t oamaddl;
+				uint8_t oamaddh;
 			};
 			uint32_t raw;
-		} oamadd;
+		} _oamadd;
 		//! @brief OAMDATA Register (Data for OAM write)
-		uint8_t oamdata;
+		uint8_t _oamdata;
 		//! @brief BGMODE Register (OAM Address and Obj Priority)
 		union {
 			struct {
-				bool characterSizeBg4: 1;
-				bool characterSizeBg3: 1;
-				bool characterSizeBg2: 1;
-				bool characterSizeBg1: 1;
-				bool mode1Bg3PriorityBit: 1;
 				uint8_t bgMode: 3;
+				bool mode1Bg3PriorityBit: 1;
+				bool characterSizeBg1: 1;
+				bool characterSizeBg2: 1;
+				bool characterSizeBg3: 1;
+				bool characterSizeBg4: 1;
 			};
 			uint8_t raw;
-		} bgmode;
+		} _bgmode;
 		//! @brief MOSAIC Register (Screen Pixelation)
 		union {
 			struct {
-				uint8_t pixelSize: 4;
-				bool affectBg4: 1;
-				bool affectBg3: 1;
-				bool affectBg2: 1;
 				bool affectBg1: 1;
+				bool affectBg2: 1;
+				bool affectBg3: 1;
+				bool affectBg4: 1;
+				uint8_t pixelSize: 4;
 			};
 			uint8_t raw;
-		} mosaic;
-		//! @brief BG1SC Register (BG1 Tilemap Address and Size)
+		} _mosaic;
+		//! @brief BGSC Registers (BG Tilemap Address and Size)
 		union {
 			struct {
-				uint8_t tilemapAddress: 6;
 				bool tilemapHorizontalMirroring: 1;
 				bool tilemapVerticalMirroring: 1;
-			};
-			uint8_t raw;
-		} bg1sc;	
-		//! @brief BG2SC Register (BG2 Tilemap Address and Size)
-		union {
-			struct {
 				uint8_t tilemapAddress: 6;
-				bool tilemapHorizontalMirroring: 1;
-				bool tilemapVerticalMirroring: 1;
 			};
 			uint8_t raw;
-		} bg2sc;
-		//! @brief BG3SC Register (BG3 Tilemap Address and Size)
+		} _bgsc[4];
+		//! @brief BGNBA Registers (BG1/2/3/4 Chr Address)
 		union {
 			struct {
-				uint8_t tilemapAddress: 6;
-				bool tilemapHorizontalMirroring: 1;
-				bool tilemapVerticalMirroring: 1;
-			};
-			uint8_t raw;
-		} bg3sc;
-		//! @brief BG4SC Register (BG4 Tilemap Address and Size)
-		union {
-			struct {
-				uint8_t tilemapAddress: 6;
-				bool tilemapHorizontalMirroring: 1;
-				bool tilemapVerticalMirroring: 1;
-			};
-			uint8_t raw;
-		} bg4sc;
-		//! @brief BG12NBA Register (BG1 and 2 Chr Address)
-		union {
-			struct {
-				uint8_t baseAddressBg2a4: 4;
 				uint8_t baseAddressBg1a3: 4;
-			};
-			uint8_t raw;
-		} bg12nba;
-		//! @brief BG34NBA Register (BG3 and 4 Chr Address)
-		union {
-			struct {
 				uint8_t baseAddressBg2a4: 4;
-				uint8_t baseAddressBg1a3: 4;
 			};
 			uint8_t raw;
-		} bg34nba;
-		//! @brief BG1HOFS Register (BG1 Horizontal Scroll)
-		//! @brief BG1VOFS Register (BG1 Vertical Scroll)
+		} _bgnba[2];
+		//! @brief BGXXOFS Register (BG1/2/3/4 Horizontal and Vertical Scrolls)
 		union {
 			struct {
+				uint16_t offsetBg: 10;
 				uint8_t _ : 6;
-				uint32_t offsetBg: 10;
 			};
 			uint16_t raw;
-		} bg1ofs;
+		} _bgofs[8];
 		//! @brief M7HOFS Register (Mode 7 BG Horizontal Scroll)
 		//! @brief M7VOFS Register (Mode 7 BG Vertical Scroll)
 		union {
 			struct {
+				uint16_t offsetBg : 13;
 				uint8_t _ : 3;
-				uint32_t offsetBg : 13;
 			};
 			uint8_t raw;
-		} m7ofs;
-		//! @brief BG2HOFS Register (BG2 Horizontal Scroll)
-		//! @brief BG2VOFS Register (BG2 Vertical Scroll)
-		union {
-			struct {
-				uint8_t _ : 6;
-				uint32_t offsetBg: 10;
-			};
-			uint8_t raw;
-		} bg2ofs;
-		//! @brief BG3HOFS Register (BG3 Horizontal Scroll)
-		//! @brief BG3VOFS Register (BG3 Vertical Scroll)
-		union {
-			struct {
-				uint8_t _ : 6;
-				uint32_t offsetBg: 10;
-			};
-			uint8_t raw;
-		} bg3ofs;
-		//! @brief BG4HOFS Register (BG4 Horizontal Scroll)
-		//! @brief BG4VOFS Register (BG4 Vertical Scroll)
-		union {
-			struct {
-				uint8_t _ : 3;
-				uint32_t offsetBg: 10;
-			};
-			uint8_t raw;
-		} bg4ofs;
+		} _m7ofs[2];
 		//! @brief VMAIN Register (Video Port Control)
 		union {
 			struct {
-				bool address: 1;
-				uint8_t _ : 3;
+				uint8_t incrementAmount: 2;
 				uint8_t addressRemapping: 2;
-				uint8_t incrementCount: 2;
+				uint8_t _ : 3;
+				bool incrementMode: 1;
 			};
 			uint8_t raw;
-		} vmain;
+		} _vmain;
 		//! @brief VMADD Register (VRAM Address)
 		union {
 			struct {
-				uint8_t vmaddh;
 				uint8_t vmaddl;
+				uint8_t vmaddh;
 			};
-			uint32_t vmadd;
-		} vmadd;
+			uint16_t vmadd;
+		} _vmadd;
 		//! @brief VMDATA Register (VRAM Data Write)
 		union {
 			struct {
-				uint8_t vmdatah;
 				uint8_t vmdatal;
+				uint8_t vmdatah;
 			};
-			uint32_t vmdata;
-		} vmdata;
-		//! @brief M7SEL Register (Mode 7 Settings)
+			uint16_t vmdata;
+		} _vmdata;
+		//! @brief TODO M7SEL Register (Mode 7 Settings)
 		union {
 			struct {
-				bool playingFieldSize: 1;
-				bool emptySpaceFill: 1;
-				uint8_t _: 4;
 				bool horizontalMirroring: 1;
 				bool verticalMirroring: 1;
+				uint8_t _: 4;
+				bool emptySpaceFill: 1;
+				bool playingFieldSize: 1;
 			};
 			uint8_t raw;
-		} m7sel;
+		} _m7sel;
 		//! M7A M7B M7C M7D i didn't understand how they works so they will be added later.
+
+		// <to work>
+
 		//! @brief M7X Register (Mode 7 Center X)
-		union {
+		union { // Not sure if it is done correctly
 			struct {
 				uint8_t _: 3;
 				uint8_t value;
 			};
 			uint32_t center;
-		} m7x;
+		} _m7x;
 		//! @brief M7Y Register (Mode 7 Center Y)
-		union {
+		union { // Not sure if it is done correctly
 			struct {
 				uint8_t _: 3;
 				uint8_t value;
 			};
 			uint32_t center;
-		} m7y;
+		} _m7y;
 		//! @brief CGADD Register (CGRAM Address)
-		uint8_t cgadd;
+		uint8_t _cgadd;
 		//! @brief CGDATA Register (CGRAM Data write)
 		union {
 			struct {
-				bool _: 1;
-				uint8_t blue: 5;
-				uint8_t green: 5;
 				uint8_t red: 5;
+				uint8_t green: 5;
+				uint8_t blue: 5;
+				bool _: 1;
+			};
+			struct {
+				uint8_t cgdatal;
+				uint8_t cgdatah;
 			};
 			uint16_t raw;
-		} cgdata;
+		} _cgdata;
+		//! @brief This bool is used for writing either the low byte of the data (first call) or the high byte of the data (second call)
+		//! @info This bool is set to True when writing to $2121 (CGADD)
+		bool _isLowByte;
 		//! @brief W12SEL - W34SEL Registers (Window Mask Settings for BGs) and WOBJSEL Register (Window Mask Settings for OBJ and Color Window)
 		union {
 			struct {
@@ -245,70 +392,58 @@ namespace ComSquare::PPU
 				bool window1InversionForBg1Bg2Obj: 1;
 			};
 			uint8_t raw;
-		} wsel;
+		} _wsel[3];
 		//! @brief WH0 Register (CWindow 1 Left Position)
-		uint8_t wh0;
+		uint8_t _wh0;
 		//! @brief WH1 Register (CWindow 1 Right Position)
-		uint8_t wh1;
+		uint8_t _wh1;
 		//! @brief WH2 Register (CWindow 2 Left Position)
-		uint8_t wh2;
+		uint8_t _wh2;
 		//! @brief WH3 Register (CWindow 2 Right Position)
-		uint8_t wh3;
+		uint8_t _wh3;
 		//! @brief WBGLOG Register (Window mask logic for BGs)
 		union {
 			struct {
-				uint8_t maskLogicBg1: 2;
-				uint8_t maskLogicBg2: 2;
-				uint8_t maskLogicBg3: 2;
 				uint8_t maskLogicBg4: 2;
+				uint8_t maskLogicBg3: 2;
+				uint8_t maskLogicBg2: 2;
+				uint8_t maskLogicBg1: 2;
 			};
 			uint8_t raw;
-		} wbglog;
+		} _wbglog;
 		//! @brief WOBJLOG Register (Window mask logic for OBJs and Color Window)
 		union {
 			struct {
-				uint8_t _: 4;
 				uint8_t maskLogicObj: 2;
 				uint8_t maskLogicColor: 2;
+				uint8_t _: 4;
 			};
 			uint8_t raw;
-		} wobjlog;
-		//! @brief TM Register (Main Screen Designation)
+		} _wobjlog;
+		//! @brief TM - TS Registers (Main & Sub Screen Designation)
 		union {
 			struct {
-				uint8_t _: 3;
-				bool enableWindowDisplayObj: 1;
-				bool enableWindowDisplayBg4: 1;
-				bool enableWindowDisplayBg3: 1;
-				bool enableWindowDisplayBg2: 1;
 				bool enableWindowDisplayBg1: 1;
-			};
-			uint8_t raw;
-		} tm;
-		//! @brief TS Register (Sub Screen Designation)
-		union {
-			struct {
-				uint8_t _: 3;
-				bool enableWindowDisplayObj: 1;
-				bool enableWindowDisplayBg4: 1;
-				bool enableWindowDisplayBg3: 1;
 				bool enableWindowDisplayBg2: 1;
-				bool enableWindowDisplayBg1: 1;
+				bool enableWindowDisplayBg3: 1;
+				bool enableWindowDisplayBg4: 1;
+				bool enableWindowDisplayObj: 1;
+				uint8_t _: 3;
 			};
 			uint8_t raw;
-		} ts;
-		//! @brief TMW Register (Window Mask Designation for the Main Screen)
+		} _t[2];
+		//! @brief TMW - TSW Registers (Window Mask Designation for the Main/Sub Screen)
 		union {
 			struct {
-				uint8_t _: 3;
-				bool enableWindowMaskingObj: 1;
-				bool enableWindowMaskingBg4: 1;
-				bool enableWindowMaskingBg3: 1;
-				bool enableWindowMaskingBg2: 1;
 				bool enableWindowMaskingBg1: 1;
+				bool enableWindowMaskingBg2: 1;
+				bool enableWindowMaskingBg3: 1;
+				bool enableWindowMaskingBg4: 1;
+				bool enableWindowMaskingObj: 1;
+				uint8_t _: 3;
 			};
 			uint8_t raw;
-		} tmw;
+		} _tw[2];
 		//! @brief TSW Register (Window Mask Designation for the Sub Screen)
 		union {
 			struct {
@@ -320,55 +455,58 @@ namespace ComSquare::PPU
 				bool enableWindowMaskingBg1: 1;
 			};
 			uint8_t raw;
-		} tsw;
+		} _tsw;
 		//! @brief CGWSEL Register (Color Addition Select)
 		union {
 			struct {
-				uint8_t clipColorToBlackBeforeMath: 2;
-				uint8_t preventColorMath: 2;
-				uint8_t _: 2;
-				bool addSubscreen: 1;
 				bool directColorMode: 1;
+				bool addSubscreen: 1;
+				uint8_t _: 2;
+				uint8_t preventColorMath: 2;
+				uint8_t clipColorToBlackBeforeMath: 2;
 			};
 			uint8_t raw;
-		} cgwsel;
+		} _cgwsel;
 		//! @brief CGADSUB Register (Color Math designation)
 		union {
 			struct {
-				bool addSubtractSelect: 1;
-				bool halfColorMath: 1;
-				bool enableColorMathBackdrop: 1;
-				bool enableColorMathObj: 1;
-				bool enableColorMathBg4: 1;
-				bool enableColorMathBg3: 1;
-				bool enableColorMathBg2: 1;
 				bool enableColorMathBg1: 1;
+				bool enableColorMathBg2: 1;
+				bool enableColorMathBg3: 1;
+				bool enableColorMathBg4: 1;
+				bool enableColorMathObj: 1;
+				bool enableColorMathBackdrop: 1;
+				bool halfColorMath: 1;
+				bool addSubtractSelect: 1;
 			};
 			uint8_t raw;
-		} cgadsub;
+		} _cgadsub;
 		//! @brief COLDATA Register (Fixed Color Data)
 		union {
 			struct {
-				bool blue: 1;
-				bool green: 1;
-				bool red: 1;
 				uint8_t colorIntensity: 5;
+				bool red: 1;
+				bool green: 1;
+				bool blue: 1;
 			};
 			uint8_t raw;
-		} coldata;
+		} _coldata;
 		//! @brief SETINI Register (Screen Mode/Video Select)
 		union {
 			struct {
-				bool externalSync: 1;
-				bool mode7ExtBg: 1;
-				uint8_t _: 2;
-				bool enablePseudoHiresMode: 1;
-				bool overscanMode: 1;
-				bool objInterlace: 1;
 				bool screenInterlace: 1;
+				bool objInterlace: 1;
+				bool overscanMode: 1;
+				bool enablePseudoHiresMode: 1;
+				uint8_t _: 2;
+				bool mode7ExtBg: 1;
+				bool externalSync: 1;
 			};
 			uint8_t raw;
-		} setini;
+		} _setini;
+
+		// <READ registers> not in priority
+
 		//! @brief MPYL - MPYM - MPYH Registers (Multiplication Result)
 		union {
 			struct {
@@ -378,8 +516,11 @@ namespace ComSquare::PPU
 			};
 			uint32_t  mpy;
 		} mpy;
+		Renderer::IRenderer &_renderer;
+		std::shared_ptr<Memory::MemoryBus> _bus;
+		uint16_t *_vram;
 	public:
-		explicit PPU() = default;
+		PPU(const std::shared_ptr<Memory::MemoryBus> &bus, Renderer::IRenderer &renderer);
 		//! @brief Read data from the component.
 		//! @param addr The local address to read from (0x0 should refer to the first byte of this component).
 		//! @throw This function should thrown an InvalidAddress for address that are not mapped to the component.
@@ -393,6 +534,8 @@ namespace ComSquare::PPU
 		//! @brief Update the PPU of n cycles.
 		//! @param The number of cycles to update.
 		void update(unsigned cycles);
+		//! @brief Give the Vram Address with the right Address remapping
+		uint8_t getVramAddress();
 	};
 }
 #endif //COMSQUARE_PPU_HPP
diff --git a/sources/Ram/Ram.cpp b/sources/Ram/Ram.cpp
index ac1ad4a..350d0f9 100644
--- a/sources/Ram/Ram.cpp
+++ b/sources/Ram/Ram.cpp
@@ -2,6 +2,7 @@
 // Created by anonymus-raccoon on 1/28/20.
 //
 
+#include <cstring>
 #include "Ram.hpp"
 #include "../Exceptions/InvalidAddress.hpp"
 
@@ -31,4 +32,13 @@ namespace ComSquare::Ram
 			throw InvalidAddress("Ram write", addr);
 		this->_data[addr] = data;
 	}
+
+	void Ram::memset(uint24_t start, uint24_t end, uint8_t value)
+	{
+		if (end >= this->_size)
+			throw InvalidAddress("Ram memset end", end);
+		if (start >= end)
+			throw InvalidAddress("Ram memset start", start);
+		std::memset(&this->_data[start], value, sizeof(uint8_t) * (end - start));
+	}
 }
diff --git a/sources/Ram/Ram.hpp b/sources/Ram/Ram.hpp
index 1b15255..b2a7264 100644
--- a/sources/Ram/Ram.hpp
+++ b/sources/Ram/Ram.hpp
@@ -30,6 +30,12 @@ namespace ComSquare::Ram
 		//! @param data The data to write.
 		//! @throw InvalidAddress will be thrown if the address is more than the size of the ram.
 		void write_internal(uint24_t addr, uint8_t data) override;
+
+		//! @brief
+		//! @param start
+		//! @param end
+		//! @param value
+		void memset(uint24_t start, uint24_t end, uint8_t value);
 	};
 }
 
diff --git a/sources/SNES.cpp b/sources/SNES.cpp
index 87f52b2..20646a2 100644
--- a/sources/SNES.cpp
+++ b/sources/SNES.cpp
@@ -11,7 +11,7 @@ namespace ComSquare
 	SNES::SNES(const std::shared_ptr<Memory::MemoryBus> &bus, const std::string &romPath, Renderer::IRenderer &renderer) :
 		cartridge(new Cartridge::Cartridge(romPath)),
 		cpu(new CPU::CPU(bus, cartridge->header)),
-		ppu(new PPU::PPU()),
+		ppu(new PPU::PPU(bus, renderer)),
 		apu(new APU::APU()),
 		wram(new Ram::Ram(16384)),
 		sram(new Ram::Ram(this->cartridge->header.sramSize))
diff --git a/tests/APU/testAPU.cpp b/tests/APU/testAPU.cpp
index f38a192..4601db8 100644
--- a/tests/APU/testAPU.cpp
+++ b/tests/APU/testAPU.cpp
@@ -217,4 +217,29 @@ Test(update, stopped)
 	apu->_state = APU::Stopped;
 	apu->update(1);
 	cr_assert_eq(apu->_paddingCycles, 0);
+}
+
+//////////////////////////
+//						//
+// APU::_get*Addr tests	//
+//						//
+//////////////////////////
+
+Test(_get, direct)
+{
+	auto apu = Init().second.apu;
+
+	apu->_internalRegisters.pc = 0x32;
+	apu->_internalWrite(0x32, 123);
+	cr_assert_eq(apu->_getDirectAddr(), 123);
+}
+
+Test(_get, absolute)
+{
+	auto apu = Init().second.apu;
+
+	apu->_internalRegisters.pc = 0x32;
+	apu->_internalWrite(0x32, 0b00001111);
+	apu->_internalWrite(0x33, 0b11110000);
+	cr_assert_eq(apu->_getAbsoluteAddr(), 61455);
 }
\ No newline at end of file
diff --git a/tests/APU/testAPUInstructions.cpp b/tests/APU/testAPUInstructions.cpp
index 47ae211..0bf0445 100644
--- a/tests/APU/testAPUInstructions.cpp
+++ b/tests/APU/testAPUInstructions.cpp
@@ -3,6 +3,7 @@
 //
 
 #include <criterion/criterion.h>
+#include <iostream>
 #include "../tests.hpp"
 #include "../../sources/SNES.hpp"
 #include "../../sources/APU/APU.hpp"
@@ -130,4 +131,38 @@ Test(PSW, DI)
 	result = apu->DI();
 	cr_assert_eq(result, 3);
 	cr_assert_eq(apu->_internalRegisters.i, false);
+}
+
+///////////////
+//			 //
+// Bit tests //
+//			 //
+///////////////
+
+Test(Bit, SET1)
+{
+	auto apu = Init().second.apu;
+	int result = 0;
+
+	apu->_internalRegisters.pc = 0x32;
+	apu->_internalWrite(apu->_getDirectAddr(), 0b00000000);
+	apu->_internalRegisters.pc--;
+	result = apu->SET1(apu->_getDirectAddr(), 0);
+	apu->_internalRegisters.pc--;
+	cr_assert_eq(result, 4);
+	cr_assert_eq(apu->_internalRead(apu->_getDirectAddr()), 1);
+}
+
+Test(Bit, CLR1)
+{
+	auto apu = Init().second.apu;
+	int result = 0;
+
+	apu->_internalRegisters.pc = 0x32;
+	apu->_internalWrite(apu->_getDirectAddr(), 0b11111111);
+	apu->_internalRegisters.pc--;
+	result = apu->CLR1(apu->_getDirectAddr(), 0);
+	apu->_internalRegisters.pc--;
+	cr_assert_eq(result, 4);
+	cr_assert_eq(apu->_internalRead(apu->_getDirectAddr()), 0b11111110);
 }
\ No newline at end of file
diff --git a/tests/CPU/Math/testADC.cpp b/tests/CPU/Math/testADC.cpp
new file mode 100644
index 0000000..6cef599
--- /dev/null
+++ b/tests/CPU/Math/testADC.cpp
@@ -0,0 +1,112 @@
+//
+// Created by anonymus-raccoon on 2/11/20.
+//
+
+#include <criterion/criterion.h>
+#include <iostream>
+#include <bitset>
+#include "../../tests.hpp"
+#include "../../../sources/SNES.hpp"
+#include "../../../sources/Memory/MemoryBus.hpp"
+using namespace ComSquare;
+
+Test(ADC, addingOne)
+{
+	auto pair = Init();
+	pair.second.cpu->_isEmulationMode = false;
+	pair.second.cpu->_registers.a = 0;
+	pair.second.wram->_data[0] = 0x1;
+	pair.second.cpu->ADC(0x0);
+	cr_assert_eq(pair.second.cpu->_registers.a, 1, "The accumulator's value should be 0x1 but it was 0x%x.", pair.second.cpu->_registers.a);
+	cr_assert_eq(pair.second.cpu->_registers.p.c, false, "The carry flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.v, false, "The overflow flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.n, false, "The negative flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.z, false, "The zero flags should not be set.");
+}
+
+Test(ADC, addingOneEmulation)
+{
+	auto pair = Init();
+	pair.second.cpu->_isEmulationMode = true;
+	pair.second.cpu->_registers.a = 0;
+	pair.second.wram->_data[0] = 0x1;
+	pair.second.cpu->ADC(0x0);
+	cr_assert_eq(pair.second.cpu->_registers.a, 1, "The accumulator's value should be 0x1 but it was 0x%x.", pair.second.cpu->_registers.a);
+	cr_assert_eq(pair.second.cpu->_registers.p.c, false, "The carry flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.v, false, "The overflow flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.n, false, "The negative flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.z, false, "The zero flags should not be set.");
+}
+
+Test(ADC, overflow)
+{
+	auto pair = Init();
+	pair.second.cpu->_isEmulationMode = false;
+	pair.second.cpu->_registers.a = 0xFFFF;
+	pair.second.wram->_data[0] = 0x1;
+	pair.second.cpu->ADC(0x0);
+	cr_assert_eq(pair.second.cpu->_registers.a, 0, "The accumulator's value should be 0x0 but it was 0x%x.", pair.second.cpu->_registers.a);
+	cr_assert_eq(pair.second.cpu->_registers.p.c, true, "The carry flags should be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.v, false, "The overflow flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.n, false, "The negative flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.z, true, "The zero flags should be set.");
+}
+
+Test(ADC, overflowEmulation)
+{
+	auto pair = Init();
+	pair.second.cpu->_isEmulationMode = true;
+	pair.second.cpu->_registers.a = 0xFF;
+	pair.second.wram->_data[0] = 0x1;
+	pair.second.cpu->ADC(0x0);
+	cr_assert_eq(pair.second.cpu->_registers.a, 0, "The accumulator's value should be 0x0 but it was 0x%x.", pair.second.cpu->_registers.a);
+	cr_assert_eq(pair.second.cpu->_registers.p.c, true, "The carry flags should be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.v, false, "The overflow flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.n, false, "The negative flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.z, true, "The zero flags should be set.");
+}
+
+
+Test(ADC, signedOverflow)
+{
+	auto pair = Init();
+	pair.second.cpu->_isEmulationMode = false;
+	pair.second.cpu->_registers.a = 0x0FFF;
+	pair.second.wram->_data[0] = 0x1;
+	pair.second.cpu->ADC(0x0);
+	cr_assert_eq(pair.second.cpu->_registers.a, 0x1000, "The accumulator's value should be 0xF000 but it was 0x%x.", pair.second.cpu->_registers.a);
+	cr_assert_eq(pair.second.cpu->_registers.p.c, false, "The carry flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.v, true, "The overflow flags should be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.n, true, "The negative flags should be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.z, false, "The zero flags should not be set.");
+}
+
+Test(ADC, signedOverflowEmulated)
+{
+	auto pair = Init();
+	pair.second.cpu->_isEmulationMode = true;
+	pair.second.cpu->_registers.a = 0x000F;
+	pair.second.wram->_data[0] = 0x1;
+	pair.second.cpu->ADC(0x0);
+	cr_assert_eq(pair.second.cpu->_registers.a, 0x0010, "The accumulator's value should be 0xF000 but it was 0x%x.", pair.second.cpu->_registers.a);
+	cr_assert_eq(pair.second.cpu->_registers.p.c, false, "The carry flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.v, true, "The overflow flags should be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.n, true, "The negative flags should be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.z, false, "The zero flags should not be set.");
+}
+
+Test(ADC, memoryTwoBytes)
+{
+	auto pair = Init();
+	pair.second.cpu->_isEmulationMode = false;
+	pair.second.cpu->_registers.p.m = true;
+	pair.second.cpu->_registers.a = 0x000F;
+	pair.second.wram->_data[0] = 0x01;
+	pair.second.wram->_data[1] = 0x04;
+	pair.second.cpu->ADC(0x0);
+	cr_assert_eq(pair.second.cpu->_registers.a, 0x0410, "The accumulator's value should be 0x0410 but it was 0x%x.", pair.second.cpu->_registers.a);
+	cr_assert_eq(pair.second.cpu->_registers.p.c, false, "The carry flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.v, false, "The overflow flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.n, false, "The negative flags should not be set.");
+	cr_assert_eq(pair.second.cpu->_registers.p.z, false, "The zero flags should not be set.");
+}
\ No newline at end of file
diff --git a/tests/CPU/testAddressingMode.cpp b/tests/CPU/testAddressingMode.cpp
index a9c6326..3d09508 100644
--- a/tests/CPU/testAddressingMode.cpp
+++ b/tests/CPU/testAddressingMode.cpp
@@ -20,14 +20,27 @@ Test(AddrMode, Immediate)
 {
 	auto pair = Init();
 	pair.second.cpu->_registers.pac = 0x000015;
+	pair.second.cpu->_isEmulationMode = true;
+	pair.second.cpu->_registers.p.m = false;
 	cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x000015, "Got %x, Expected 0x000015");
 	cr_assert_eq(pair.second.cpu->_registers.pac, 0x000016);
 }
 
+Test(AddrMode, ImmediateMemoryFlag)
+{
+	auto pair = Init();
+	pair.second.cpu->_isEmulationMode = true;
+	pair.second.cpu->_registers.pac = 0x000015;
+	pair.second.cpu->_registers.p.m = true;
+	cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x000015, "Got %x, Expected 0x000015");
+	cr_assert_eq(pair.second.cpu->_registers.pac, 0x000017);
+}
+
 Test(AddrMode, ImmediateBankChange)
 {
 	auto pair = Init();
 	pair.second.cpu->_registers.pac = 0x00FFFF;
+	pair.second.cpu->_registers.p.m = false;
 	cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x00FFFF);
 	cr_assert_eq(pair.second.cpu->_registers.pac, 0x010000);
 }
diff --git a/tests/CPU/testCPU.cpp b/tests/CPU/testInterupts.cpp
similarity index 92%
rename from tests/CPU/testCPU.cpp
rename to tests/CPU/testInterupts.cpp
index 5191176..dd6339b 100644
--- a/tests/CPU/testCPU.cpp
+++ b/tests/CPU/testInterupts.cpp
@@ -16,7 +16,7 @@ Test(CPU_emulated, BRK)
 	pair.second.cartridge->header.emulationInterrupts.brk = 0x123u;
 	pair.second.cpu->_registers.p.d = true;
 	pair.second.cpu->_registers.pc = 0x156u;
-	cr_assert_eq(pair.second.cpu->BRK(), 7);
+	cr_assert_eq(pair.second.cpu->BRK(), 0);
 	cr_assert_eq(pair.second.cpu->_registers.pc, 0x123u);
 	cr_assert_eq(pair.second.cpu->_registers.p.i, 1, "pair.second.cpu->_registers.p.i mmust be equal to 1 but it was %d", pair.second.cpu->_registers.p.i);
 	cr_assert_eq(pair.second.cpu->_registers.p.d, false);
@@ -28,7 +28,7 @@ Test(CPU_native, BRK)
 	pair.second.cpu->_isEmulationMode = false;
 	pair.second.cartridge->header.nativeInterrupts.brk = 0x123u;
 	pair.second.cpu->_registers.pc = 0x156u;
-	cr_assert_eq(pair.second.cpu->BRK(), 8);
+	cr_assert_eq(pair.second.cpu->BRK(), 1);
 	cr_assert_eq(pair.second.cpu->_registers.pc, 0x123u);
 	cr_assert_eq(pair.second.cpu->_registers.p.i, true);
 	cr_assert_eq(pair.second.cpu->_registers.p.d, false);
diff --git a/tests/CPU/testStore.cpp b/tests/CPU/testStore.cpp
new file mode 100644
index 0000000..914ecfc
--- /dev/null
+++ b/tests/CPU/testStore.cpp
@@ -0,0 +1,20 @@
+//
+// Created by anonymus-raccoon on 2/12/20.
+//
+
+#include <criterion/criterion.h>
+#include <iostream>
+#include <bitset>
+#include "../tests.hpp"
+#include "../../sources/SNES.hpp"
+using namespace ComSquare;
+//
+//Test(STA, 8bits)
+//{
+//	auto pair = Init();
+//	pair.second.cpu->_registers.p.m = false;
+//	pair.second.cpu->_registers.a = 0x11;
+//	pair.second.cpu->STA(0x0);
+//	auto data = pair.second.wram->_data[0];
+//	cr_assert_eq(data, 0x11, "The stored value should be 0x11 but it was 0x%x.", data);
+//}
\ No newline at end of file
diff --git a/tests/PPU/testPpuWrite.cpp b/tests/PPU/testPpuWrite.cpp
new file mode 100644
index 0000000..27e3b00
--- /dev/null
+++ b/tests/PPU/testPpuWrite.cpp
@@ -0,0 +1,265 @@
+//
+// Created by cbihan on 2/10/20.
+//
+
+#include <criterion/criterion.h>
+#include <iostream>
+#include <bitset>
+#include "../tests.hpp"
+#include "../../sources/SNES.hpp"
+#include "../../sources/Memory/MemoryBus.hpp"
+#include "../../sources/PPU/PPU.hpp"
+using namespace ComSquare;
+
+Test(PPU_write, inidisp_data_full_ones)
+{
+	auto pair = Init();
+	pair.first->write(0x2100, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_inidisp.fblank, true);
+	cr_assert_eq(pair.second.ppu->_inidisp.brightness, 0xF);
+}
+
+Test(PPU_write, inidisp_data_full_zeros)
+{
+	auto pair = Init();
+	pair.first->write(0x2100, 0b00000000);
+	cr_assert_eq(pair.second.ppu->_inidisp.fblank, false);
+	cr_assert_eq(pair.second.ppu->_inidisp.brightness, 0x0);
+}
+
+Test(PPU_write, inidisp_data_fBlank_on_brghtness_off)
+{
+	auto pair = Init();
+	pair.first->write(0x2100, 0b10000000);
+	cr_assert_eq(pair.second.ppu->_inidisp.fblank, true);
+	cr_assert_eq(pair.second.ppu->_inidisp.brightness, 0x0);
+}
+
+Test(PPU_write, inidisp_data_fBlank_off_brghtness_max)
+{
+	auto pair = Init();
+	pair.first->write(0x2100, 0b00001111);
+	cr_assert_eq(pair.second.ppu->_inidisp.fblank, false);
+	cr_assert_eq(pair.second.ppu->_inidisp.brightness, 0xF);
+}
+
+Test(PPU_write, inidisp_data_fBlank_off_brghtness_half)
+{
+	auto pair = Init();
+	pair.first->write(0x2100, 0b00000101);
+	cr_assert_eq(pair.second.ppu->_inidisp.fblank, false);
+	cr_assert_eq(pair.second.ppu->_inidisp.brightness, 0x5);
+}
+
+Test(PPU_write, obsel_111_object_size_and_all_null)
+{
+	auto pair = Init();
+	pair.first->write(0x2101, 0b11100000);
+	cr_assert_eq(pair.second.ppu->_obsel.objectSize, 0b111);
+	cr_assert_eq(pair.second.ppu->_obsel.nameSelect, 0b00);
+	cr_assert_eq(pair.second.ppu->_obsel.baseSelect, 0b000);
+}
+
+Test(PPU_write, obsel_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2101, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_obsel.objectSize, 0b111);
+	cr_assert_eq(pair.second.ppu->_obsel.nameSelect, 0b11);
+	cr_assert_eq(pair.second.ppu->_obsel.baseSelect, 0b111);
+}
+
+Test(PPU_write, obsel_data_full_nameselect)
+{
+	auto pair = Init();
+	pair.first->write(0x2101, 0b00011000);
+	cr_assert_eq(pair.second.ppu->_obsel.objectSize, 0b000);
+	cr_assert_eq(pair.second.ppu->_obsel.nameSelect, 0b11);
+	cr_assert_eq(pair.second.ppu->_obsel.baseSelect, 0b000);
+}
+
+Test(PPU_write, obsel_data_full_baseselect)
+{
+	auto pair = Init();
+	pair.first->write(0x2101, 0b00000111);
+	cr_assert_eq(pair.second.ppu->_obsel.objectSize, 0b000);
+	cr_assert_eq(pair.second.ppu->_obsel.nameSelect, 0b00);
+	cr_assert_eq(pair.second.ppu->_obsel.baseSelect, 0b111);
+}
+
+Test(PPU_write, oamaddl_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2102, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_oamadd.oamAddress, 0b011111111);
+}
+
+Test(PPU_write, oamaddh_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2103, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_oamadd.objPriorityActivationBit, true);
+	cr_assert_eq(pair.second.ppu->_oamadd.oamAddress, 0b100000000);
+}
+
+Test(PPU_write, oamaddlh_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2102, 0b11111111);
+	pair.first->write(0x2103, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_oamadd.objPriorityActivationBit, true);
+	cr_assert_eq(pair.second.ppu->_oamadd.oamAddress, 0b111111111);
+}
+
+Test(PPU_write, oamaddlh_data_full_priorityBit_off)
+{
+	auto pair = Init();
+	pair.first->write(0x2102, 0b11111111);
+	pair.first->write(0x2103, 0b01111111);
+	cr_assert_eq(pair.second.ppu->_oamadd.objPriorityActivationBit, false);
+	cr_assert_eq(pair.second.ppu->_oamadd.oamAddress, 0b111111111);
+}
+
+Test(PPU_write, oamaddlh_oamAdress_11_priorityBit_on)
+{
+	auto pair = Init();
+	pair.first->write(0x2102, 0b00001011);
+	pair.first->write(0x2103, 0b10011100);
+	cr_assert_eq(pair.second.ppu->_oamadd.objPriorityActivationBit, true);
+	cr_assert_eq(pair.second.ppu->_oamadd.oamAddress, 11);
+}
+
+Test(PPU_write, bgmode_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2105, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_bgmode.bgMode, 7);
+	cr_assert_eq(pair.second.ppu->_bgmode.characterSizeBg1, true);
+	cr_assert_eq(pair.second.ppu->_bgmode.characterSizeBg2, true);
+	cr_assert_eq(pair.second.ppu->_bgmode.characterSizeBg3, true);
+	cr_assert_eq(pair.second.ppu->_bgmode.characterSizeBg4, true);
+	cr_assert_eq(pair.second.ppu->_bgmode.mode1Bg3PriorityBit, true);
+}
+
+Test(PPU_write, bgmode_bgmode_5_and_bg24_on)
+{
+	auto pair = Init();
+	pair.first->write(0x2105, 0b10100101);
+	cr_assert_eq(pair.second.ppu->_bgmode.bgMode, 5);
+	cr_assert_eq(pair.second.ppu->_bgmode.characterSizeBg1, false);
+	cr_assert_eq(pair.second.ppu->_bgmode.characterSizeBg2, true);
+	cr_assert_eq(pair.second.ppu->_bgmode.characterSizeBg3, false);
+	cr_assert_eq(pair.second.ppu->_bgmode.characterSizeBg4, true);
+	cr_assert_eq(pair.second.ppu->_bgmode.mode1Bg3PriorityBit, false);
+}
+
+Test(PPU_write, mosaic_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2106, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg1, true);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg2, true);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg3, true);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg4, true);
+	cr_assert_eq(pair.second.ppu->_mosaic.pixelSize, 0xF);
+}
+
+Test(PPU_write, mosaic_affectbg23_w_1x1_size)
+{
+	auto pair = Init();
+	pair.first->write(0x2106, 0b00000110);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg1, false);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg2, true);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg3, true);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg4, false);
+	cr_assert_eq(pair.second.ppu->_mosaic.pixelSize, 0x0);
+}
+
+Test(PPU_write, mosaic_affectbg14_w_2x2_size)
+{
+	auto pair = Init();
+	pair.first->write(0x2106, 0b00101001);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg1, true);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg2, false);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg3, false);
+	cr_assert_eq(pair.second.ppu->_mosaic.affectBg4, true);
+	cr_assert_eq(pair.second.ppu->_mosaic.pixelSize, 0x2);
+}
+
+Test(PPU_write, bg1sc_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2107, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_bgsc[0].tilemapAddress, 0b111111);
+	cr_assert_eq(pair.second.ppu->_bgsc[0].tilemapHorizontalMirroring, true);
+	cr_assert_eq(pair.second.ppu->_bgsc[0].tilemapVerticalMirroring, true);
+}
+
+Test(PPU_write, bg2sc_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2108, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_bgsc[1].tilemapAddress, 0b111111);
+	cr_assert_eq(pair.second.ppu->_bgsc[1].tilemapHorizontalMirroring, true);
+	cr_assert_eq(pair.second.ppu->_bgsc[1].tilemapVerticalMirroring, true);
+}
+
+Test(PPU_write, bg3sc_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2109, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_bgsc[2].tilemapAddress, 0b111111);
+	cr_assert_eq(pair.second.ppu->_bgsc[2].tilemapHorizontalMirroring, true);
+	cr_assert_eq(pair.second.ppu->_bgsc[2].tilemapVerticalMirroring, true);
+}
+
+Test(PPU_write, bg4sc_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x210A, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapAddress, 0b111111);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapHorizontalMirroring, true);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapVerticalMirroring, true);
+}
+
+Test(PPU_write, bg4sc_data_null)
+{
+	auto pair = Init();
+	pair.first->write(0x210A, 0b00000000);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapAddress, 0);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapHorizontalMirroring, false);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapVerticalMirroring, false);
+}
+
+Test(PPU_write, bg4sc_horizontal_off_vertical_on_random_tilemapAdress)
+{
+	auto pair = Init();
+	pair.first->write(0x210A, 0b11000110);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapAddress, 0b110001);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapHorizontalMirroring, false);
+	cr_assert_eq(pair.second.ppu->_bgsc[3].tilemapVerticalMirroring, true);
+}
+
+Test(PPU_write, bg12nba_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x210B, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_bgnba[0].baseAddressBg1a3, 0b1111);
+	cr_assert_eq(pair.second.ppu->_bgnba[0].baseAddressBg2a4, 0b1111);
+}
+
+Test(PPU_write, bg34nba_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x210C, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_bgnba[1].baseAddressBg1a3, 0b1111);
+	cr_assert_eq(pair.second.ppu->_bgnba[1].baseAddressBg2a4, 0b1111);
+}
+
+Test(PPU_write, bg12nba_data_random_data)
+{
+	auto pair = Init();
+	pair.first->write(0x210B, 0b10101010);
+	cr_assert_eq(pair.second.ppu->_bgnba[0].baseAddressBg1a3, 0b1010);
+	cr_assert_eq(pair.second.ppu->_bgnba[0].baseAddressBg2a4, 0b1010);
+}
\ No newline at end of file
diff --git a/tests/PPU/testPpuWriteFromVmain.cpp b/tests/PPU/testPpuWriteFromVmain.cpp
new file mode 100644
index 0000000..fe21962
--- /dev/null
+++ b/tests/PPU/testPpuWriteFromVmain.cpp
@@ -0,0 +1,272 @@
+//
+// Created by cbihan on 2/11/20.
+//
+
+#include <criterion/criterion.h>
+#include <iostream>
+#include <bitset>
+#include "../tests.hpp"
+#include "../../sources/SNES.hpp"
+#include "../../sources/Memory/MemoryBus.hpp"
+#include "../../sources/PPU/PPU.hpp"
+using namespace ComSquare;
+
+Test(PPU_write_2, vmain_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2115, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_vmain.incrementMode, true);
+	cr_assert_eq(pair.second.ppu->_vmain.addressRemapping, 0b11);
+	cr_assert_eq(pair.second.ppu->_vmain.incrementAmount, 0b11);
+}
+
+Test(PPU_write_2, vmain_incrementmode_off_false_else_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2115, 0b01111111);
+	cr_assert_eq(pair.second.ppu->_vmain.incrementMode, false);
+	cr_assert_eq(pair.second.ppu->_vmain.addressRemapping, 0b11);
+	cr_assert_eq(pair.second.ppu->_vmain.incrementAmount, 0b11);
+}
+
+Test(PPU_write_2, vmain_addressremaping_null_else_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2115, 0b11110011);
+	cr_assert_eq(pair.second.ppu->_vmain.incrementMode, true);
+	cr_assert_eq(pair.second.ppu->_vmain.addressRemapping, 0b00);
+	cr_assert_eq(pair.second.ppu->_vmain.incrementAmount, 0b11);
+}
+
+Test(PPU_write_2, vmain_incrementamount_null_else_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2115, 0b11111100);
+	cr_assert_eq(pair.second.ppu->_vmain.incrementMode, true);
+	cr_assert_eq(pair.second.ppu->_vmain.addressRemapping, 0b11);
+	cr_assert_eq(pair.second.ppu->_vmain.incrementAmount, 0b00);
+}
+
+Test(PPU_write_2, vmadd_full_data)
+{
+	auto pair = Init();
+	pair.first->write(0x2116, 0b11111111);
+	pair.first->write(0x2117, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_vmadd.vmadd, 0b1111111111111111);
+}
+
+Test(PPU_write_2, vmadd_full_high_byte_null)
+{
+	auto pair = Init();
+	pair.first->write(0x2116, 0b11111111);
+	pair.first->write(0x2117, 0b00000000);
+	cr_assert_eq(pair.second.ppu->_vmadd.vmadd, 0b0000000011111111);
+}
+
+Test(PPU_write_2, vmdata_full_data)
+{
+	auto pair = Init();
+	pair.first->write(0x2118, 0b11111111);
+	pair.first->write(0x2119, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_vmdata.vmdata, 0b1111111111111111);
+}
+
+Test(PPU_write_2, vmdata_full_high_byte_null)
+{
+	auto pair = Init();
+	pair.first->write(0x2118, 0b11111111);
+	pair.first->write(0x2119, 0b00000000);
+	cr_assert_eq(pair.second.ppu->_vmdata.vmdata, 0b0000000011111111);
+}
+
+Test(PPU_write_2, cgadd_full_high_byte_null)
+{
+	auto pair = Init();
+	pair.first->write(0x2121, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_cgadd, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_isLowByte, true);
+}
+
+Test(PPU_write_2, cgdata_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2121, 0x0);
+	pair.first->write(0x2122, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_cgdata.cgdatal, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_isLowByte, false);
+	int address = pair.second.ppu->_cgadd;
+	pair.first->write(0x2122, 0b11111000);
+	cr_assert_eq(pair.second.ppu->_cgdata.cgdatah, 0b11111000);
+	cr_assert_eq(pair.second.ppu->_isLowByte, true);
+	cr_assert_eq(pair.second.ppu->_cgadd, address + 1);
+}
+
+Test(PPU_write_2, m7sel_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x211A, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_m7sel.playingFieldSize, true);
+	cr_assert_eq(pair.second.ppu->_m7sel.emptySpaceFill, true);
+	cr_assert_eq(pair.second.ppu->_m7sel.horizontalMirroring, true);
+	cr_assert_eq(pair.second.ppu->_m7sel.verticalMirroring, true);
+}
+
+Test(PPU_write_2, m7sel_data_actual)
+{
+	auto pair = Init();
+	pair.first->write(0x211A, 0b01111101);
+	cr_assert_eq(pair.second.ppu->_m7sel.playingFieldSize, false);
+	cr_assert_eq(pair.second.ppu->_m7sel.emptySpaceFill, true);
+	cr_assert_eq(pair.second.ppu->_m7sel.horizontalMirroring, true);
+	cr_assert_eq(pair.second.ppu->_m7sel.verticalMirroring, false);
+}
+
+Test(PPU_write_2, w12sel_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2123, 0b11111111);
+	cr_assert_eq(pair.second.ppu->_wsel[0].window1InversionForBg1Bg2Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[0].enableWindow1ForBg1Bg2Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[0].window2InversionForBg1Bg3Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[0].enableWindow2ForBg1Bg3Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[0].window1InversionForBg2Bg4Color, true);
+	cr_assert_eq(pair.second.ppu->_wsel[0].enableWindow1ForBg2Bg4Color, true);
+	cr_assert_eq(pair.second.ppu->_wsel[0].window2InversionForBg2Bg4Color, true);
+	cr_assert_eq(pair.second.ppu->_wsel[0].enableWindow2ForBg2Bg4Color, true);
+}
+
+Test(PPU_write_2, w34sel_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2124, 0b10101010);
+	cr_assert_eq(pair.second.ppu->_wsel[1].window1InversionForBg1Bg2Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[1].enableWindow1ForBg1Bg2Obj, false);
+	cr_assert_eq(pair.second.ppu->_wsel[1].window2InversionForBg1Bg3Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[1].enableWindow2ForBg1Bg3Obj, false);
+	cr_assert_eq(pair.second.ppu->_wsel[1].window1InversionForBg2Bg4Color, true);
+	cr_assert_eq(pair.second.ppu->_wsel[1].enableWindow1ForBg2Bg4Color, false);
+	cr_assert_eq(pair.second.ppu->_wsel[1].window2InversionForBg2Bg4Color, true);
+	cr_assert_eq(pair.second.ppu->_wsel[1].enableWindow2ForBg2Bg4Color, false);
+}
+
+Test(PPU_write_2, wobjsel_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2125, 0b10110001);
+	cr_assert_eq(pair.second.ppu->_wsel[2].window1InversionForBg1Bg2Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[2].enableWindow1ForBg1Bg2Obj, false);
+	cr_assert_eq(pair.second.ppu->_wsel[2].window2InversionForBg1Bg3Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[2].enableWindow2ForBg1Bg3Obj, true);
+	cr_assert_eq(pair.second.ppu->_wsel[2].window1InversionForBg2Bg4Color, false);
+	cr_assert_eq(pair.second.ppu->_wsel[2].enableWindow1ForBg2Bg4Color, false);
+	cr_assert_eq(pair.second.ppu->_wsel[2].window2InversionForBg2Bg4Color, false);
+	cr_assert_eq(pair.second.ppu->_wsel[2].enableWindow2ForBg2Bg4Color, true);
+}
+
+Test(PPU_write_2, wbglog_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x212A, 0b10110001);
+	cr_assert_eq(pair.second.ppu->_wbglog.maskLogicBg1, 0b10);
+	cr_assert_eq(pair.second.ppu->_wbglog.maskLogicBg2, 0b11);
+	cr_assert_eq(pair.second.ppu->_wbglog.maskLogicBg3, 0b00);
+	cr_assert_eq(pair.second.ppu->_wbglog.maskLogicBg4, 0b01);
+}
+
+Test(PPU_write_2, wobjlog_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x212B, 0b10110001);
+	cr_assert_eq(pair.second.ppu->_wobjlog.maskLogicObj, 0b01);
+	cr_assert_eq(pair.second.ppu->_wobjlog.maskLogicColor, 0b00);
+}
+
+Test(PPU_write_2, tm_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x212C, 0b10110001);
+	cr_assert_eq(pair.second.ppu->_t[0].enableWindowDisplayBg1, true);
+	cr_assert_eq(pair.second.ppu->_t[0].enableWindowDisplayBg2, false);
+	cr_assert_eq(pair.second.ppu->_t[0].enableWindowDisplayBg3, false);
+	cr_assert_eq(pair.second.ppu->_t[0].enableWindowDisplayBg4, false);
+	cr_assert_eq(pair.second.ppu->_t[0].enableWindowDisplayObj, true);
+}
+
+Test(PPU_write_2, ts_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x212D, 0b10101110);
+	cr_assert_eq(pair.second.ppu->_t[1].enableWindowDisplayBg1, false);
+	cr_assert_eq(pair.second.ppu->_t[1].enableWindowDisplayBg2, true);
+	cr_assert_eq(pair.second.ppu->_t[1].enableWindowDisplayBg3, true);
+	cr_assert_eq(pair.second.ppu->_t[1].enableWindowDisplayBg4, true);
+	cr_assert_eq(pair.second.ppu->_t[1].enableWindowDisplayObj, false);
+}
+
+Test(PPU_write_2, tmw_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x212E, 0b10101110);
+	cr_assert_eq(pair.second.ppu->_tw[0].enableWindowMaskingBg1, false);
+	cr_assert_eq(pair.second.ppu->_tw[0].enableWindowMaskingBg2, true);
+	cr_assert_eq(pair.second.ppu->_tw[0].enableWindowMaskingBg3, true);
+	cr_assert_eq(pair.second.ppu->_tw[0].enableWindowMaskingBg4, true);
+	cr_assert_eq(pair.second.ppu->_tw[0].enableWindowMaskingObj, false);
+}
+
+Test(PPU_write_2, tsw_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x212F, 0b10100011);
+	cr_assert_eq(pair.second.ppu->_tw[1].enableWindowMaskingBg1, true);
+	cr_assert_eq(pair.second.ppu->_tw[1].enableWindowMaskingBg2, true);
+	cr_assert_eq(pair.second.ppu->_tw[1].enableWindowMaskingBg3, false);
+	cr_assert_eq(pair.second.ppu->_tw[1].enableWindowMaskingBg4, false);
+	cr_assert_eq(pair.second.ppu->_tw[1].enableWindowMaskingObj, false);
+}
+
+Test(PPU_write_2, cgwsel_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2130, 0b10111001);
+	cr_assert_eq(pair.second.ppu->_cgwsel.clipColorToBlackBeforeMath, 0b10);
+	cr_assert_eq(pair.second.ppu->_cgwsel.preventColorMath, 0b11);
+	cr_assert_eq(pair.second.ppu->_cgwsel.addSubscreen, false);
+	cr_assert_eq(pair.second.ppu->_cgwsel.directColorMode, true);
+}
+
+Test(PPU_write_2, cgadsub_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2131, 0b10111001);
+	cr_assert_eq(pair.second.ppu->_cgadsub.addSubtractSelect, true);
+	cr_assert_eq(pair.second.ppu->_cgadsub.halfColorMath, false);
+	cr_assert_eq(pair.second.ppu->_cgadsub.enableColorMathBackdrop, true);
+	cr_assert_eq(pair.second.ppu->_cgadsub.enableColorMathObj, true);
+	cr_assert_eq(pair.second.ppu->_cgadsub.enableColorMathBg4, true);
+	cr_assert_eq(pair.second.ppu->_cgadsub.enableColorMathBg3, false);
+	cr_assert_eq(pair.second.ppu->_cgadsub.enableColorMathBg2, false);
+	cr_assert_eq(pair.second.ppu->_cgadsub.enableColorMathBg1, true);
+}
+
+Test(PPU_write_2, coldata_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2132, 0b10111001);
+	cr_assert_eq(pair.second.ppu->_coldata.blue, true);
+	cr_assert_eq(pair.second.ppu->_coldata.green, false);
+	cr_assert_eq(pair.second.ppu->_coldata.red, true);
+	cr_assert_eq(pair.second.ppu->_coldata.colorIntensity, 0b11001);
+}
+
+Test(PPU_write_2, setini_data_full)
+{
+	auto pair = Init();
+	pair.first->write(0x2133, 0b10111001);
+	cr_assert_eq(pair.second.ppu->_setini.externalSync, true);
+	cr_assert_eq(pair.second.ppu->_setini.mode7ExtBg, false);
+	cr_assert_eq(pair.second.ppu->_setini.enablePseudoHiresMode, true);
+	cr_assert_eq(pair.second.ppu->_setini.overscanMode, false);
+	cr_assert_eq(pair.second.ppu->_setini.objInterlace, false);
+	cr_assert_eq(pair.second.ppu->_setini.screenInterlace, true);
+}
\ No newline at end of file
diff --git a/tests/testMemoryBus.cpp b/tests/testMemoryBus.cpp
index ed9488d..9b581cd 100644
--- a/tests/testMemoryBus.cpp
+++ b/tests/testMemoryBus.cpp
@@ -261,12 +261,31 @@ Test(BusAccessor, GetRomMirror3)
 	cr_assert_eq(accessor->_initial.get(), pair.second.cartridge.get());
 }
 
+Test(BusAccessor, Get0x0)
+{
+	auto pair = Init();
+	std::shared_ptr<Memory::RectangleShadow> accessor = nullptr;
+
+	accessor = std::static_pointer_cast<Memory::RectangleShadow>(pair.first->getAccessor(0x0));
+	cr_assert_eq(accessor->_initial.get(), pair.second.wram.get());
+}
+
 ///////////////////////////
 //						 //
 // MemoryBus::read tests //
 //						 //
 ///////////////////////////
 
+Test(BusRead, Read0x0)
+{
+	auto pair = Init();
+	uint8_t data;
+
+	pair.second.wram->_data[0] = 123;
+	data = pair.first->read(0x0);
+	cr_assert_eq(data, 123);
+}
+
 Test(BusRead, ReadOutside, .init = cr_redirect_stdout)
 {
 	auto pair = Init();
@@ -394,6 +413,19 @@ Test(BusRead, ReadWRAMMirror)
 //						  //
 ////////////////////////////
 
+Test(BusWrite, Write0x0)
+{
+	auto pair = Init();
+
+	try {
+		pair.first->write(0x0, 123);
+	} catch (std::exception &ex) {
+		std::cout << ex.what() << std::endl;
+	}
+	cr_assert_eq(pair.second.wram->_data[0], 123);
+}
+
+
 Test(BusWrite, WriteAPU)
 {
 	auto pair = Init();
@@ -407,7 +439,7 @@ Test(BusWrite, WritePPU)
 	auto pair = Init();
 
 	pair.first->write(0x002106, 123);
-	cr_assert_eq(pair.second.ppu->mosaic.raw, 123);
+	cr_assert_eq(pair.second.ppu->_mosaic.raw, 123);
 }
 
 Test(BusWrite, WriteCPU)