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Merge branch 'master' of https://github.com/AnonymusRaccoon/ComSquare into CPU

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AnonymusRaccoon
2020-02-10 14:35:26 +01:00
parent bd681c49a1 b27521a504
commit fd90957f21
1 changed files with 32 additions and 14 deletions
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tests/testMemoryBus.cpp
+32 -14
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@@ -13,6 +13,7 @@
#include "../sources/Memory/MemoryShadow.hpp"
#include "../sources/Memory/RectangleShadow.hpp"
#include "../sources/PPU/PPU.hpp"
#include "../sources/Exceptions/InvalidAction.hpp"
using namespace ComSquare;
@@ -340,24 +341,41 @@ Test(BusWrite, WriteAPU)
cr_assert_eq(pair.second.apu->_registers.port3, 123);
}
////////////////////////////////////
// //
// MemoryBus::mapComponents tests //
// //
////////////////////////////////////
Test(BusMapping, )
Test(BusWrite, WritePPU)
{
auto pair = Init();
pair.first.write(0x002106, 123);
cr_assert_eq(pair.second.ppu->mosaic.raw, 123);
}
////////////////////////////////////////
// //
// MemoryBus::_mirrorComponents tests //
// //
////////////////////////////////////////
Test(BusMirror, )
Test(BusWrite, WriteCPU)
{
auto pair = Init();
pair.first.write(0x00420D, 123);
cr_assert_eq(pair.second.cpu->_internalRegisters.memsel, 123);
}
Test(BusWrite, WriteROM)
{
auto pair = Init();
cr_assert_throw(pair.first.write(0x808005, 123), InvalidAction);
}
Test(BusWrite, WriteWRAM)
{
auto pair = Init();
pair.first.write(0x7E0002, 123);
cr_assert_eq(pair.second.wram->_data[2], 123);
}
Test(BusWrite, WriteSRAM)
{
auto pair = Init();
pair.first.write(0x700009, 123);
cr_assert_eq(pair.second.sram->_data[9], 123);
}