Commit Graph

23 Commits

Author SHA1 Message Date
Anonymus Raccoon
26ea447f24 Implementing the XBA 2020-04-08 17:13:00 +02:00
Anonymus Raccoon
a40bfd1c3c Implementing the EOR 2020-04-06 18:37:11 +02:00
Anonymus Raccoon
f675e45385 Implementing DEC 2020-04-06 18:05:00 +02:00
Anonymus Raccoon
5ded0b44e8 Implementing the INC 2020-04-06 17:59:25 +02:00
Anonymus Raccoon
724a2ca616 Implementing the AND 2020-04-06 17:29:06 +02:00
Anonymus Raccoon
055e7d29bd Cleaning up the CPX/CPY/INX/INY 2020-04-06 17:19:04 +02:00
Anonymus Raccoon
83b8c83e6e Implementing the CMP 2020-04-06 17:12:12 +02:00
Anonymus Raccoon
d73d570139 Implementing the ORA 2020-04-03 15:51:35 +02:00
Anonymus Raccoon
8e7d28dc4d Testing DEX & DEY 2020-04-03 15:24:47 +02:00
Anonymus Raccoon
9f8ae6cb08 Implementing DEX & DEY 2020-04-03 15:14:19 +02:00
Anonymus Raccoon
9be49e283d Solving timing issues 2020-03-28 20:47:13 +01:00
Anonymus Raccoon
bd948b520c Implementing an array of instructions with method's pointer for the CPU (it does not work well for now 2020-03-26 03:39:55 +01:00
Anonymus Raccoon
6c3c832539 Solving mistakes about the m flag 2020-02-28 00:37:17 +01:00
Anonymus Raccoon
4394c7625e Implementing a SBC without decimal mode 2020-02-27 23:37:52 +01:00
Anonymus Raccoon
a421ef693f Starting the SBC instruction 2020-02-25 23:32:19 +01:00
AnonymusRaccoon
f6466f63f0 Solving a bug with the ADC 2020-02-17 11:26:46 +01:00
AnonymusRaccoon
4d30a35620 Changing timing management 2020-02-13 13:55:01 +01:00
AnonymusRaccoon
8addb29610 Implementing instructions cycles 2020-02-11 17:39:06 +01:00
AnonymusRaccoon
bc808bd424 Handling the m flag 2020-02-11 16:30:06 +01:00
AnonymusRaccoon
b2a60efb4e Finishing the ADC 2020-02-11 15:53:37 +01:00
AnonymusRaccoon
d7002336fa Finishing the main and disabling the invalid opcode throw for now 2020-02-11 14:47:56 +01:00
AnonymusRaccoon
69f9528d20 Adding all the ADC in the instruction switch case 2020-02-11 14:26:39 +01:00
AnonymusRaccoon
bd681c49a1 Reworking the test for the CPU 2020-02-10 11:39:32 +01:00