Anonymus Raccoon
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26ea447f24
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Implementing the XBA
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2020-04-08 17:13:00 +02:00 |
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Anonymus Raccoon
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a40bfd1c3c
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Implementing the EOR
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2020-04-06 18:37:11 +02:00 |
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Anonymus Raccoon
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f675e45385
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Implementing DEC
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2020-04-06 18:05:00 +02:00 |
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Anonymus Raccoon
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5ded0b44e8
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Implementing the INC
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2020-04-06 17:59:25 +02:00 |
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Anonymus Raccoon
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724a2ca616
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Implementing the AND
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2020-04-06 17:29:06 +02:00 |
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Anonymus Raccoon
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055e7d29bd
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Cleaning up the CPX/CPY/INX/INY
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2020-04-06 17:19:04 +02:00 |
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Anonymus Raccoon
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83b8c83e6e
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Implementing the CMP
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2020-04-06 17:12:12 +02:00 |
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Anonymus Raccoon
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d73d570139
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Implementing the ORA
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2020-04-03 15:51:35 +02:00 |
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Anonymus Raccoon
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8e7d28dc4d
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Testing DEX & DEY
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2020-04-03 15:24:47 +02:00 |
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Anonymus Raccoon
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9f8ae6cb08
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Implementing DEX & DEY
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2020-04-03 15:14:19 +02:00 |
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Anonymus Raccoon
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9be49e283d
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Solving timing issues
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2020-03-28 20:47:13 +01:00 |
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Anonymus Raccoon
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bd948b520c
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Implementing an array of instructions with method's pointer for the CPU (it does not work well for now
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2020-03-26 03:39:55 +01:00 |
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Anonymus Raccoon
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6c3c832539
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Solving mistakes about the m flag
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2020-02-28 00:37:17 +01:00 |
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Anonymus Raccoon
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4394c7625e
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Implementing a SBC without decimal mode
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2020-02-27 23:37:52 +01:00 |
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Anonymus Raccoon
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a421ef693f
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Starting the SBC instruction
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2020-02-25 23:32:19 +01:00 |
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AnonymusRaccoon
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f6466f63f0
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Solving a bug with the ADC
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2020-02-17 11:26:46 +01:00 |
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AnonymusRaccoon
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4d30a35620
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Changing timing management
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2020-02-13 13:55:01 +01:00 |
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AnonymusRaccoon
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8addb29610
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Implementing instructions cycles
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2020-02-11 17:39:06 +01:00 |
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AnonymusRaccoon
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bc808bd424
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Handling the m flag
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2020-02-11 16:30:06 +01:00 |
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AnonymusRaccoon
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b2a60efb4e
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Finishing the ADC
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2020-02-11 15:53:37 +01:00 |
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AnonymusRaccoon
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d7002336fa
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Finishing the main and disabling the invalid opcode throw for now
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2020-02-11 14:47:56 +01:00 |
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AnonymusRaccoon
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69f9528d20
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Adding all the ADC in the instruction switch case
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2020-02-11 14:26:39 +01:00 |
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AnonymusRaccoon
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bd681c49a1
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Reworking the test for the CPU
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2020-02-10 11:39:32 +01:00 |
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