\hypertarget{testDMA_8cpp}{}\doxysection{tests/\+C\+P\+U/test\+D\+MA.cpp File Reference}
\label{testDMA_8cpp}\index{tests/CPU/testDMA.cpp@{tests/CPU/testDMA.cpp}}
{\ttfamily \#include $<$catch2/catch\+\_\+test\+\_\+macros.\+hpp$>$}\newline
{\ttfamily \#include $<$bitset$>$}\newline
{\ttfamily \#include \char`\"{}../tests.\+hpp\char`\"{}}\newline
Include dependency graph for test\+D\+M\+A.\+cpp\+:
\nopagebreak
\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=350pt]{testDMA_8cpp__incl}
\end{center}
\end{figure}
\doxysubsection*{Functions}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{testDMA_8cpp_a6e867cf27959721885a83987dab1acec}{T\+E\+S\+T\+\_\+\+C\+A\+SE}} (\char`\"{}Rom\+To\+V\+R\+AM D\+MA\char`\"{}, \char`\"{}\mbox{[}D\+MA\mbox{]}\char`\"{})
\item 
\mbox{\hyperlink{testDMA_8cpp_a92c415173f886f7caf90353f8c797e5f}{T\+E\+S\+T\+\_\+\+C\+A\+SE}} (\char`\"{}Vram\+Write D\+MA\char`\"{}, \char`\"{}\mbox{[}D\+MA\mbox{]}\char`\"{})
\item 
\mbox{\hyperlink{testDMA_8cpp_a916edcbb5cf469ba1057055597ebe1da}{T\+E\+S\+T\+\_\+\+C\+A\+SE}} (\char`\"{}Vram\+Write\+Inverted\+Order D\+MA\char`\"{}, \char`\"{}\mbox{[}D\+MA\mbox{]}\char`\"{})
\item 
\mbox{\hyperlink{testDMA_8cpp_a3b7bc4e9b00513d67823b32d98d7f0dd}{T\+E\+S\+T\+\_\+\+C\+A\+SE}} (\char`\"{}W\+Ram\+To\+V\+R\+AM D\+MA\char`\"{}, \char`\"{}\mbox{[}D\+MA\mbox{]}\char`\"{})
\end{DoxyCompactItemize}


\doxysubsection{Function Documentation}
\mbox{\Hypertarget{testDMA_8cpp_a6e867cf27959721885a83987dab1acec}\label{testDMA_8cpp_a6e867cf27959721885a83987dab1acec}} 
\index{testDMA.cpp@{testDMA.cpp}!TEST\_CASE@{TEST\_CASE}}
\index{TEST\_CASE@{TEST\_CASE}!testDMA.cpp@{testDMA.cpp}}
\doxysubsubsection{\texorpdfstring{TEST\_CASE()}{TEST\_CASE()}\hspace{0.1cm}{\footnotesize\ttfamily [1/4]}}
{\footnotesize\ttfamily T\+E\+S\+T\+\_\+\+C\+A\+SE (\begin{DoxyParamCaption}\item[{\char`\"{}Rom\+To\+V\+R\+AM D\+MA\char`\"{}}]{,  }\item[{\char`\"{}\char`\"{}}]{\mbox{[}\+D\+M\+A\mbox{]} }\end{DoxyParamCaption})}

\mbox{\Hypertarget{testDMA_8cpp_a92c415173f886f7caf90353f8c797e5f}\label{testDMA_8cpp_a92c415173f886f7caf90353f8c797e5f}} 
\index{testDMA.cpp@{testDMA.cpp}!TEST\_CASE@{TEST\_CASE}}
\index{TEST\_CASE@{TEST\_CASE}!testDMA.cpp@{testDMA.cpp}}
\doxysubsubsection{\texorpdfstring{TEST\_CASE()}{TEST\_CASE()}\hspace{0.1cm}{\footnotesize\ttfamily [2/4]}}
{\footnotesize\ttfamily T\+E\+S\+T\+\_\+\+C\+A\+SE (\begin{DoxyParamCaption}\item[{\char`\"{}Vram\+Write D\+MA\char`\"{}}]{,  }\item[{\char`\"{}\char`\"{}}]{\mbox{[}\+D\+M\+A\mbox{]} }\end{DoxyParamCaption})}

\mbox{\Hypertarget{testDMA_8cpp_a916edcbb5cf469ba1057055597ebe1da}\label{testDMA_8cpp_a916edcbb5cf469ba1057055597ebe1da}} 
\index{testDMA.cpp@{testDMA.cpp}!TEST\_CASE@{TEST\_CASE}}
\index{TEST\_CASE@{TEST\_CASE}!testDMA.cpp@{testDMA.cpp}}
\doxysubsubsection{\texorpdfstring{TEST\_CASE()}{TEST\_CASE()}\hspace{0.1cm}{\footnotesize\ttfamily [3/4]}}
{\footnotesize\ttfamily T\+E\+S\+T\+\_\+\+C\+A\+SE (\begin{DoxyParamCaption}\item[{\char`\"{}Vram\+Write\+Inverted\+Order D\+MA\char`\"{}}]{,  }\item[{\char`\"{}\char`\"{}}]{\mbox{[}\+D\+M\+A\mbox{]} }\end{DoxyParamCaption})}

\mbox{\Hypertarget{testDMA_8cpp_a3b7bc4e9b00513d67823b32d98d7f0dd}\label{testDMA_8cpp_a3b7bc4e9b00513d67823b32d98d7f0dd}} 
\index{testDMA.cpp@{testDMA.cpp}!TEST\_CASE@{TEST\_CASE}}
\index{TEST\_CASE@{TEST\_CASE}!testDMA.cpp@{testDMA.cpp}}
\doxysubsubsection{\texorpdfstring{TEST\_CASE()}{TEST\_CASE()}\hspace{0.1cm}{\footnotesize\ttfamily [4/4]}}
{\footnotesize\ttfamily T\+E\+S\+T\+\_\+\+C\+A\+SE (\begin{DoxyParamCaption}\item[{\char`\"{}W\+Ram\+To\+V\+R\+AM D\+MA\char`\"{}}]{,  }\item[{\char`\"{}\char`\"{}}]{\mbox{[}\+D\+M\+A\mbox{]} }\end{DoxyParamCaption})}