mirror of
https://github.com/zoriya/ComSquare.git
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AnonymusRaccoon
84 lines
6.6 KiB
TeX
84 lines
6.6 KiB
TeX
\hypertarget{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext}{}\doxysection{Com\+Square\+::Debugger\+::C\+PU\+::Disassembly\+Context Struct Reference}
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\label{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext}\index{ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}}
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Struct used to emulate the state of the processor during the disassembly since instructions take a different amount of space depending on some flags.
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{\ttfamily \#include $<$C\+P\+U\+Debug.\+hpp$>$}
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Collaboration diagram for Com\+Square\+::Debugger\+::C\+PU\+::Disassembly\+Context\+:
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\nopagebreak
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\begin{figure}[H]
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\begin{center}
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\leavevmode
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\includegraphics[width=230pt]{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext__coll__graph}
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\end{center}
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\end{figure}
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\doxysubsection*{Public Attributes}
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\begin{DoxyCompactItemize}
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\item
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bool \mbox{\hyperlink{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a2ac6c7c0ed2f1b95edfd7fe5c568dd36}{m\+Flag}} = true
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\begin{DoxyCompactList}\small\item\em The accumulator and \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} width flag (in native mode only) -\/ 0 = 16 bits mode, 1 = 8 bits mode. @info If this flag is set to false, instructions that have the Immediate\+ByA addressing mode take 1 more bit of space. \end{DoxyCompactList}\item
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bool \mbox{\hyperlink{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_aadb3c6dae4422bf77b8b056269eaff6f}{x\+Flag}} = true
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\begin{DoxyCompactList}\small\item\em The indeX register width flag (in native mode only) -\/ 0 = 16 bits mode, 1 = 8 bits mode OR the Break flag (in emulation mode only) @info If this flag is set to false, instructions that have the Immediate\+ByX addressing mode take 1 more bit of space. \end{DoxyCompactList}\item
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bool \mbox{\hyperlink{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a085931d94c666bf8c68d447ade90ba07}{is\+Emulation\+Mode}} = true
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\begin{DoxyCompactList}\small\item\em Is the \mbox{\hyperlink{namespaceComSquare_1_1Debugger_1_1CPU}{C\+PU}} emulating a 6502? If yes, some instructions don\textquotesingle{}t change flags the same way. \end{DoxyCompactList}\item
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\mbox{\hyperlink{namespaceComSquare_1_1Debugger_1_1CPU_a336499f4cb938a2886898457828f77e0}{Trust\+Level}} \mbox{\hyperlink{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a17af0b06c0a36b3a6c6ff8050546ced4}{level}} = \mbox{\hyperlink{namespaceComSquare_1_1Debugger_1_1CPU_a336499f4cb938a2886898457828f77e0ae54fbc88e1bb6c784dcc03988a621a40}{Safe}}
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\begin{DoxyCompactList}\small\item\em Sometimes, the flags can\textquotesingle{}t be tracked correctly after an instruction so the next instructions may not be correctly disassembled. \end{DoxyCompactList}\end{DoxyCompactItemize}
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\doxysubsection{Detailed Description}
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Struct used to emulate the state of the processor during the disassembly since instructions take a different amount of space depending on some flags.
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\doxysubsection{Member Data Documentation}
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\mbox{\Hypertarget{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a085931d94c666bf8c68d447ade90ba07}\label{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a085931d94c666bf8c68d447ade90ba07}}
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\index{ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}!isEmulationMode@{isEmulationMode}}
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\index{isEmulationMode@{isEmulationMode}!ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}}
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\doxysubsubsection{\texorpdfstring{isEmulationMode}{isEmulationMode}}
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{\footnotesize\ttfamily bool Com\+Square\+::\+Debugger\+::\+C\+P\+U\+::\+Disassembly\+Context\+::is\+Emulation\+Mode = true}
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Is the \mbox{\hyperlink{namespaceComSquare_1_1Debugger_1_1CPU}{C\+PU}} emulating a 6502? If yes, some instructions don\textquotesingle{}t change flags the same way.
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\mbox{\Hypertarget{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a17af0b06c0a36b3a6c6ff8050546ced4}\label{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a17af0b06c0a36b3a6c6ff8050546ced4}}
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\index{ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}!level@{level}}
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\index{level@{level}!ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}}
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\doxysubsubsection{\texorpdfstring{level}{level}}
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{\footnotesize\ttfamily \mbox{\hyperlink{namespaceComSquare_1_1Debugger_1_1CPU_a336499f4cb938a2886898457828f77e0}{Trust\+Level}} Com\+Square\+::\+Debugger\+::\+C\+P\+U\+::\+Disassembly\+Context\+::level = \mbox{\hyperlink{namespaceComSquare_1_1Debugger_1_1CPU_a336499f4cb938a2886898457828f77e0ae54fbc88e1bb6c784dcc03988a621a40}{Safe}}}
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Sometimes, the flags can\textquotesingle{}t be tracked correctly after an instruction so the next instructions may not be correctly disassembled.
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\mbox{\Hypertarget{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a2ac6c7c0ed2f1b95edfd7fe5c568dd36}\label{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_a2ac6c7c0ed2f1b95edfd7fe5c568dd36}}
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\index{ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}!mFlag@{mFlag}}
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\index{mFlag@{mFlag}!ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}}
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\doxysubsubsection{\texorpdfstring{mFlag}{mFlag}}
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{\footnotesize\ttfamily bool Com\+Square\+::\+Debugger\+::\+C\+P\+U\+::\+Disassembly\+Context\+::m\+Flag = true}
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The accumulator and \mbox{\hyperlink{namespaceComSquare_1_1Memory}{Memory}} width flag (in native mode only) -\/ 0 = 16 bits mode, 1 = 8 bits mode. @info If this flag is set to false, instructions that have the Immediate\+ByA addressing mode take 1 more bit of space.
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\mbox{\Hypertarget{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_aadb3c6dae4422bf77b8b056269eaff6f}\label{structComSquare_1_1Debugger_1_1CPU_1_1DisassemblyContext_aadb3c6dae4422bf77b8b056269eaff6f}}
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\index{ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}!xFlag@{xFlag}}
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\index{xFlag@{xFlag}!ComSquare::Debugger::CPU::DisassemblyContext@{ComSquare::Debugger::CPU::DisassemblyContext}}
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\doxysubsubsection{\texorpdfstring{xFlag}{xFlag}}
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{\footnotesize\ttfamily bool Com\+Square\+::\+Debugger\+::\+C\+P\+U\+::\+Disassembly\+Context\+::x\+Flag = true}
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The indeX register width flag (in native mode only) -\/ 0 = 16 bits mode, 1 = 8 bits mode OR the Break flag (in emulation mode only) @info If this flag is set to false, instructions that have the Immediate\+ByX addressing mode take 1 more bit of space.
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The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
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\item
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sources/\+Debugger/\+C\+P\+U/\mbox{\hyperlink{CPUDebug_8hpp}{C\+P\+U\+Debug.\+hpp}}\end{DoxyCompactItemize}
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