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https://github.com/zoriya/ComSquare.git
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595 lines
17 KiB
C++
595 lines
17 KiB
C++
//
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// Created by cbihan on 1/27/20.
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//
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#ifndef COMSQUARE_PPU_HPP
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#define COMSQUARE_PPU_HPP
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#include <stdint-gcc.h>
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#include "../Memory/AMemory.hpp"
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#include "../Memory/MemoryBus.hpp"
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#include "../Renderer/IRenderer.hpp"
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//#include "../Ram/ExtendedRam.hpp"
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#include "../Ram/Ram.hpp"
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//#define max2BitTiles 4096
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//#define max4BitTiles 2048
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//#define max8BitTiles 1024
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namespace ComSquare::PPU
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{
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enum ppuRegisters {
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//! @brief INIDISP Register (F-blank and Brightness)
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inidisp = 0x00,
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//! @brief OBSEL Register (Object Size and Character Address)
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obsel = 0x01,
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//! @brief OAMADDL (OAM Address low byte)
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oamaddl = 0x02,
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//! @brief OAMADDH (OAM Address high bit and Obj Priority)
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oamaddh = 0x03,
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//! @brief OAMDATA (Data for OAM write)
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oamdata = 0x04,
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//! @brief BGMODE (BG Mode and Character Size)
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bgmode = 0x05,
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//! @brief MOSAIC (Screen Pixelation)
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mosaic = 0x06,
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//! @brief BG1SC (BG1 Tilemap Address and Size)
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bg1sc = 0x07,
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//! @brief BG2SC (BG2 Tilemap Address and Size)
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bg2sc = 0x08,
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//! @brief BG3SC (BG3 Tilemap Address and Size)
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bg3sc = 0x09,
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//! @brief BG4SC (BG4 Tilemap Address and Size)
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bg4sc = 0x0A,
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//! @brief BG12NBA (BG1 and 2 Chr Address)
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bg12nba = 0x0B,
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//! @brief BG34NBA (BG3 and 4 Chr Address)
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bg34nba = 0x0C,
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//! @brief BG1HOFS (BG1 Horizontal Scroll)
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//! @brief M7HOFS (Mode 7 BG Horizontal Scroll)
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//! @info When bg mode is 7 the register is used as M7HOFS
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bg1hofs = 0x0D,
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//! @brief BG1VOFS (BG1 Vertical Scroll)
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//! @brief M7VOFS (Mode 7 BG Vertical Scroll)
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//! @info When bg mode is 7 the register is used as M7VOFS
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bg1vofs = 0x0E,
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//! @brief BG2HOFS (BG2 Horizontal Scroll)
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bg2hofs = 0x0F,
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//! @brief BG2VOFS (BG2 Vertical Scroll)
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bg2vofs = 0x10,
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//! @brief BG3HOFS (BG3 Horizontal Scroll)
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bg3hofs = 0x11,
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//! @brief BG3VOFS (BG3 Vertical Scroll)
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bg3vofs = 0x12,
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//! @brief BG4HOFS (BG4 Horizontal Scroll)
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bg4hofs = 0x13,
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//! @brief BG4VOFS (BG4 Vertical Scroll)
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bg4vofs = 0x14,
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//! @brief VMAIN (Video Port Control)
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vmain = 0x15,
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//! @brief VMADDL (VRAM Address low byte)
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vmaddl = 0x16,
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//! @brief VMADDH (VRAM Address high byte)
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vmaddh = 0x17,
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//! @brief VMDATAL (VRAM Data Write low byte)
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vmdatal = 0x18,
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//! @brief VMDATAH (VRAM Data Write high byte)
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vmdatah = 0x19,
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//! @brief M7SEL (Mode 7 Settings)
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m7sel = 0x1A,
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//! @brief M7A (Mode 7 Matrix A) also used with $2134/6
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m7a = 0x1B,
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//! @brief M7B (Mode 7 Matrix B) also used with $2134/6
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m7b = 0x1C,
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//! @brief M7C (Mode 7 Matrix C)
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m7c = 0x1D,
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//! @brief M7D (Mode 7 Matrix D)
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m7d = 0x1E,
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//! @brief M7X (Mode 7 Center X)
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m7x = 0x1F,
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//! @brief M7Y (Mode 7 Center Y)
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m7y = 0x20,
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//! @brief CGADD (CGRAM Address)
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cgadd = 0x21,
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//! @brief CGDATA (CGRAM Data write)
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cgdata = 0x22,
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//! @brief W12SEL (Window Mask Settings for BG1 and BG2)
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w12sel = 0x23,
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//! @brief W34SEL (Window Mask Settings for BG3 and BG4)
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w34sel = 0x24,
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//! @brief WOBJSEL (Window Mask Settings for OBJ and Color Window)
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wobjsel = 0x25,
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//! @brief WH0 (Window 1 Left Position)
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wh0 = 0x26,
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//! @brief WH1 (Window 1 Right Position)
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wh1 = 0x27,
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//! @brief WH2 (Window 2 Left Position)
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wh2 = 0x28,
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//! @brief WH3 (Window 2 Right Position)
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wh3 = 0x29,
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//! @brief WBGLOG (Window mask logic for BGs)
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wbjlog = 0x2A,
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//! @brief WOBJLOG (Window mask logic for OBJs and Color Window)
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wobjlog = 0x2B,
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//! @brief TM (Main Screen Designation)
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tm = 0x2C,
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//! @brief TS (Subscreen Designation)
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ts = 0x2D,
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//! @brief TMW (Window Mask Designation for the Main Screen)
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tmw = 0x2E,
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//! @brief TSW (Window Mask Designation for the Subscreen)
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tsw = 0x2F,
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//! @brief CGWSEL (Color Addition Select)
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cgwsel = 0x30,
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//! @brief CGADSUB (Color math designation)
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cgadsub = 0x31,
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//! @brief COLDATA (Fixed Color Data)
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coldata = 0x32,
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//! @brief SETINI (Screen Mode/Video Select)
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setini = 0x33,
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//! @brief MPYL (Multiplication Result low byte)
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mpyl = 0x34,
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//! @brief MPYM (Multiplication Result middle byte)
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mpym = 0x35,
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//! @brief MPYH (Multiplication Result high byte)
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mpyh = 0x36,
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//! @brief SLHV (Software Latch for H/V Counter)
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slhv = 0x37,
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//! @brief OAMDATAREAD (Data for OAM read)
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oamdataread = 0x38,
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//! @brief VMDATALREAD (VRAM Data Read low byte)
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vmdatalread = 0x39,
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//! @brief VMDATAHREAD (VRAM Data Read high byte)
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vmdatahread = 0x3A,
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//! @brief CGDATAREAD (CGRAM Data read)
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cgdataread = 0x3B,
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//! @brief OPHCT (Horizontal Scanline Location)
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ophct = 0x3C,
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//! @brief OPVCT (Vertical Scanline Location)
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opvct = 0x3D,
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//! @brief STAT77 (PPU Status Flag and Version)
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stat77 = 0x3E,
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//! @brief STAT78 (PPU Status Flag and Version)
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stat78 = 0x3F
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};
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struct Registers {
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//! @brief INIDISP Register (F-blank and Brightness)
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union {
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struct {
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//! @brief Store the brightness value (F = max, 0 = off)
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uint8_t brightness: 4;
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bool _: 3;
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//! @brief Store the FBlank status
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bool fblank: 1;
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};
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uint8_t raw = 0;
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} _inidisp;
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//! @brief OBSEL Register (Object Size and Character Address)
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union {
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struct {
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//! @brief Stores the location of the first sprite table
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uint8_t nameBaseSelect: 3;
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//! @brief Stores the offset of the second sprite table
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uint8_t nameSelect: 2;
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//! @brief Stores the resolution preset of the sprites
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uint8_t objectSize: 3;
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};
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uint8_t raw = 0;
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} _obsel;
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//! @brief OAMADD Register (OAM Address and Obj Priority)
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union {
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struct {
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//! @brief Stores the address to write with OAMDATA register
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uint32_t oamAddress: 9;
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uint8_t _: 6;
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//! @brief When Obj Priority activation bit is set, an Obj other than Sprite 0 may be given priority
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bool objPriorityActivationBit: 1;
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};
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struct {
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//! @brief Stores the data written on the OAMADDL register
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uint8_t oamaddl;
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//! @brief Stores the data written on the OAMADDH register
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uint8_t oamaddh;
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};
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uint32_t raw = 0;
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} _oamadd;
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//! @brief OAMDATA Register (Data for OAM write)
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uint8_t _oamdata;
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//! @brief BGMODE Register (OAM Address and Obj Priority)
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union {
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struct {
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//! @brief Stores the current BG Mode (0 - 7)
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uint8_t bgMode: 3;
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//! @brief When Mode 1 BG3 priority bit is set the BG3 is draw
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bool mode1Bg3PriorityBit: 1;
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//! @brief When The bit is set character size will 16x16 otherwise it is 8x8
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bool characterSizeBg1: 1;
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//! @brief When The bit is set character size will 16x16 otherwise it is 8x8
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bool characterSizeBg2: 1;
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//! @brief When The bit is set character size will 16x16 otherwise it is 8x8
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bool characterSizeBg3: 1;
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//! @brief When The bit is set character size will 16x16 otherwise it is 8x8
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bool characterSizeBg4: 1;
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};
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uint8_t raw = 0;
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} _bgmode;
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//! @brief MOSAIC Register (Screen Pixelation)
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union {
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struct {
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//! @brief Apply mosaic to the BG1
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bool affectBg1: 1;
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//! @brief Apply mosaic to the BG2
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bool affectBg2: 1;
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//! @brief Apply mosaic to the BG3
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bool affectBg3: 1;
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//! @brief Apply mosaic to the BG4
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bool affectBg4: 1;
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//! @brief Stores the pixel size (0 = 1x1, F = 16x16)
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uint8_t pixelSize: 4;
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};
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uint8_t raw = 0;
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} _mosaic;
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//! @brief BGSC Registers (BG Tilemap Address and Size)
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union {
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struct {
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//! @brief When tilemap horizontal mirroring bit is set the tilemap is mirrored horizontally
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bool tilemapHorizontalMirroring: 1;
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//! @brief When tilemap vertically mirroring bit is set the tilemap is mirrored vertically
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bool tilemapVerticalMirroring: 1;
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//! @brief Address of the tilemap Address (0, 0)
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uint8_t tilemapAddress: 6;
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};
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uint8_t raw = 0;
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} _bgsc[4];
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//! @brief BGNBA Registers (BG1/2/3/4 Chr Address)
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union {
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struct {
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//! @brief The address let us know where to search for BG1/3 characters
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uint8_t baseAddressBg1a3: 4;
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//! @brief The address let us know where to search for BG2/4 characters
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uint8_t baseAddressBg2a4: 4;
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};
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uint8_t raw = 0;
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} _bgnba[2];
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//! @brief BGXXOFS Register (BG1/2/3/4 Horizontal and Vertical Scrolls)
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union {
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struct {
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uint16_t offsetBg: 10;
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uint8_t _ : 6;
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};
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uint16_t raw;
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} _bgofs[8];
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//! @brief M7HOFS Register (Mode 7 BG Horizontal Scroll)
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//! @brief M7VOFS Register (Mode 7 BG Vertical Scroll)
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union {
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struct {
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uint16_t offsetBg : 13;
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uint8_t _ : 3;
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};
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uint8_t raw;
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} _m7ofs[2];
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//! @brief VMAIN Register (Video Port Control)
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union {
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struct {
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uint8_t incrementAmount: 2;
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uint8_t addressRemapping: 2;
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uint8_t _ : 3;
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bool incrementMode: 1;
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};
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uint8_t raw;
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} _vmain;
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//! @brief Store the real value of the increment Amount (1, 32, 128) instead of 0,1 or 2
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uint8_t _incrementAmount = 1;
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//! @brief VMADD Register (VRAM Address)
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union {
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struct {
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uint8_t vmaddl;
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uint8_t vmaddh;
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};
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uint16_t vmadd;
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} _vmadd;
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//! @brief VMDATA Register (VRAM Data Write)
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union {
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struct {
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uint8_t vmdatal;
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uint8_t vmdatah;
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};
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uint16_t vmdata;
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} _vmdata;
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//! @brief TODO M7SEL Register (Mode 7 Settings)
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union {
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struct {
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bool horizontalMirroring: 1;
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bool verticalMirroring: 1;
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uint8_t _: 4;
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bool emptySpaceFill: 1;
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bool playingFieldSize: 1;
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};
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uint8_t raw;
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} _m7sel;
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//! @brief M7A M7B M7C M7C registers, M7A and M7B are also used with ($2134/6) (multiplactions registers)
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union {
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struct {
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uint8_t m7l;
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uint8_t m7h;
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};
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uint16_t m7;
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} _m7[4];
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// <to work>
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//! @brief M7X Register (Mode 7 Center X)
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union { // Not sure if it is done correctly
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struct {
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uint8_t _: 3;
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uint8_t value;
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};
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uint32_t center;
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} _m7x;
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//! @brief M7Y Register (Mode 7 Center Y)
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union { // Not sure if it is done correctly
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struct {
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uint8_t _: 3;
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uint8_t value;
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};
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uint32_t center;
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} _m7y;
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//! @brief CGADD Register (CGRAM Address)
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uint8_t _cgadd;
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//! @brief CGDATA Register (CGRAM Data write)
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union {
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struct {
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uint8_t red: 5;
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uint8_t green: 5;
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uint8_t blue: 5;
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bool _: 1;
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};
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struct {
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uint8_t cgdatal;
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uint8_t cgdatah;
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};
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uint16_t raw;
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} _cgdata;
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//! @brief This bool is used for writing either the low byte of the data (first call) or the high byte of the data (second call)
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//! @info This bool is set to True when writing to $2121 (CGADD)
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bool _isLowByte;
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//! @brief W12SEL - W34SEL Registers (Window Mask Settings for BGs) and WOBJSEL Register (Window Mask Settings for OBJ and Color Window)
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union {
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struct {
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bool enableWindow2ForBg2Bg4Color: 1;
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bool window2InversionForBg2Bg4Color: 1;
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bool enableWindow1ForBg2Bg4Color: 1;
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bool window1InversionForBg2Bg4Color: 1;
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bool enableWindow2ForBg1Bg3Obj: 1;
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bool window2InversionForBg1Bg3Obj: 1;
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bool enableWindow1ForBg1Bg2Obj: 1;
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bool window1InversionForBg1Bg2Obj: 1;
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};
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uint8_t raw;
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} _wsel[3];
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//! @brief WH0 Register (Window 1 Left Position)
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uint8_t _wh0;
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//! @brief WH1 Register (Window 1 Right Position)
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uint8_t _wh1;
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//! @brief WH2 Register (Window 2 Left Position)
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uint8_t _wh2;
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//! @brief WH3 Register (Window 2 Right Position)
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uint8_t _wh3;
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//! @brief WBGLOG Register (Window mask logic for BGs)
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union {
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struct {
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uint8_t maskLogicBg4: 2;
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uint8_t maskLogicBg3: 2;
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uint8_t maskLogicBg2: 2;
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uint8_t maskLogicBg1: 2;
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};
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uint8_t raw;
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} _wbglog;
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//! @brief WOBJLOG Register (Window mask logic for OBJs and Color Window)
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union {
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struct {
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uint8_t maskLogicObj: 2;
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uint8_t maskLogicColor: 2;
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uint8_t _: 4;
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};
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uint8_t raw;
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} _wobjlog;
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//! @brief TM - TS Registers (Main & Sub Screen Designation)
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union {
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struct {
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bool enableWindowDisplayBg1: 1;
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bool enableWindowDisplayBg2: 1;
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bool enableWindowDisplayBg3: 1;
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bool enableWindowDisplayBg4: 1;
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bool enableWindowDisplayObj: 1;
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uint8_t _: 3;
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};
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uint8_t raw;
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} _t[2];
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//! @brief TMW - TSW Registers (Window Mask Designation for the Main/Sub Screen)
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union {
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struct {
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bool enableWindowMaskingBg1: 1;
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bool enableWindowMaskingBg2: 1;
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bool enableWindowMaskingBg3: 1;
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bool enableWindowMaskingBg4: 1;
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bool enableWindowMaskingObj: 1;
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uint8_t _: 3;
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};
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uint8_t raw;
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} _tw[2];
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//! @brief TSW Register (Window Mask Designation for the Sub Screen)
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union {
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struct {
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uint8_t _: 3;
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bool enableWindowMaskingObj: 1;
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bool enableWindowMaskingBg4: 1;
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bool enableWindowMaskingBg3: 1;
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bool enableWindowMaskingBg2: 1;
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bool enableWindowMaskingBg1: 1;
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};
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uint8_t raw;
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} _tsw;
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//! @brief CGWSEL Register (Color Addition Select)
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union {
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struct {
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bool directColorMode: 1;
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bool addSubscreen: 1;
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uint8_t _: 2;
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uint8_t preventColorMath: 2;
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uint8_t clipColorToBlackBeforeMath: 2;
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};
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uint8_t raw;
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} _cgwsel;
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//! @brief CGADSUB Register (Color Math designation)
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union {
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struct {
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bool enableColorMathBg1: 1;
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bool enableColorMathBg2: 1;
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bool enableColorMathBg3: 1;
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bool enableColorMathBg4: 1;
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bool enableColorMathObj: 1;
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bool enableColorMathBackdrop: 1;
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bool halfColorMath: 1;
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bool addSubtractSelect: 1;
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};
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uint8_t raw;
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} _cgadsub;
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//! @brief COLDATA Register (Fixed Color Data)
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union {
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struct {
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uint8_t colorIntensity: 5;
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bool red: 1;
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bool green: 1;
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bool blue: 1;
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};
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uint8_t raw;
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} _coldata;
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//! @brief SETINI Register (Screen Mode/Video Select)
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union {
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struct {
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bool screenInterlace: 1;
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bool objInterlace: 1;
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bool overscanMode: 1;
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bool enablePseudoHiresMode: 1;
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uint8_t _: 2;
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bool mode7ExtBg: 1;
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bool externalSync: 1;
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};
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uint8_t raw;
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} _setini;
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// <READ registers>
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//! @brief MPYL - MPYM - MPYH Registers (Multiplication Result)
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union {
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struct {
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uint8_t mpyl;
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uint8_t mpym;
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uint8_t mpyh;
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|
};
|
|
uint32_t mpy;
|
|
} _mpy;
|
|
//! @brief SLHV - Software Latch for H/V Counter
|
|
uint8_t _slhv;
|
|
//! @brief OAMDATAREAD - Data for OAM read
|
|
uint8_t _oamdataread;
|
|
//! @brief VMDATALREAD/VMDATAHREAD - VRAM Data Read low/high byte
|
|
union {
|
|
struct {
|
|
uint8_t vmDataLRead;
|
|
uint8_t vmDataHRead;
|
|
};
|
|
uint16_t raw;
|
|
} _vmdataread;
|
|
//! @brief CGRAM Data read
|
|
union {
|
|
struct {
|
|
uint8_t cgDataLRead;
|
|
uint8_t cgDataHRead;
|
|
};
|
|
uint16_t raw;
|
|
} _cgdataread;
|
|
//! @brief OPHCT/OPVCT - Horizontal/Vertical Scanline Location
|
|
union {
|
|
struct {
|
|
uint16_t opct: 9;
|
|
uint8_t _: 7;
|
|
};
|
|
uint16_t raw;
|
|
} _opct;
|
|
//! @brief STAT77 - PPU Status Flag and Version
|
|
union {
|
|
struct {
|
|
uint8_t chipVersionNumber: 4;
|
|
bool _: 1;
|
|
bool modeSelect: 1;
|
|
bool rangeOverFlag: 1;
|
|
bool timeOverFlag: 1;
|
|
};
|
|
uint8_t raw;
|
|
} _stat77;
|
|
//! @brief STAT78 - PPU Status Flag and Version
|
|
union {
|
|
struct {
|
|
uint8_t chipVersionNumber: 4;
|
|
bool mode: 1;
|
|
bool _: 1;
|
|
bool externalLatchFlag: 1;
|
|
bool interlaceField: 1;
|
|
};
|
|
uint8_t raw;
|
|
} _stat78;
|
|
};
|
|
|
|
//! @brief The class containing all the registers of the PPU
|
|
class PPU : public Memory::AMemory {
|
|
private:
|
|
//! @brief Init ppuRegisters
|
|
Registers _registers{};
|
|
Renderer::IRenderer &_renderer;
|
|
public:
|
|
std::shared_ptr<Ram::Ram> vram;
|
|
std::shared_ptr<Ram::Ram> oamram;
|
|
std::shared_ptr<Ram::Ram> cgram;
|
|
|
|
explicit PPU(Renderer::IRenderer &renderer);
|
|
PPU(const PPU &) = delete;
|
|
PPU &operator=(const PPU &) = delete;
|
|
~PPU() override = default;
|
|
|
|
//! @brief Read data from the component.
|
|
//! @param addr The local address to read from (0x0 should refer to the first byte of this component).
|
|
//! @throw This function should thrown an InvalidAddress for address that are not mapped to the component.
|
|
//! @return Return the data at the address given as parameter.
|
|
uint8_t read(uint24_t addr) override;
|
|
//! @brief Write data to this component.
|
|
//! @param addr The local address to write data (0x0 should refer to the first byte of this component).
|
|
//! @param data The new data to write.
|
|
//! @throw This function should thrown an InvalidAddress for address that are not mapped to the component.
|
|
void write(uint24_t addr, uint8_t data) override;
|
|
//! @brief Get the name of this accessor (used for debug purpose)
|
|
std::string getName() override;
|
|
//! @brief Get the component of this accessor (used for debug purpose)
|
|
Component getComponent() override;
|
|
|
|
//! @brief Update the PPU of n cycles.
|
|
//! @param The number of cycles to update.
|
|
virtual void update(unsigned cycles);
|
|
//! @brief Give the Vram Address with the right Address remapping
|
|
uint16_t getVramAddress();
|
|
//! @brief Give the name of the Address register (used for debug)
|
|
std::string getValueName(uint24_t addr);
|
|
//! @brief Return true if the CPU is overloaded with debugging features.
|
|
virtual bool isDebugger();
|
|
//! @brief Allow others components to read the CGRAM (Debuggers)
|
|
uint16_t cgramRead(uint16_t addr);
|
|
//! @brief Render a background on the screen
|
|
void renderBackground(int bgNumber, std::vector<int> characterSize, int bpp, bool priority);
|
|
};
|
|
}
|
|
#endif //COMSQUARE_PPU_HPP
|