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added documentation on the ppu's register

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This commit is contained in:
Clément Le Bihan
2020-02-11 23:54:43 +01:00
parent 227f62769c
commit 49b5401135
5 changed files with 106 additions and 9 deletions
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CMakeLists.txt
+1
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@@ -56,6 +56,7 @@ add_executable(unit_tests
tests/CPU/testAddressingMode.cpp
tests/tests.cpp
tests/PPU/testPpuWrite.cpp
tests/PPU/testPpuWriteFromVmain.cpp
)
# include criterion & coverage
sources/PPU/PPU.cpp
+25
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@@ -58,11 +58,25 @@ namespace ComSquare::PPU
this->_bgnba[addr - 0x0B].raw = data;
break;
case ppuRegisters::bg1hofs:
// Work in progress ! Non functional !
this->_bgofs[0].raw = data;
break;
case ppuRegisters::vmain:
this->_vmain.raw = data;
break;
case ppuRegisters::vmaddl:
this->_vmadd.vmaddl = data;
break;
case ppuRegisters::vmaddh:
this->_vmadd.vmaddh = data;
break;
//! @info should must be in vblank for the write (and write it to the screen )? and increment vram address after;
case ppuRegisters::vmdatal:
this->_vmdata.vmdatal = data;
break;
case ppuRegisters::vmdatah:
this->_vmdata.vmdatah = data;
break;
//TODO adding the rest of the registers. oaf !
default:
throw InvalidAddress("PPU Internal Registers write", addr);
@@ -72,5 +86,16 @@ namespace ComSquare::PPU
void PPU::update(unsigned cycles)
{
(void)cycles;
uint32_t pixelTmp = 0xFFFFFF00;
pixelTmp |= this->_inidisp.brightness;
if (!this->_inidisp.fblank)
this->_renderer.putPixel(0, 0,pixelTmp);
this->_renderer.drawScreen();
}
PPU::PPU(const std::shared_ptr<Memory::MemoryBus> &bus, Renderer::IRenderer &renderer):
_bus(std::move(bus)),
_renderer(renderer)
{
}
}
sources/PPU/PPU.hpp
+47 -8
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@@ -7,6 +7,8 @@
#include <stdint-gcc.h>
#include "../Memory/IMemory.hpp"
#include "../Memory/MemoryBus.hpp"
#include "../Renderer/IRenderer.hpp"
//#define max2BitTiles 4096
//#define max4BitTiles 2048
@@ -44,40 +46,75 @@ namespace ComSquare::PPU
bg12nba = 0x0B,
//! @brief BG34NBA (BG3 and 4 Chr Address)
bg34nba = 0x0C,
//! @brief BG1HOFS (BG1 Horizontal Scroll)
//! @brief M7HOFS (Mode 7 BG Horizontal Scroll)
//! @info When bg mode is 7 the register is used as M7HOFS
bg1hofs = 0x0D,
//! @brief BG1VOFS (BG1 Vertical Scroll)
//! @brief M7VOFS (Mode 7 BG Vertical Scroll)
//! @info When bg mode is 7 the register is used as M7VOFS
bg1vofs = 0x0E,
//! @brief BG2HOFS (BG2 Horizontal Scroll)
bg2hofs = 0x0F,
//! @brief BG2VOFS (BG2 Vertical Scroll)
bg2vofs = 0x10,
//! @brief BG3HOFS (BG3 Horizontal Scroll)
bg3hofs = 0x11,
//! @brief BG3VOFS (BG3 Vertical Scroll)
bg3vofs = 0x12,
//! @brief BG4HOFS (BG4 Horizontal Scroll)
bg4hofs = 0x13,
//! @brief BG4VOFS (BG4 Vertical Scroll)
bg4vofs = 0x14,
//! @brief VMAIN (Video Port Control)
vmain = 0x15,
//! @brief VMADDL (VRAM Address low byte)
vmaddl = 0x16,
vamddh = 0x17,
//! @brief VMADDH (VRAM Address high byte)
vmaddh = 0x17,
//! @brief VMDATAL (VRAM Data Write low byte)
vmdatal = 0x18,
//! @brief VMDATAH (VRAM Data Write high byte)
vmdatah = 0x19,
//! @brief M7SEL (Mode 7 Settings)
m7sel = 0x1A,
//! @brief M7A (Mode 7 Matrix A) also used with $2134/6
m7a = 0x1B,
//! @brief M7B (Mode 7 Matrix B) also used with $2134/6
m7b = 0x1C,
//! @brief M7C (Mode 7 Matrix C)
m7c = 0x1D,
//! @brief M7D (Mode 7 Matrix D)
m7d = 0x1E,
//! @brief M7X (Mode 7 Center X)
m7x = 0x1F,
//! @brief M7Y (Mode 7 Center Y)
m7y = 0x20,
//! @brief CGADD (CGRAM Address)
cgadd = 0x21,
//! @brief CGDATA (CGRAM Data write)
cgdata = 0x22,
//! @brief W12SEL (Window Mask Settings for BG1 and BG2)
w12sel = 0x23,
//! @brief W34SEL (Window Mask Settings for BG3 and BG4)
w34sel = 0x24,
//! @brief WOBJSEL (Window Mask Settings for OBJ and Color Window)
wobjsel = 0x25,
//! @brief WH0 (Window 1 Left Position)
wh0 = 0x26,
//! @brief WH1 (Window 1 Right Position)
wh1 = 0x27,
//! @brief WH2 (Window 2 Left Position)
wh2 = 0x28,
//! @brief WH3 (Window 2 Right Position)
wh3 = 0x29,
//! @brief WBGLOG (Window mask logic for BGs)
wbjlog = 0x2A,
//! @brief WOBJLOG (Window mask logic for OBJs and Color Window)
wobjlog = 0x2B,
//! @brief TM (Main Screen Designation)
tm = 0x2C,
//! @brief TS (Subscreen Designation)
ts = 0x2D,
//! @brief TMW (Window Mask Designation for the Main Screen)
tmw = 0x2E,
@@ -267,7 +304,7 @@ namespace ComSquare::PPU
};
uint8_t raw;
} _m7ofs;
//! @brief BG2HOFS Register (BG2 Horizontal Scroll)
/* //! @brief BG2HOFS Register (BG2 Horizontal Scroll)
//! @brief BG2VOFS Register (BG2 Vertical Scroll)
union {
struct {
@@ -293,7 +330,7 @@ namespace ComSquare::PPU
uint32_t offsetBg: 10;
};
uint8_t raw;
} _bg4ofs;
} _bg4ofs;*/
// <check>
@@ -310,18 +347,18 @@ namespace ComSquare::PPU
//! @brief VMADD Register (VRAM Address)
union {
struct {
uint8_t vmaddh;
uint8_t vmaddl;
uint8_t vmaddh;
};
uint32_t vmadd;
uint16_t vmadd;
} _vmadd;
//! @brief VMDATA Register (VRAM Data Write)
union {
struct {
uint8_t vmdatah;
uint8_t vmdatal;
uint8_t vmdatah;
};
uint32_t vmdata;
uint16_t vmdata;
} _vmdata;
//! @brief M7SEL Register (Mode 7 Settings)
union {
@@ -509,8 +546,10 @@ namespace ComSquare::PPU
};
uint32_t mpy;
} mpy;
Renderer::IRenderer &_renderer;
std::shared_ptr<Memory::MemoryBus> _bus;
public:
explicit PPU() = default;
PPU(const std::shared_ptr<Memory::MemoryBus> &bus, Renderer::IRenderer &renderer);
//! @brief Read data from the component.
//! @param addr The local address to read from (0x0 should refer to the first byte of this component).
//! @throw This function should thrown an InvalidAddress for address that are not mapped to the component.
sources/SNES.cpp
+1 -1
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@@ -11,7 +11,7 @@ namespace ComSquare
SNES::SNES(const std::shared_ptr<Memory::MemoryBus> &bus, const std::string &romPath, Renderer::IRenderer &renderer) :
cartridge(new Cartridge::Cartridge(romPath)),
cpu(new CPU::CPU(bus, cartridge->header)),
ppu(new PPU::PPU()),
ppu(new PPU::PPU(renderer, bus)),
apu(new APU::APU()),
wram(new Ram::Ram(16384)),
sram(new Ram::Ram(this->cartridge->header.sramSize))
tests/PPU/testPpuWriteFromVmain.cpp
+32
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@@ -45,4 +45,36 @@ Test(PPU_write_2, vmain_incrementamount_null_else_full)
cr_assert_eq(pair.second.ppu->_vmain.incrementMode, true);
cr_assert_eq(pair.second.ppu->_vmain.addressRemapping, 0b11);
cr_assert_eq(pair.second.ppu->_vmain.incrementAmount, 0b00);
}
Test(PPU_write_2, vmadd_full_data)
{
auto pair = Init();
pair.first->write(0x2116, 0b11111111);
pair.first->write(0x2117, 0b11111111);
cr_assert_eq(pair.second.ppu->_vmadd.vmadd, 0b1111111111111111);
}
Test(PPU_write_2, vmadd_full_high_byte_null)
{
auto pair = Init();
pair.first->write(0x2116, 0b11111111);
pair.first->write(0x2117, 0b00000000);
cr_assert_eq(pair.second.ppu->_vmadd.vmadd, 0b0000000011111111);
}
Test(PPU_write_2, vmdata_full_data)
{
auto pair = Init();
pair.first->write(0x2118, 0b11111111);
pair.first->write(0x2119, 0b11111111);
cr_assert_eq(pair.second.ppu->_vmdata.vmdata, 0b1111111111111111);
}
Test(PPU_write_2, vmdata_full_high_byte_null)
{
auto pair = Init();
pair.first->write(0x2118, 0b11111111);
pair.first->write(0x2119, 0b00000000);
cr_assert_eq(pair.second.ppu->_vmdata.vmdata, 0b0000000011111111);
}