Adding the STZ

This commit is contained in:
AnonymusRaccoon
2020-02-13 14:47:55 +01:00
parent 997bb4fa7c
commit 8cc87d0be2
4 changed files with 84 additions and 4 deletions
+41
View File
@@ -47,4 +47,45 @@ Test(STX, 16bits)
pair.second.cpu->STX(0x0);
auto data = pair.second.wram->_data[0] + (pair.second.wram->_data[1] << 8u);
cr_assert_eq(data, 0x11AB, "The stored value should be 0x11AB but it was 0x%x.", data);
}
Test(STY, 8bits)
{
auto pair = Init();
pair.second.cpu->_registers.p.x_b = true;
pair.second.cpu->_registers.y = 0x11;
pair.second.cpu->STY(0x0);
auto data = pair.second.wram->_data[0];
cr_assert_eq(data, 0x11, "The stored value should be 0x11 but it was 0x%x.", data);
}
Test(STY, 16bits)
{
auto pair = Init();
pair.second.cpu->_registers.p.x_b = false;
pair.second.cpu->_registers.y = 0x11AB;
pair.second.cpu->STY(0x0);
auto data = pair.second.wram->_data[0] + (pair.second.wram->_data[1] << 8u);
cr_assert_eq(data, 0x11AB, "The stored value should be 0x11AB but it was 0x%x.", data);
}
Test(STZ, 8bits)
{
auto pair = Init();
pair.second.cpu->_registers.p.m = true;
pair.second.wram->_data[0] = 0x11;
pair.second.cpu->STZ(0x0);
auto data = pair.second.wram->_data[0];
cr_assert_eq(data, 0x00, "The stored value should be 0x00 but it was 0x%x.", data);
}
Test(STZ, 16bits)
{
auto pair = Init();
pair.second.cpu->_registers.p.m = false;
pair.second.wram->_data[0] = 0x11;
pair.second.wram->_data[1] = 0x11;
pair.second.cpu->STZ(0x0);
auto data = pair.second.wram->_data[0] + (pair.second.wram->_data[1] << 8u);
cr_assert_eq(data, 0x00, "The stored value should be 0x00 but it was 0x%x.", data);
}