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https://github.com/zoriya/ComSquare.git
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Adding the AND instruction
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+2
-2
@@ -63,7 +63,7 @@ add_executable(unit_tests
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tests/CPU/testInternal.cpp
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sources/Ram/ExtendedRam.cpp
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sources/Ram/ExtendedRam.hpp
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sources/Utility/Utility.hpp sources/Utility/Utility.cpp)
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sources/Utility/Utility.hpp sources/Utility/Utility.cpp sources/CPU/Instructions/BitsInstructions.cpp tests/CPU/testBits.cpp)
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# include criterion & coverage
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target_link_libraries(unit_tests criterion -lgcov)
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@@ -136,7 +136,7 @@ add_executable(ComSquare
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sources/Utility/Utility.hpp
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sources/Debugger/MemoryViewer.cpp
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sources/Debugger/MemoryViewer.hpp
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sources/Utility/Utility.cpp sources/Debugger/HeaderViewer.cpp sources/Debugger/HeaderViewer.hpp)
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sources/Utility/Utility.cpp sources/Debugger/HeaderViewer.cpp sources/Debugger/HeaderViewer.hpp sources/CPU/Instructions/BitsInstructions.cpp)
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target_compile_definitions(ComSquare PUBLIC DEBUGGER_ENABLED)
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@@ -306,6 +306,22 @@ namespace ComSquare::CPU
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case Instructions::CLD: this->CLD(); return 2;
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case Instructions::CLV: this->CLV(); return 2;
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case Instructions::AND_IM: this->AND(this->_getImmediateAddr()); return 2 + !this->_registers.p.m;
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case Instructions::AND_ABS: this->AND(this->_getAbsoluteAddr()); return 4 + !this->_registers.p.m;
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case Instructions::AND_ABSl: this->AND(this->_getAbsoluteLongAddr()); return 5 + !this->_registers.p.m;
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case Instructions::AND_DP: this->AND(this->_getDirectAddr()); return 3 + !this->_registers.p.m + this->_registers.dl != 0;
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case Instructions::AND_DPi: this->AND(this->_getDirectIndirectAddr()); return 5 + !this->_registers.p.m + this->_registers.dl != 0;
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case Instructions::AND_DPil: this->AND(this->_getDirectIndirectLongAddr()); return 6 + !this->_registers.p.m + this->_registers.dl != 0;
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case Instructions::AND_ABSX: this->AND(this->_getAbsoluteIndexedByXAddr()); return 4 + !this->_registers.p.m + this->_hasIndexCrossedPageBoundary;
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case Instructions::AND_ABSXl:this->AND(this->_getAbsoluteIndexedByXLongAddr()); return 5 + !this->_registers.p.m;
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case Instructions::AND_ABSY: this->AND(this->_getAbsoluteIndexedByYAddr()); return 4 + !this->_registers.p.m + this->_hasIndexCrossedPageBoundary;
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case Instructions::AND_DPX: this->AND(this->_getDirectIndexedByXAddr()); return 4 + !this->_registers.p.m + this->_registers.dl != 0;
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case Instructions::AND_DPXi: this->AND(this->_getDirectIndirectIndexedXAddr()); return 6 + !this->_registers.p.m + this->_registers.dl != 0;
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case Instructions::AND_DPYi: this->AND(this->_getDirectIndirectIndexedYAddr()); return 5 + !this->_registers.p.m + this->_registers.dl != 0 + this->_hasIndexCrossedPageBoundary;
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case Instructions::AND_DPYil:this->AND(this->_getDirectIndirectIndexedYLongAddr()); return 6 + !this->_registers.p.m + this->_registers.dl != 0;
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case Instructions::AND_SR: this->AND(this->_getStackRelativeAddr()); return 4 + !this->_registers.p.m;
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case Instructions::AND_SRYi: this->AND(this->_getStackRelativeIndirectIndexedYAddr()); return 7 + !this->_registers.p.m;
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default:
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throw InvalidOpcode("CPU", opcode);
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}
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+19
-1
@@ -288,7 +288,23 @@ namespace ComSquare::CPU
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CLC = 0x18,
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CLI = 0x58,
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CLD = 0xD8,
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CLV = 0xB8
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CLV = 0xB8,
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AND_IM = 0x29,
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AND_ABS = 0x2D,
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AND_ABSl = 0x2F,
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AND_DP = 0x25,
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AND_DPi = 0x32,
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AND_DPil = 0x27,
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AND_ABSX = 0x3D,
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AND_ABSXl = 0x3F,
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AND_ABSY = 0x39,
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AND_DPX = 0x35,
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AND_DPXi = 0x21,
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AND_DPYi = 0x31,
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AND_DPYil = 0x37,
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AND_SR = 0x23,
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AND_SRYi = 0x33
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};
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//! @brief The main CPU
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@@ -429,6 +445,8 @@ namespace ComSquare::CPU
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void CLD();
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//! @brief Clear the overflow flag.
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void CLV();
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//! @brief And accumulator with memory.
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void AND(uint24_t valueAddr);
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public:
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explicit CPU(std::shared_ptr<Memory::MemoryBus> bus, Cartridge::Header &cartridgeHeader);
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CPU(const CPU &) = default;
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@@ -0,0 +1,21 @@
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//
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// Created by anonymus-raccoon on 2/20/20.
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//
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#include "../../Models/Int24.hpp"
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#include "../CPU.hpp"
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namespace ComSquare::CPU
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{
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void CPU::AND(uint24_t valueAddr)
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{
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unsigned negativeMask = this->_isEmulationMode ? 0x80u : 0x8000u;
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unsigned value = this->_bus->read(valueAddr);
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if (this->_registers.p.m)
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value += this->_bus->read(valueAddr + 1) << 8u;
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this->_registers.a &= value;
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this->_registers.p.n = this->_registers.a & negativeMask;
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this->_registers.p.z = this->_registers.a == 0;
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}
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}
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@@ -0,0 +1,50 @@
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//
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// Created by anonymus-raccoon on 2/20/20.
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//
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#include <criterion/criterion.h>
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#include <bitset>
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#include <iostream>
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#include "../tests.hpp"
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#include "../../sources/SNES.hpp"
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using namespace ComSquare;
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Test(AND, emulation)
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{
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auto pair = Init();
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pair.second.wram->_data[0] = 0x00;
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pair.second.cpu->_registers.a = 0xFF;
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pair.second.cpu->_isEmulationMode = true;
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pair.second.cpu->AND(0x0);
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cr_assert_eq(pair.second.cpu->_registers.a, 0x00, "The flags should be 0x00 but it was %x", pair.second.cpu->_registers.a);
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cr_assert_eq(pair.second.cpu->_registers.p.z, true, "The zero flag should be set.");
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cr_assert_eq(pair.second.cpu->_registers.p.n, false, "The negative flag should not be set.");
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}
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Test(AND, nativeNegative)
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{
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auto pair = Init();
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pair.second.wram->_data[0] = 0xF0;
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pair.second.wram->_data[1] = 0xF0;
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pair.second.cpu->_registers.p.m = true;
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pair.second.cpu->_registers.a = 0xFF00;
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pair.second.cpu->_isEmulationMode = false;
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pair.second.cpu->AND(0x0);
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cr_assert_eq(pair.second.cpu->_registers.a, 0xF000, "The flags should be 0xF000 but it was %x", pair.second.cpu->_registers.a);
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cr_assert_eq(pair.second.cpu->_registers.p.z, false, "The zero flag should not be set.");
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cr_assert_eq(pair.second.cpu->_registers.p.n, true, "The negative flag should be set.");
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}
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Test(AND, emulationTest)
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{
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auto pair = Init();
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pair.second.wram->_data[0] = 0b00110011;
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pair.second.cpu->_registers.a = 0b00110111;
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pair.second.cpu->_isEmulationMode = true;
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pair.second.cpu->AND(0x0);
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cr_assert_eq(pair.second.cpu->_registers.a, 0b00110011, "The flags should be 0b00110011 but it was %x", pair.second.cpu->_registers.a);
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cr_assert_eq(pair.second.cpu->_registers.p.z, false, "The zero flag should not be set.");
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cr_assert_eq(pair.second.cpu->_registers.p.n, false, "The negative flag should not be set.");
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}
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