mirror of
https://github.com/zoriya/ComSquare.git
synced 2026-06-03 02:23:49 +00:00
Fixing a bug with the write in 0x0
This commit is contained in:
+1
-1
@@ -52,7 +52,7 @@ add_executable(unit_tests
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sources/CPU/Instructions/CommonInstructions.hpp
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sources/CPU/Instructions/CommonInstructions.hpp
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sources/Exceptions/InvalidOpcode.hpp
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sources/Exceptions/InvalidOpcode.hpp
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sources/CPU/Instructions/Interrupts.cpp
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sources/CPU/Instructions/Interrupts.cpp
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sources/CPU/Instructions/MathematicalOperations.cpp tests/CPU/Math/testADC.cpp)
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sources/CPU/Instructions/MathematicalOperations.cpp tests/CPU/Math/testADC.cpp tests/CPU/testStore.cpp)
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# include criterion & coverage
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# include criterion & coverage
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target_link_libraries(unit_tests criterion -lgcov)
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target_link_libraries(unit_tests criterion -lgcov)
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@@ -441,4 +441,15 @@ namespace ComSquare::CPU
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base += this->_registers.dbr << 16u;
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base += this->_registers.dbr << 16u;
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return base + this->_registers.y;
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return base + this->_registers.y;
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}
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}
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unsigned CPU::STA(uint24_t addr)
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{
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if (this->_registers.p.m)
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this->_bus->write(addr, this->_registers.al);
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else {
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this->_bus->write(addr, this->_registers.al);
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this->_bus->write(addr + 1, this->_registers.ah);
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}
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return 0;
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}
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}
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}
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@@ -288,6 +288,8 @@ namespace ComSquare::CPU
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//! @brief Add with carry - Adds operand to the Accumulator; adds an additional 1 if carry is set.
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//! @brief Add with carry - Adds operand to the Accumulator; adds an additional 1 if carry is set.
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//! @return The number of extra cycles that this operation took.
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//! @return The number of extra cycles that this operation took.
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unsigned ADC(uint24_t valueAddr);
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unsigned ADC(uint24_t valueAddr);
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//! @brief Store the accumulator to memory.
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unsigned STA(uint24_t addr);
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public:
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public:
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explicit CPU(std::shared_ptr<Memory::MemoryBus> bus, Cartridge::Header &cartridgeHeader);
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explicit CPU(std::shared_ptr<Memory::MemoryBus> bus, Cartridge::Header &cartridgeHeader);
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//! @brief This function continue to execute the Cartridge code.
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//! @brief This function continue to execute the Cartridge code.
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@@ -11,7 +11,7 @@
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namespace ComSquare
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namespace ComSquare
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{
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{
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//! @brief Exception thrown when someone tries to load an invalid rom.
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//! @brief Exception thrown when someone tries to load an invalid rom.
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class InvalidAction : std::exception {
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class InvalidAction : public std::exception {
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private:
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private:
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std::string _msg;
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std::string _msg;
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public:
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public:
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@@ -13,7 +13,7 @@
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namespace ComSquare
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namespace ComSquare
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{
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{
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//! @brief Exception thrown when trying to read/write to an invalid address.
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//! @brief Exception thrown when trying to read/write to an invalid address.
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class InvalidAddress : std::exception {
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class InvalidAddress : public std::exception {
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private:
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private:
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std::string _msg;
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std::string _msg;
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public:
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public:
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@@ -25,6 +25,24 @@ namespace ComSquare
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}
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}
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const char *what() const noexcept override { return this->_msg.c_str(); }
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const char *what() const noexcept override { return this->_msg.c_str(); }
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};
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};
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//! @brief Exception thrown when trying to read/write to an invalid address in a rectangle memory region.
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class InvalidRectangleAddress : public std::exception {
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private:
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std::string _msg;
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public:
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InvalidRectangleAddress(std::string where, int32_t addr, int16_t subaddr, int16_t start, int16_t end)
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{
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std::stringstream stream;
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stream << "Could not read/write data at address: 0x" << std::hex << addr << " from " << where;
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if (subaddr < start)
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stream << " (" << std::hex << subaddr << " < " << start << ")";
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else
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stream << " (" << std::hex << subaddr << " > " << end << ")";
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this->_msg = stream.str();
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}
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const char *what() const noexcept override { return this->_msg.c_str(); }
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};
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}
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}
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#endif //COMSQUARE_INVALIDADDRESS_HPP
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#endif //COMSQUARE_INVALIDADDRESS_HPP
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@@ -11,7 +11,7 @@
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namespace ComSquare
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namespace ComSquare
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{
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{
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//! @brief Exception thrown when someone tries to load an invalid rom.
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//! @brief Exception thrown when someone tries to load an invalid rom.
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class InvalidRomException : std::exception {
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class InvalidRomException : public std::exception {
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private:
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private:
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std::string _msg;
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std::string _msg;
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public:
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public:
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@@ -10,7 +10,7 @@
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namespace ComSquare
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namespace ComSquare
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{
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{
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//! @brief When this is thrown, it means that we should work more.
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//! @brief When this is thrown, it means that we should work more.
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class NotImplementedException : std::exception {
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class NotImplementedException : public std::exception {
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public:
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public:
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explicit NotImplementedException() = default;
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explicit NotImplementedException() = default;
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const char *what() const noexcept override { return "Not implemented yet."; }
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const char *what() const noexcept override { return "Not implemented yet."; }
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@@ -31,10 +31,10 @@ namespace ComSquare::Memory
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unsigned bankCount = bank - this->_startBank;
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unsigned bankCount = bank - this->_startBank;
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unsigned pageCount = this->_endPage - this->_startPage;
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unsigned pageCount = this->_endPage - this->_startPage;
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if (bank < this->_startBank || bank >= this->_endBank)
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if (bank < this->_startBank || bank > this->_endBank)
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throw InvalidAddress("Rectangle memory write Invalid Bank", addr);
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throw InvalidRectangleAddress("Rectangle memory write Invalid Bank", addr, bank, this->_startBank, this->_endBank);
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if (page < this->_startPage || page >= this->_endPage)
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if (page < this->_startPage || page > this->_endPage)
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throw InvalidAddress("Rectangle memory write Invalid Page", addr);
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throw InvalidRectangleAddress("Rectangle memory write Invalid Page", addr, page, this->_startPage, this->_endPage);
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page -= this->_startPage;
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page -= this->_startPage;
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page += pageCount * bankCount;
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page += pageCount * bankCount;
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this->write_internal(page, data);
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this->write_internal(page, data);
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@@ -20,6 +20,8 @@ Test(AddrMode, Immediate)
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{
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{
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auto pair = Init();
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auto pair = Init();
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pair.second.cpu->_registers.pac = 0x000015;
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pair.second.cpu->_registers.pac = 0x000015;
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pair.second.cpu->_isEmulationMode = true;
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pair.second.cpu->_registers.p.m = false;
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cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x000015, "Got %x, Expected 0x000015");
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cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x000015, "Got %x, Expected 0x000015");
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cr_assert_eq(pair.second.cpu->_registers.pac, 0x000016);
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cr_assert_eq(pair.second.cpu->_registers.pac, 0x000016);
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}
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}
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@@ -27,6 +29,7 @@ Test(AddrMode, Immediate)
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Test(AddrMode, ImmediateMemoryFlag)
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Test(AddrMode, ImmediateMemoryFlag)
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{
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{
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auto pair = Init();
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auto pair = Init();
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pair.second.cpu->_isEmulationMode = true;
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pair.second.cpu->_registers.pac = 0x000015;
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pair.second.cpu->_registers.pac = 0x000015;
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pair.second.cpu->_registers.p.m = true;
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pair.second.cpu->_registers.p.m = true;
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cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x000015, "Got %x, Expected 0x000015");
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cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x000015, "Got %x, Expected 0x000015");
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@@ -37,6 +40,7 @@ Test(AddrMode, ImmediateBankChange)
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{
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{
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auto pair = Init();
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auto pair = Init();
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pair.second.cpu->_registers.pac = 0x00FFFF;
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pair.second.cpu->_registers.pac = 0x00FFFF;
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pair.second.cpu->_registers.p.m = false;
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cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x00FFFF);
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cr_assert_eq(pair.second.cpu->_getImmediateAddr(), 0x00FFFF);
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cr_assert_eq(pair.second.cpu->_registers.pac, 0x010000);
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cr_assert_eq(pair.second.cpu->_registers.pac, 0x010000);
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}
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}
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@@ -0,0 +1,20 @@
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//
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// Created by anonymus-raccoon on 2/12/20.
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//
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#include <criterion/criterion.h>
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#include <iostream>
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#include <bitset>
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#include "../tests.hpp"
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#include "../../sources/SNES.hpp"
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using namespace ComSquare;
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//
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//Test(STA, 8bits)
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//{
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// auto pair = Init();
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// pair.second.cpu->_registers.p.m = false;
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// pair.second.cpu->_registers.a = 0x11;
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// pair.second.cpu->STA(0x0);
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// auto data = pair.second.wram->_data[0];
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// cr_assert_eq(data, 0x11, "The stored value should be 0x11 but it was 0x%x.", data);
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//}
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@@ -261,12 +261,31 @@ Test(BusAccessor, GetRomMirror3)
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cr_assert_eq(accessor->_initial.get(), pair.second.cartridge.get());
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cr_assert_eq(accessor->_initial.get(), pair.second.cartridge.get());
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}
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}
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Test(BusAccessor, Get0x0)
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{
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auto pair = Init();
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std::shared_ptr<Memory::RectangleShadow> accessor = nullptr;
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accessor = std::static_pointer_cast<Memory::RectangleShadow>(pair.first->getAccessor(0x0));
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cr_assert_eq(accessor->_initial.get(), pair.second.wram.get());
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}
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///////////////////////////
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///////////////////////////
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// //
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// //
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// MemoryBus::read tests //
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// MemoryBus::read tests //
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// //
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// //
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///////////////////////////
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///////////////////////////
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Test(BusRead, Read0x0)
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{
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auto pair = Init();
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uint8_t data;
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pair.second.wram->_data[0] = 123;
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data = pair.first->read(0x0);
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cr_assert_eq(data, 123);
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}
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Test(BusRead, ReadOutside, .init = cr_redirect_stdout)
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Test(BusRead, ReadOutside, .init = cr_redirect_stdout)
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{
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{
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auto pair = Init();
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auto pair = Init();
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@@ -394,6 +413,19 @@ Test(BusRead, ReadWRAMMirror)
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// //
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// //
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////////////////////////////
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////////////////////////////
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Test(BusWrite, Write0x0)
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{
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auto pair = Init();
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try {
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pair.first->write(0x0, 123);
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} catch (std::exception &ex) {
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std::cout << ex.what() << std::endl;
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}
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cr_assert_eq(pair.second.wram->_data[0], 123);
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}
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Test(BusWrite, WriteAPU)
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Test(BusWrite, WriteAPU)
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{
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{
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auto pair = Init();
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auto pair = Init();
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