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Starting to implement addressing modes

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This commit is contained in:
AnonymusRaccoon
2020-02-07 18:56:24 +01:00
parent 36d615ba64
commit fc94563b41
2 changed files with 75 additions and 6 deletions
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sources/CPU/CPU.cpp
+60 -2
View File
@@ -195,18 +195,66 @@ namespace ComSquare::CPU
int CPU::executeInstruction()
{
uint8_t opcode = this->_bus->read(this->_registers.pc++);
uint8_t opcode = this->_bus->read(this->_registers.pc);
switch (opcode) {
case 0x0: return this->BRK();
case 0x0:
return this->BRK();
case 0x61:
case 0x63:
case 0x65:
case 0x67:
case 0x69:
case 0x6D:
case 0x6F:
case 0x71:
case 0x72:
case 0x73:
case 0x75:
case 0x77:
case 0x79:
case 0x7D:
case 0x7F:
return this->ADC();
default:
throw InvalidOpcode("CPU", opcode);
}
}
////////////////////////////////////////////////////////////////////
/// Addressing modes
////////////////////////////////////////////////////////////////////
uint24_t CPU::_GetImmediateAddr()
{
return this->_registers.pc++;
}
uint24_t CPU::_GetDirectAddr()
{
uint8_t addr = this->_bus->read(this->_registers.pc++);
return this->_registers.d + addr;
}
uint24_t CPU::_GetAbsoluteAddr()
{
uint24_t addr = this->_registers.dbr << 16u;
addr += this->_bus->read(this->_registers.pc++) << 8u;
addr += this->_bus->read(this->_registers.pc++);
return addr;
}
uint24_t CPU::_GetAbsoluteLongAddr()
{
return 0;
}
int CPU::BRK()
{
this->_registers.pc += 2;
this->_registers.p.i = true;
if (this->_isEmulationMode)
this->_registers.pc = this->_cartridgeHeader.emulationInterrupts.brk;
@@ -215,4 +263,14 @@ namespace ComSquare::CPU
this->_registers.p.d = false;
return 7 + !this->_isEmulationMode;
}
////////////////////////////////////////////////////////////////////
/// Mathematical operations
////////////////////////////////////////////////////////////////////
int CPU::ADC()
{
// this->_registers.a +=
}
}
sources/CPU/CPU.hpp
+15 -4
View File
@@ -188,9 +188,24 @@ namespace ComSquare::CPU
//! @brief The cartridge header (stored for interrupt vectors..
Cartridge::Header &_cartridgeHeader;
//! @brief Immediate address mode is specified with a value. (This functions returns the 24bit space address of the value).
uint24_t _GetImmediateAddr();
//! @brief The destination is formed by adding the direct page register with the 8-bit address to form an effective address. (This functions returns the 24bit space address of the value).
uint24_t _GetDirectAddr();
//! @brief The effective address is formed by DBR:<16-bit exp>. (This functions returns the 24bit space address of the value).
uint24_t _GetAbsoluteAddr();
//! @brief The effective address is the expression. (This functions returns the 24bit space address of the value).
uint24_t _GetAbsoluteLongAddr();
//! @brief Execute a single instruction.
//! @return The number of CPU cycles that the instruction took.
int executeInstruction();
//! @brief Break instruction (0x00) - Causes a software break. The PC is loaded from a vector table.
int BRK();
//! @brief Add with carry (0x61, 0x63, 0x65, 0x67, 0x69, 0x6D, 0x6F, 0x71, 0x72, 0x73, 0x75, 0x77, 0x79, 0x7D, 0x7F) - Adds operand to the Accumulator; adds an additional 1 if carry is set.
int ADC();
public:
explicit CPU(std::shared_ptr<Memory::MemoryBus> bus, Cartridge::Header &cartridgeHeader);
//! @brief This function continue to execute the Cartridge code.
@@ -206,10 +221,6 @@ namespace ComSquare::CPU
//! @param data The new value of the register.
//! @throw InvalidAddress will be thrown if the address is more than $1F (the number of register).
void write(uint24_t addr, uint8_t data) override;
private:
//! @brief Break instruction (0x00) - Causes a software break. The PC is loaded from a vector table.
int BRK();
};
}