12 Commits

Author	SHA1	Message	Date
Clément Le Bihan	7fd2bf4de4	almost finished adding ppu's registers	2021-02-05 19:28:47 +01:00
Clément Le Bihan	82f1dadee9	fixing tests compilation	2021-02-04 19:29:20 +01:00
Clément Le Bihan	44993064be	merge master into PPU	2021-02-04 19:26:02 +01:00
Clément Le Bihan	212a3b3922	adding tests and fixing VMDATA(L-H) and adding read registers for vram	2021-02-01 23:45:43 +01:00
Anonymus Raccoon	c38b100c14	Creating the structures of the register viewer	2020-05-29 18:52:58 +02:00
Clément Le Bihan	4015538404	fixing the test cgram_data_full (address is now incremented twice)	2020-04-05 19:05:01 +02:00
Clément Le Bihan	a02c201628	unit test compiling and passing	2020-03-26 13:39:53 +01:00
Anonymus Raccoon	95f17c06a8	Finishing to clean tests and adding the start of the bus logger	2020-03-24 01:53:45 +01:00
Clément Le Bihan	c5fa9906c1	all ppu registers write (except write registers to vram cgram & oamram))	2020-02-13 11:16:29 +01:00
Clément Le Bihan	62a36d98b0	added 0x2123 - 0x212D ppu registers w/ tests	2020-02-13 00:10:50 +01:00
Clément Le Bihan	49b5401135	added documentation on the ppu's register	2020-02-11 23:54:43 +01:00
Clément Le Bihan	d0f639ff4c	added enum and tests	2020-02-11 16:20:16 +01:00