Anonymus Raccoon
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a421ef693f
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Starting the SBC instruction
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2020-02-25 23:32:19 +01:00 |
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Anonymus Raccoon
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4da96894ae
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Implementing the XCE instruction
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2020-02-25 23:05:15 +01:00 |
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Anonymus Raccoon
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38045afe15
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Implementing the SET bits instructions
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2020-02-25 22:09:37 +01:00 |
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AnonymusRaccoon
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91150dfbc1
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Adding the AND instruction
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2020-02-20 18:32:21 +01:00 |
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AnonymusRaccoon
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52b5a6ba23
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Implementing the COP instruction
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2020-02-19 18:44:45 +01:00 |
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AnonymusRaccoon
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27f755e315
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Reworking the BRK
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2020-02-19 17:55:29 +01:00 |
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AnonymusRaccoon
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f6466f63f0
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Solving a bug with the ADC
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2020-02-17 11:26:46 +01:00 |
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Anonymus Raccoon
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80d9832fbd
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Displaying CPU registers
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2020-02-16 22:19:13 +01:00 |
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AnonymusRaccoon
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8787b09546
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Implementing the CLC/CLI/CLD/CLV
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2020-02-14 16:35:02 +01:00 |
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AnonymusRaccoon
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ad11210771
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Implementing Pull from stack
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2020-02-14 15:49:46 +01:00 |
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AnonymusRaccoon
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55d87bf9ac
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Finishing to implements JSR/JLR and push
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2020-02-14 15:20:19 +01:00 |
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AnonymusRaccoon
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31aa3c843e
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Implementing the REP instruction
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2020-02-14 11:22:38 +01:00 |
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AnonymusRaccoon
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072cb17bcb
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Finishing the SEP
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2020-02-13 18:57:31 +01:00 |
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AnonymusRaccoon
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41355191aa
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Making the RAM a template
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2020-02-13 18:22:17 +01:00 |
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AnonymusRaccoon
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2735238329
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Implementing the LDY
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2020-02-13 17:46:09 +01:00 |
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AnonymusRaccoon
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9cf41e6ff4
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Implementing the LDX
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2020-02-13 17:42:41 +01:00 |
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AnonymusRaccoon
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7e97a9466c
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Adding the LDA
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2020-02-13 15:50:14 +01:00 |
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AnonymusRaccoon
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8cc87d0be2
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Adding the STZ
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2020-02-13 14:47:55 +01:00 |
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AnonymusRaccoon
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997bb4fa7c
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Implementing the STX
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2020-02-13 14:05:47 +01:00 |
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AnonymusRaccoon
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4d30a35620
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Changing timing management
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2020-02-13 13:55:01 +01:00 |
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AnonymusRaccoon
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b1a2222b55
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Adding the RTI
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2020-02-12 16:51:13 +01:00 |
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AnonymusRaccoon
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17c0cb8660
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Adding the reset
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2020-02-12 16:40:06 +01:00 |
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AnonymusRaccoon
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8addb29610
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Implementing instructions cycles
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2020-02-11 17:39:06 +01:00 |
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AnonymusRaccoon
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bc808bd424
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Handling the m flag
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2020-02-11 16:30:06 +01:00 |
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AnonymusRaccoon
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b2a60efb4e
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Finishing the ADC
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2020-02-11 15:53:37 +01:00 |
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AnonymusRaccoon
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d7002336fa
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Finishing the main and disabling the invalid opcode throw for now
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2020-02-11 14:47:56 +01:00 |
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AnonymusRaccoon
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69f9528d20
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Adding all the ADC in the instruction switch case
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2020-02-11 14:26:39 +01:00 |
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AnonymusRaccoon
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bd681c49a1
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Reworking the test for the CPU
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2020-02-10 11:39:32 +01:00 |
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AnonymusRaccoon
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36d615ba64
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Finishing the first opcode
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2020-02-07 17:24:15 +01:00 |
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