ComSquare
APU.hpp
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1 //
2 // Created by Melefo on 24/01/2020.
3 //
4 
5 #pragma once
6 
7 #include <memory>
8 #include "DSP/DSP.hpp"
9 #include "Memory/AMemory.hpp"
10 #include "Ram/Ram.hpp"
11 #include "IPL/IPL.hpp"
12 #include "Renderer/IRenderer.hpp"
13 #include "Cartridge/Cartridge.hpp"
14 
15 #ifdef DEBUGGER_ENABLED
16 #include "Debugger/APUDebug.hpp"
17 #endif
18 
19 namespace ComSquare::APU
20 {
22 
24  uint8_t x;
25 
27  union {
28  struct {
30  uint8_t a;
32  uint8_t y;
33  };
34  uint16_t ya;
35  };
36 
38  uint8_t sp;
39 
41  union {
42  struct {
43  uint8_t pcl;
44  uint8_t pch;
45  };
46  uint16_t pc;
47  };
48 
50  union {
51  struct {
53  bool c : 1;
55  bool z : 1;
57  bool i : 1;
59  bool h : 1;
61  bool b : 1;
63  bool p : 1;
65  bool v : 1;
67  bool n : 1;
68  };
69  uint8_t psw;
70  };
71  };
72 
73  struct Registers
74  {
76  uint8_t unknown;
77 
79  uint8_t ctrlreg;
80 
82  uint8_t dspregAddr;
83 
85  uint8_t port0;
87  uint8_t port1;
89  uint8_t port2;
91  uint8_t port3;
92 
94  uint8_t regmem1;
96  uint8_t regmem2;
97 
99  uint8_t timer0;
101  uint8_t timer1;
103  uint8_t timer2;
104 
106  uint8_t counter0;
108  uint8_t counter1;
110  uint8_t counter2;
111 
112  };
113 
115  {
119  };
120 
121  struct MemoryMap
122  {
131 
132  MemoryMap();
133  MemoryMap(const MemoryMap &) = delete;
134  MemoryMap &operator=(const MemoryMap &) = delete;
135  ~MemoryMap() = default;
136  };
137 
138  class APU : public Memory::AMemory {
139  private:
144 
147 
150 
155  [[nodiscard]] uint8_t _internalRead(uint24_t addr) const;
156 
161  void _internalWrite(uint24_t addr, uint8_t data);
162 
165 
167  unsigned int _paddingCycles = 0;
168 
170  uint8_t _getImmediateData();
194  std::pair<uint24_t, uint24_t> _getAbsoluteBit();
195 
197  void _setNZflags(uint8_t value);
198 
201  int _executeInstruction();
202 
204  int NOP();
206  int SLEEP();
208  int STOP();
209 
211  int CLRC();
213  int SETC();
215  int NOTC();
217  int CLRV();
219  int CLRP();
221  int SETP();
223  int EI();
225  int DI();
226 
228  int SET1(uint24_t dp, uint8_t bit);
230  int CLR1(uint24_t dp, uint8_t bit);
232  int TSET1(uint24_t abs);
234  int TCLR1(uint24_t abs);
236  int AND1(std::pair<uint24_t, uint24_t> operand, bool invert = false);
238  int OR1(std::pair<uint24_t, uint24_t> operand, bool invert = false);
240  int EOR1(std::pair<uint24_t, uint24_t> operand);
242  int NOT1(std::pair<uint24_t, uint24_t> operand);
244  int MOV1(std::pair<uint24_t, uint24_t> operand, bool to_carry = false);
245 
247  int PUSH(uint8_t value);
249  int POP(uint8_t &destination);
250 
252  int CALL(uint24_t abs);
254  int PCALL();
256  int TCALL(uint8_t bit);
258  int BRK();
260  int RET();
262  int RETI();
263 
265  int BRA(int8_t offset);
267  int BEQ(int8_t offset);
269  int BNE(int8_t offset);
271  int BCS(int8_t offset);
273  int BCC(int8_t offset);
275  int BVS(int8_t offset);
277  int BVC(int8_t offset);
279  int BMI(int8_t offset);
281  int BPL(int8_t offset);
283  int BBS(uint24_t addr, int8_t offset, uint8_t bit);
285  int BBC(uint24_t addr, int8_t offset, uint8_t bit);
287  int CBNE(uint24_t addr, int8_t offset, bool by_x = false);
289  int DBNZ(int8_t offset, bool direct_addr = false);
291  int JMP(uint24_t addr, bool by_x = false);
292 
294  int DAA();
296  int DAS();
297 
299  int MUL();
301  int DIV();
302 
304  int INCW(uint24_t addr);
306  int DECW(uint24_t addr);
308  int ADDW(uint24_t addr);
310  int SUBW(uint24_t addr);
312  int CMPW(uint24_t addr);
313 
315  int MOVW(uint24_t addr, bool to_ya = false);
316 
318  int ASL(uint24_t operand, int cycles, bool accumulator = false);
320  int LSR(uint24_t operand, int cycles, bool accumulator = false);
322  int ROL(uint24_t operand, int cycles, bool accumulator = false);
324  int ROR(uint24_t operand, int cycles, bool accumulator = false);
326  int XCN();
327 
329  int INC(uint24_t addr, int cycles);
331  int INCreg(uint8_t &value);
333  int DEC(uint24_t addr, int cycles);
335  int DECreg(uint8_t &value);
336 
338  int AND(uint24_t operand1, uint24_t operand2, int cycles);
340  int ANDacc(uint24_t addr, int cycles);
342  int OR(uint24_t operand1, uint24_t operand2, int cycles);
344  int ORacc(uint24_t addr, int cycles);
346  int EOR(uint24_t operand1, uint24_t operand2, int cycles);
348  int EORacc(uint24_t addr, int cycles);
349 
351  int ADC(uint24_t operand1, uint24_t operand2, int cycles);
353  int ADCacc(uint24_t addr, int cycles);
355  int SBC(uint24_t operand1, uint24_t operand2, int cycles);
357  int SBCacc(uint24_t addr, int cycles);
359  int CMP(uint24_t operand1, uint24_t operand2, int cycles);
361  int CMPreg(uint8_t &reg, uint24_t addr, int cycles);
362 
363  int MOV(uint8_t &regFrom, uint8_t &regTo, bool setFlags = true);
364  int MOV(uint8_t &regFrom, uint24_t memTo, int cycles, bool incrementX = false);
365  int MOV(uint24_t memFrom, uint8_t &regTo, int cycles, bool incrementX = false);
366  int MOV(uint24_t memFrom, uint24_t memTo);
367  public:
368  explicit APU(Renderer::IRenderer &renderer);
369  APU(const APU &) = default;
370  APU &operator=(const APU &) = delete;
371  ~APU() override = default;
372 
374  bool isDisabled = false;
375 
380  uint8_t read(uint24_t addr) override;
381 
386  void write(uint24_t addr, uint8_t data) override;
387 
389  [[nodiscard]] std::string getName() const override;
390 
392  [[nodiscard]] Component getComponent() const override;
393 
396  [[nodiscard]] std::string getValueName(uint24_t addr) const override;
397 
400  [[nodiscard]] uint24_t getSize() const override;
401 
403  void loadFromSPC(Cartridge::Cartridge &cartridge);
404 
407  void update(unsigned cycles);
408 
410  void reset();
411 
412 #ifdef DEBUGGER_ENABLED
414 #endif
415  };
416 }
ComSquare::APU::APU::_getImmediateData
uint8_t _getImmediateData()
Get value of the Pointer Counter.
Definition: Operand.cpp:10
ComSquare::APU::APU::_getDirectAddrByY
uint24_t _getDirectAddrByY()
Get direct page offset and add to it the Y Index Flag.
Definition: Operand.cpp:50
ComSquare::APU::APU::DAS
int DAS()
Decimal adjust A for subtraction.
Definition: DecimalCompensation.cpp:22
ComSquare::APU::APU::CLRV
int CLRV()
Clear Overflow instruction, Set Overflow & Half Carry flags to 0.
Definition: ProgramStatusWord.cpp:27
ComSquare::APU::APU::ADC
int ADC(uint24_t operand1, uint24_t operand2, int cycles)
Add operand1 with operand2 and carry.
Definition: 8bitArithmetic.cpp:9
ComSquare::APU::APU::_getDirectAddrByX
uint24_t _getDirectAddrByX()
Get direct page offset and add to it the X Index Flag.
Definition: Operand.cpp:42
ComSquare::APU::APU::SBC
int SBC(uint24_t operand1, uint24_t operand2, int cycles)
Subtract operand1 with operand2 and carry.
Definition: 8bitArithmetic.cpp:36
ComSquare::APU::APU::BVC
int BVC(int8_t offset)
Branch if Overflow Flag is set.
Definition: ProgramFlow.cpp:55
ComSquare::APU::APU::RETI
int RETI()
Return from interrupt.
Definition: Subroutine.cpp:49
ComSquare::APU::APU::XCN
int XCN()
Exchange Nibbles.
Definition: 8bitShiftRotation.cpp:67
ComSquare::APU::APU::_getAbsoluteAddrByY
uint24_t _getAbsoluteAddrByY()
Get absolute direct page offset and add to it the Y Index Flag.
Definition: Operand.cpp:85
ComSquare::Ram::Ram
Definition: Ram.hpp:14
ComSquare::APU::InternalRegisters::b
bool b
Break flag.
Definition: APU.hpp:61
ComSquare::APU::APU::CMP
int CMP(uint24_t operand1, uint24_t operand2, int cycles)
Compare the two values of the operands and set NZC flags.
Definition: 8bitArithmetic.cpp:63
ComSquare::APU::APU::PUSH
int PUSH(uint8_t value)
Push a value onto the stack and decrement SP Register.
Definition: Stack.cpp:9
ComSquare::APU::APU::_getAbsoluteDirectAddrByY
uint24_t _getAbsoluteDirectAddrByY()
Get absolute offset of the direct page and add the Y Index Flag to it.
Definition: Operand.cpp:116
ComSquare::Component
Component
Definition: Components.hpp:9
ComSquare::APU::APU::ASL
int ASL(uint24_t operand, int cycles, bool accumulator=false)
Arithmetic Shift Left.
Definition: 8bitShiftRotation.cpp:9
ComSquare::APU::Registers::port0
uint8_t port0
Port 0 register.
Definition: APU.hpp:85
ComSquare::APU::APU::_internalRegisters
InternalRegisters _internalRegisters
Internal registers of the CPU (accessible from the bus via addr $4200 to $421F).
Definition: APU.hpp:143
ComSquare::APU::APU::RET
int RET()
Return from subroutine.
Definition: Subroutine.cpp:42
ComSquare::APU::InternalRegisters::z
bool z
Zero flag.
Definition: APU.hpp:55
ComSquare::APU::APU::MOV1
int MOV1(std::pair< uint24_t, uint24_t > operand, bool to_carry=false)
Either moves the specified bit into carry or moves carry into the specified bit.
Definition: Bit.cpp:74
ComSquare::APU::InternalRegisters::pcl
uint8_t pcl
Definition: APU.hpp:43
ComSquare::APU::Registers::regmem2
uint8_t regmem2
Another Regular Memory register.
Definition: APU.hpp:96
ComSquare::APU::APU::BBC
int BBC(uint24_t addr, int8_t offset, uint8_t bit)
Branch if the specified is clear in the address, go to the specified location from the next instructi...
Definition: ProgramFlow.cpp:89
ComSquare::APU::APU::ANDacc
int ANDacc(uint24_t addr, int cycles)
Perform a bitwise AND on the Accumulator flag.
Definition: 8bitLogical.cpp:18
ComSquare::APU::APU::reset
void reset()
This function is executed when the SNES is powered on or the reset button is pushed.
Definition: APU.cpp:170
ComSquare::APU::APU::getName
std::string getName() const override
Get the name of this accessor (used for debug purpose)
Definition: APU.cpp:20
ComSquare::APU::APU::AND1
int AND1(std::pair< uint24_t, uint24_t > operand, bool invert=false)
Performs a bitwise AND on the value or inverse value of the specified bit with Carry flag and stores ...
Definition: Bit.cpp:44
ComSquare::APU::InternalRegisters::y
uint8_t y
The Y Index register.
Definition: APU.hpp:32
ComSquare::APU::APU::TCLR1
int TCLR1(uint24_t abs)
test clear 1-bit instruction, Test and clear bits with absolute address
Definition: Bit.cpp:35
ComSquare::APU::InternalRegisters::n
bool n
Negative flag.
Definition: APU.hpp:67
ComSquare::APU::Stopped
@ Stopped
Definition: APU.hpp:118
ComSquare::APU::APU::ROL
int ROL(uint24_t operand, int cycles, bool accumulator=false)
Rotate Bits Left.
Definition: 8bitShiftRotation.cpp:38
ComSquare::APU::APU::update
void update(unsigned cycles)
This function execute the instructions received until the maximum number of cycles is reached.
Definition: APU.cpp:799
ComSquare::APU::APU::_setNZflags
void _setNZflags(uint8_t value)
Set Negative and Zero flags with value after an instruction.
Definition: APU.cpp:890
ComSquare::APU::APU::BCS
int BCS(int8_t offset)
Branch if Carry Flag is set.
Definition: ProgramFlow.cpp:31
ComSquare::APU::Registers::counter1
uint8_t counter1
Counter-1 register.
Definition: APU.hpp:108
ComSquare::APU::APU::INCreg
int INCreg(uint8_t &value)
Increment a register.
Definition: 8bitIncrementDecrement.cpp:18
ComSquare::APU::APU::INC
int INC(uint24_t addr, int cycles)
Increment a value at an address.
Definition: 8bitIncrementDecrement.cpp:9
ComSquare::APU::APU::SBCacc
int SBCacc(uint24_t addr, int cycles)
Subtract Accumulator Flag with address and carry.
Definition: 8bitArithmetic.cpp:50
ComSquare::APU::APU::_getAbsoluteAddrByX
uint24_t _getAbsoluteAddrByX()
Get absolute direct page offset and add to it the X Index Flag.
Definition: Operand.cpp:78
AMemory.hpp
ComSquare::APU::Registers::regmem1
uint8_t regmem1
Regular Memory register.
Definition: APU.hpp:94
ComSquare::APU::InternalRegisters::v
bool v
Overflow flag.
Definition: APU.hpp:65
ComSquare::APU::InternalRegisters::sp
uint8_t sp
The Stack pointer register.
Definition: APU.hpp:38
ComSquare::APU::APU::ORacc
int ORacc(uint24_t addr, int cycles)
Perform a bitwise OR on the Accumulator flag.
Definition: 8bitLogical.cpp:34
ComSquare::APU::APU::NOT1
int NOT1(std::pair< uint24_t, uint24_t > operand)
Performs a logical NOT on the value of the specified bit and stores the result.
Definition: Bit.cpp:68
ComSquare::APU::IPL::IPL
Definition: IPL.hpp:11
ComSquare::APU::InternalRegisters
Definition: APU.hpp:21
ComSquare::APU::APU::EOR1
int EOR1(std::pair< uint24_t, uint24_t > operand)
Performs a exclusive OR on the value of the bit specified with Carry flag and stores the result in th...
Definition: Bit.cpp:62
Cartridge.hpp
ComSquare::APU::APU::_getIndexXAddr
uint24_t _getIndexXAddr()
Get Index X offset.
Definition: Operand.cpp:24
ComSquare::APU::APU::~APU
~APU() override=default
ComSquare::APU::APU::JMP
int JMP(uint24_t addr, bool by_x=false)
Jump to the specified location.
Definition: ProgramFlow.cpp:127
ComSquare::APU::InternalRegisters::x
uint8_t x
The X index register.
Definition: APU.hpp:24
ComSquare::APU::Registers::port1
uint8_t port1
Port 1 register.
Definition: APU.hpp:87
ComSquare::APU::APU::INCW
int INCW(uint24_t addr)
Increment a word value.
Definition: 16bitArithmetic.cpp:9
ComSquare::APU::Registers::counter0
uint8_t counter0
Counter-0 register.
Definition: APU.hpp:106
ComSquare::APU
Definition: APU.cpp:12
ComSquare::APU::APU::CLRC
int CLRC()
Clear Carry instruction, set Carry flag to 0.
Definition: ProgramStatusWord.cpp:9
ComSquare::APU::Registers::port2
uint8_t port2
Port 2 register.
Definition: APU.hpp:89
ComSquare::APU::APU::SETP
int SETP()
Set Direct Page instruction, Set Direct Page flag to 1.
Definition: ProgramStatusWord.cpp:40
APUDebug.hpp
ComSquare::APU::APU::read
uint8_t read(uint24_t addr) override
Read from the APU ram.
Definition: APU.cpp:129
ComSquare::APU::MemoryMap::operator=
MemoryMap & operator=(const MemoryMap &)=delete
uint24_t
unsigned uint24_t
Definition: Ints.hpp:10
ComSquare::APU::Registers::unknown
uint8_t unknown
An undocumented register.
Definition: APU.hpp:76
ComSquare::APU::APU::STOP
int STOP()
Stop instruction, halts the processor with STOP mode.
Definition: Standbys.cpp:20
ComSquare::APU::APU::BEQ
int BEQ(int8_t offset)
Branch if Zero Flag is set.
Definition: ProgramFlow.cpp:15
ComSquare::APU::APU::_getAbsoluteAddr
uint24_t _getAbsoluteAddr()
Get absolute direct page offset.
Definition: Operand.cpp:58
ComSquare::APU::APU::DIV
int DIV()
Divide the 16-bit value YA by X, storing the quotient in A and the remainder in Y.
Definition: MultiplicationDivision.cpp:17
ComSquare::APU::APU::EORacc
int EORacc(uint24_t addr, int cycles)
Perform an Exclusive OR on the Accumulator flag.
Definition: 8bitLogical.cpp:50
ComSquare::APU::Registers::ctrlreg
uint8_t ctrlreg
Control Register register.
Definition: APU.hpp:79
ComSquare::APU::Registers::timer2
uint8_t timer2
Timer-2 register.
Definition: APU.hpp:103
ComSquare::APU::APU::AND
int AND(uint24_t operand1, uint24_t operand2, int cycles)
Perform a bitwise AND.
Definition: 8bitLogical.cpp:9
ComSquare::APU::APU::SLEEP
int SLEEP()
Sleep instruction, halts the processor with SLEEP mode.
Definition: Standbys.cpp:14
ComSquare::APU::APU::CMPreg
int CMPreg(uint8_t &reg, uint24_t addr, int cycles)
Compare a Register Flag with the value of the operand and set NZC flags.
Definition: 8bitArithmetic.cpp:72
ComSquare::APU::APU::OR1
int OR1(std::pair< uint24_t, uint24_t > operand, bool invert=false)
Performs a bitwise OR on the value or inverse value of the specified bit with Carry flag and stores t...
Definition: Bit.cpp:53
ComSquare::APU::InternalRegisters::c
bool c
Carry flag.
Definition: APU.hpp:53
ComSquare::APU::APU::loadFromSPC
void loadFromSPC(Cartridge::Cartridge &cartridge)
Parses rom data to uploads directly into RAM and corresponding registers.
Definition: APU.cpp:819
ComSquare::APU::Registers::port3
uint8_t port3
Port 3 register.
Definition: APU.hpp:91
ComSquare::APU::APU::BNE
int BNE(int8_t offset)
Branch if Zero Flag is clear.
Definition: ProgramFlow.cpp:23
ComSquare::APU::APU::_dsp
DSP::DSP _dsp
The DSP component used to produce sound.
Definition: APU.hpp:149
ComSquare::APU::APU::DECreg
int DECreg(uint8_t &value)
Decrement a register.
Definition: 8bitIncrementDecrement.cpp:34
ComSquare::APU::APU::NOP
int NOP()
No Operation instruction, do nothing than delay.
Definition: Standbys.cpp:9
ComSquare::APU::APU::MUL
int MUL()
Store the 16-bit value of Y * A into YA.
Definition: MultiplicationDivision.cpp:9
ComSquare::APU::MemoryMap::~MemoryMap
~MemoryMap()=default
ComSquare::APU::APU::_getAbsoluteByXAddr
uint24_t _getAbsoluteByXAddr()
_get absolute direct page + X Index offset
Definition: Operand.cpp:66
ComSquare::APU::APU::getComponent
Component getComponent() const override
Get the component of this accessor (used for debug purpose)
Definition: APU.cpp:25
ComSquare::APU::APU::CLR1
int CLR1(uint24_t dp, uint8_t bit)
Clear 1-bit instruction, clear a bit in direct page.
Definition: Bit.cpp:18
ComSquare::APU::APU::_internalWrite
void _internalWrite(uint24_t addr, uint8_t data)
Write data to the APU ram.
Definition: APU.cpp:70
ComSquare::APU::APU::ADDW
int ADDW(uint24_t addr)
Add YA with a word value.
Definition: 16bitArithmetic.cpp:33
ComSquare::APU::APU::DBNZ
int DBNZ(int8_t offset, bool direct_addr=false)
Decrement a value then branch to the specified location if the value is not zero.
Definition: ProgramFlow.cpp:109
ComSquare::APU::APU::SUBW
int SUBW(uint24_t addr)
Subtract YA with a word value.
Definition: 16bitArithmetic.cpp:48
ComSquare::APU::APU::BCC
int BCC(int8_t offset)
Branch if Carry Flag is clear.
Definition: ProgramFlow.cpp:39
ComSquare::APU::APU::CMPW
int CMPW(uint24_t addr)
Compare YA with a word value.
Definition: 16bitArithmetic.cpp:66
ComSquare::APU::APU::DEC
int DEC(uint24_t addr, int cycles)
Decrement a value at an address.
Definition: 8bitIncrementDecrement.cpp:25
ComSquare::APU::InternalRegisters::psw
uint8_t psw
Definition: APU.hpp:69
ComSquare::APU::MemoryMap::Page0
Ram::Ram Page0
Zero page memory.
Definition: APU.hpp:124
ComSquare::APU::StateMode
StateMode
Definition: APU.hpp:114
ComSquare::APU::APU::_getIndexYAddr
uint24_t _getIndexYAddr()
Get Index Y offset.
Definition: Operand.cpp:33
ComSquare::APU::APU::_internalRead
uint8_t _internalRead(uint24_t addr) const
Read from the APU ram.
Definition: APU.cpp:30
ComSquare::APU::APU::APU
APU(Renderer::IRenderer &renderer)
Definition: APU.cpp:14
ComSquare::APU::APU::OR
int OR(uint24_t operand1, uint24_t operand2, int cycles)
Perform a bitwise OR.
Definition: 8bitLogical.cpp:25
ComSquare::APU::APU::MOVW
int MOVW(uint24_t addr, bool to_ya=false)
Sets a word value equal to another.
Definition: 16bitDataTransmission.cpp:9
ComSquare::APU::APU::CALL
int CALL(uint24_t abs)
Push PC of the next instruction on the stack, then jump to the address at the specified location.
Definition: Subroutine.cpp:10
ComSquare::APU::APU::SET1
int SET1(uint24_t dp, uint8_t bit)
Set 1-bit instruction, set a bit in direct page.
Definition: Bit.cpp:10
ComSquare::APU::APU::getSize
uint24_t getSize() const override
Get the size of the data. This size can be lower than the mapped data.
Definition: APU.cpp:165
ComSquare::APU::APU::isDisabled
bool isDisabled
Is this APU disabled?
Definition: APU.hpp:374
ComSquare::APU::APU::LSR
int LSR(uint24_t operand, int cycles, bool accumulator=false)
Logical Shift Right.
Definition: 8bitShiftRotation.cpp:23
ComSquare::APU::MemoryMap::Page1
Ram::Ram Page1
Stack space memory.
Definition: APU.hpp:126
ComSquare::Memory::AMemory
Abstract class representing a continuous block of memory.
Definition: AMemory.hpp:18
ComSquare::APU::MemoryMap::IPL
IPL::IPL IPL
IPL ROM.
Definition: APU.hpp:130
ComSquare::APU::InternalRegisters::ya
uint16_t ya
Definition: APU.hpp:34
ComSquare::APU::MemoryMap::MemoryMap
MemoryMap()
Definition: APU.cpp:896
ComSquare::APU::APU::NOTC
int NOTC()
Complement Carry instruction, invert Carry flag value.
Definition: ProgramStatusWord.cpp:21
ComSquare::APU::APU::TCALL
int TCALL(uint8_t bit)
Performs a call on one of the 16 vectors in the memory range of $FFC0 to $FFDF.
Definition: Subroutine.cpp:24
ComSquare::Cartridge::Cartridge
Contains the rom's memory/instructions.
Definition: Cartridge.hpp:78
ComSquare::APU::APU::_registers
Registers _registers
All the registers of the APU CPU.
Definition: APU.hpp:141
ComSquare::APU::APU::getValueName
std::string getValueName(uint24_t addr) const override
Get the name of the data at the address.
Definition: DecimalCompensation.cpp:34
ComSquare::APU::APU::operator=
APU & operator=(const APU &)=delete
ComSquare::Renderer::IRenderer
Definition: IRenderer.hpp:15
ComSquare::APU::APU::EI
int EI()
Enable interrupts instruction, Set Zero flag to 1.
Definition: ProgramStatusWord.cpp:46
ComSquare::APU::APU::_getAbsoluteDirectByXAddr
uint24_t _getAbsoluteDirectByXAddr()
Get absolute offset of the direct page added to the X Index Flag.
Definition: Operand.cpp:104
ComSquare::APU::APU::SETC
int SETC()
Set Carry instruction, Set Carry flag to 1.
Definition: ProgramStatusWord.cpp:15
DSP.hpp
ComSquare::APU::MemoryMap::Memory
Ram::Ram Memory
Any-use memory.
Definition: APU.hpp:128
ComSquare::APU::APU::DECW
int DECW(uint24_t addr)
Decrement a word value.
Definition: 16bitArithmetic.cpp:21
ComSquare::APU::Running
@ Running
Definition: APU.hpp:116
ComSquare::APU::APU::EOR
int EOR(uint24_t operand1, uint24_t operand2, int cycles)
Perform an Exclusive OR.
Definition: 8bitLogical.cpp:41
ComSquare::APU::APU::_paddingCycles
unsigned int _paddingCycles
Keep the number of excess cycles executed to pad the next update.
Definition: APU.hpp:167
ComSquare::APU::APU::CBNE
int CBNE(uint24_t addr, int8_t offset, bool by_x=false)
Branch if the value at the specified address is not equal to the Accumulator Flag.
Definition: ProgramFlow.cpp:99
ComSquare::APU::Registers::counter2
uint8_t counter2
Counter-2 register.
Definition: APU.hpp:110
ComSquare::APU::APU::write
void write(uint24_t addr, uint8_t data) override
Write data to the APU ram.
Definition: APU.cpp:145
ComSquare::APU::InternalRegisters::h
bool h
Half carry flag.
Definition: APU.hpp:59
ComSquare::APU::APU
Definition: APU.hpp:138
ComSquare::APU::APU::BRK
int BRK()
Cause a software interrupt.
Definition: Subroutine.cpp:30
ComSquare::APU::Registers
Definition: APU.hpp:73
ComSquare::APU::InternalRegisters::p
bool p
Direct page flag.
Definition: APU.hpp:63
ComSquare::APU::APU::_state
StateMode _state
Current state of APU CPU.
Definition: APU.hpp:164
ComSquare::APU::APU::PCALL
int PCALL()
Perform a call in the upper page of memory, read PC Register and add 0xFF00 to it.
Definition: Subroutine.cpp:18
ComSquare::APU::APU::BBS
int BBS(uint24_t addr, int8_t offset, uint8_t bit)
Branch if the specified is set in the address, go to the specified location from the next instruction...
Definition: ProgramFlow.cpp:79
ComSquare::APU::InternalRegisters::a
uint8_t a
The Accumulator register.
Definition: APU.hpp:30
ComSquare::APU::DSP::DSP
Definition: DSP.hpp:215
ComSquare::APU::MemoryMap
Definition: APU.hpp:121
ComSquare::APU::APU::CLRP
int CLRP()
Clear Direct Page instruction, Set Direct Page flag to 0.
Definition: ProgramStatusWord.cpp:34
ComSquare::APU::APU::POP
int POP(uint8_t &destination)
Increment SP Register and pop a single value from the stack.
Definition: Stack.cpp:15
ComSquare::APU::APU::BVS
int BVS(int8_t offset)
Branch if Overflow Flag is set.
Definition: ProgramFlow.cpp:47
ComSquare::APU::InternalRegisters::i
bool i
Interrupt enabled flag.
Definition: APU.hpp:57
ComSquare::APU::APU::_getDirectAddr
uint24_t _getDirectAddr()
Get direct page offset.
Definition: Operand.cpp:15
ComSquare::APU::Registers::timer1
uint8_t timer1
Timer-1 register.
Definition: APU.hpp:101
ComSquare::APU::APU::ADCacc
int ADCacc(uint24_t addr, int cycles)
!
Definition: 8bitArithmetic.cpp:23
ComSquare::APU::APU::_executeInstruction
int _executeInstruction()
Execute a single instruction.
Definition: APU.cpp:184
ComSquare::APU::APU::_getAbsoluteBit
std::pair< uint24_t, uint24_t > _getAbsoluteBit()
Get absolute offset and separate its bits.
Definition: Operand.cpp:92
ComSquare::APU::APU::DAA
int DAA()
Decimal adjust A for addition.
Definition: DecimalCompensation.cpp:9
ComSquare::APU::APU::_map
MemoryMap _map
Internal APU memory separated according to their utility.
Definition: APU.hpp:146
ComSquare::Debugger::APU::APUDebug
Definition: APUDebug.hpp:54
ComSquare::APU::APU::DI
int DI()
Disable interrupts instruction, Set Zero flag to 0.
Definition: ProgramStatusWord.cpp:52
Ram.hpp
ComSquare::APU::InternalRegisters::pc
uint16_t pc
Definition: APU.hpp:46
ComSquare::APU::InternalRegisters::pch
uint8_t pch
Definition: APU.hpp:44
ComSquare::APU::APU::BRA
int BRA(int8_t offset)
Branch Always, go to the specified location from the next instruction.
Definition: ProgramFlow.cpp:9
ComSquare::APU::APU::ROR
int ROR(uint24_t operand, int cycles, bool accumulator=false)
Rotate Bits Right.
Definition: 8bitShiftRotation.cpp:52
ComSquare::APU::Registers::dspregAddr
uint8_t dspregAddr
DSP Register Address register.
Definition: APU.hpp:82
ComSquare::APU::APU::TSET1
int TSET1(uint24_t abs)
test set 1-bit instruction, Test and set bits with absolute address
Definition: Bit.cpp:26
ComSquare::APU::Registers::timer0
uint8_t timer0
Timer-0 register.
Definition: APU.hpp:99
ComSquare::APU::APU::BPL
int BPL(int8_t offset)
Branch if Negative Flag is clear.
Definition: ProgramFlow.cpp:71
IPL.hpp
ComSquare::APU::APU::BMI
int BMI(int8_t offset)
Branch if Negative Flag is set.
Definition: ProgramFlow.cpp:63
IRenderer.hpp
ComSquare::APU::APU::MOV
int MOV(uint8_t &regFrom, uint8_t &regTo, bool setFlags=true)
Definition: 8bitDataTransmission.cpp:27
ComSquare::APU::Sleeping
@ Sleeping
Definition: APU.hpp:117