mirror of
https://github.com/zoriya/abyss.git
synced 2026-08-15 18:44:47 +00:00
Fix nets
This commit is contained in:
+6
-2
@@ -67,7 +67,7 @@ points:
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key.height: 1.5kx
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rows:
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cluster:
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row_net: R4
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row_net: R3
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outlines:
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raw:
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- what: rectangle
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@@ -168,7 +168,7 @@ pcbs:
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P19: 'C2' # Column Middle
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P18: 'C3' # Column Index
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P15: 'C4' # Column Inner
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P14: 'F14' # Free
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P14: 'C5' # Column Thumb
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P16: 'F16' # Free, but could be Encoder 1
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P10: 'F10' # Free, but could be Encoder 2
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where:
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@@ -204,3 +204,7 @@ pcbs:
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where:
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ref: matrix_middle_top
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shift: [3.5kx + 2px, -2.7ky]
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cases:
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bottom:
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- name: board
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extrude: 3
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+174
-178
@@ -118,50 +118,48 @@
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(net 23 "R0")
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(net 24 "R1")
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(net 25 "R2")
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(net 26 "R4")
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(net 26 "R3")
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(net 27 "RAW")
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(net 28 "GND")
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(net 29 "RST")
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(net 30 "VCC")
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(net 31 "F14")
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(net 32 "F16")
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(net 33 "F10")
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(net 34 "DPC")
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(net 35 "DPD")
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(net 36 "F0")
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(net 37 "F1")
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(net 38 "R3")
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(net 39 "F8")
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(net 40 "DPE")
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(net 41 "MCU1_24")
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(net 42 "MCU1_1")
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(net 43 "MCU1_23")
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(net 44 "MCU1_2")
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(net 45 "MCU1_22")
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(net 46 "MCU1_3")
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(net 47 "MCU1_21")
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(net 48 "MCU1_4")
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(net 49 "MCU1_20")
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(net 50 "MCU1_5")
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(net 51 "MCU1_19")
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(net 52 "MCU1_6")
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(net 53 "MCU1_18")
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(net 54 "MCU1_7")
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(net 55 "MCU1_17")
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(net 56 "MCU1_8")
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(net 57 "MCU1_16")
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(net 58 "MCU1_9")
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(net 59 "MCU1_15")
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(net 60 "MCU1_10")
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(net 61 "MCU1_14")
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(net 62 "MCU1_11")
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(net 63 "MCU1_13")
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(net 64 "MCU1_12")
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(net 65 "DISP1_1")
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(net 66 "DISP1_2")
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(net 67 "DISP1_4")
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(net 68 "DISP1_5")
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(net 69 "BAT_P")
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(net 31 "F16")
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(net 32 "F10")
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(net 33 "DPC")
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(net 34 "DPD")
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(net 35 "F0")
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(net 36 "F1")
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(net 37 "F8")
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(net 38 "DPE")
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(net 39 "MCU1_24")
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(net 40 "MCU1_1")
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(net 41 "MCU1_23")
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(net 42 "MCU1_2")
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(net 43 "MCU1_22")
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(net 44 "MCU1_3")
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(net 45 "MCU1_21")
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(net 46 "MCU1_4")
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(net 47 "MCU1_20")
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(net 48 "MCU1_5")
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(net 49 "MCU1_19")
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(net 50 "MCU1_6")
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(net 51 "MCU1_18")
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(net 52 "MCU1_7")
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(net 53 "MCU1_17")
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(net 54 "MCU1_8")
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(net 55 "MCU1_16")
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(net 56 "MCU1_9")
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(net 57 "MCU1_15")
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(net 58 "MCU1_10")
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(net 59 "MCU1_14")
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(net 60 "MCU1_11")
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(net 61 "MCU1_13")
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(net 62 "MCU1_12")
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(net 63 "DISP1_1")
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(net 64 "DISP1_2")
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(net 65 "DISP1_4")
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(net 66 "DISP1_5")
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(net 67 "BAT_P")
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(net_class Default "This is the default net class."
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(clearance 0.2)
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@@ -196,19 +194,17 @@
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(add_net "R0")
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(add_net "R1")
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(add_net "R2")
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(add_net "R4")
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(add_net "R3")
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(add_net "RAW")
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(add_net "GND")
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(add_net "RST")
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(add_net "VCC")
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(add_net "F14")
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(add_net "F16")
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(add_net "F10")
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(add_net "DPC")
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(add_net "DPD")
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(add_net "F0")
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(add_net "F1")
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(add_net "R3")
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(add_net "F8")
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(add_net "DPE")
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(add_net "MCU1_24")
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@@ -1609,13 +1605,13 @@
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(fp_line (start -0.75 0) (end -0.35 0) (layer B.SilkS) (width 0.1))
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(pad 1 smd rect (at -1.65 0 0) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 26 "R4"))
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(pad 1 smd rect (at -1.65 0 0) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 26 "R3"))
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(pad 2 smd rect (at 1.65 0 0) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 19 "left_cluster"))
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(pad 1 smd rect (at -1.65 0 0) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 26 "R4"))
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(pad 1 smd rect (at -1.65 0 0) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 26 "R3"))
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(pad 2 smd rect (at 1.65 0 0) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 19 "left_cluster"))
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(pad 1 thru_hole rect (at -3.81 0 0) (size 1.778 1.778) (drill 0.9906) (layers *.Cu *.Mask) (net 26 "R4"))
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(pad 1 thru_hole rect (at -3.81 0 0) (size 1.778 1.778) (drill 0.9906) (layers *.Cu *.Mask) (net 26 "R3"))
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(pad 2 thru_hole circle (at 3.81 0 0) (size 1.905 1.905) (drill 0.9906) (layers *.Cu *.Mask) (net 19 "left_cluster"))
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)
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@@ -1648,13 +1644,13 @@
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(fp_line (start -0.75 0) (end -0.35 0) (layer B.SilkS) (width 0.1))
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(pad 1 smd rect (at -1.65 0 -15) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 26 "R4"))
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(pad 1 smd rect (at -1.65 0 -15) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 26 "R3"))
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(pad 2 smd rect (at 1.65 0 -15) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 20 "home_cluster"))
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(pad 1 smd rect (at -1.65 0 -15) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 26 "R4"))
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(pad 1 smd rect (at -1.65 0 -15) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 26 "R3"))
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(pad 2 smd rect (at 1.65 0 -15) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 20 "home_cluster"))
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(pad 1 thru_hole rect (at -3.81 0 -15) (size 1.778 1.778) (drill 0.9906) (layers *.Cu *.Mask) (net 26 "R4"))
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(pad 1 thru_hole rect (at -3.81 0 -15) (size 1.778 1.778) (drill 0.9906) (layers *.Cu *.Mask) (net 26 "R3"))
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(pad 2 thru_hole circle (at 3.81 0 -15) (size 1.905 1.905) (drill 0.9906) (layers *.Cu *.Mask) (net 20 "home_cluster"))
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)
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@@ -1687,13 +1683,13 @@
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(fp_line (start -0.75 0) (end -0.35 0) (layer B.SilkS) (width 0.1))
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(pad 1 smd rect (at -1.65 0 -30) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 26 "R4"))
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(pad 1 smd rect (at -1.65 0 -30) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 26 "R3"))
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(pad 2 smd rect (at 1.65 0 -30) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 22 "right_cluster"))
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(pad 1 smd rect (at -1.65 0 -30) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 26 "R4"))
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(pad 1 smd rect (at -1.65 0 -30) (size 0.9 1.2) (layers B.Cu B.Paste B.Mask) (net 26 "R3"))
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(pad 2 smd rect (at 1.65 0 -30) (size 0.9 1.2) (layers F.Cu F.Paste F.Mask) (net 22 "right_cluster"))
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(pad 1 thru_hole rect (at -3.81 0 -30) (size 1.778 1.778) (drill 0.9906) (layers *.Cu *.Mask) (net 26 "R4"))
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(pad 1 thru_hole rect (at -3.81 0 -30) (size 1.778 1.778) (drill 0.9906) (layers *.Cu *.Mask) (net 26 "R3"))
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(pad 2 thru_hole circle (at 3.81 0 -30) (size 1.905 1.905) (drill 0.9906) (layers *.Cu *.Mask) (net 22 "right_cluster"))
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)
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@@ -1754,15 +1750,15 @@
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(pad 24 thru_hole circle (at -7.62 -12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 41 "MCU1_24"))
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(pad 1 thru_hole circle (at 7.62 -12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 42 "MCU1_1"))
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(pad 24 thru_hole circle (at -7.62 -12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 39 "MCU1_24"))
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(pad 1 thru_hole circle (at 7.62 -12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 40 "MCU1_1"))
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(pad 124 thru_hole circle (at -3.262 -12.7) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 34 "DPC"))
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(pad 124 thru_hole circle (at -3.262 -12.7) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 33 "DPC"))
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(pad 1 thru_hole circle (at 3.262 -12.7) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 27 "RAW"))
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(pad 24 smd custom (at -5.5 -12.7) (size 0.2 0.2) (layers F.Cu F.Mask) (net 41 "MCU1_24")
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(pad 24 smd custom (at -5.5 -12.7) (size 0.2 0.2) (layers F.Cu F.Mask) (net 39 "MCU1_24")
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(zone_connect 2)
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(options (clearance outline) (anchor rect))
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(primitives
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@@ -1770,7 +1766,7 @@
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(xy -0.5 -0.625) (xy -0.25 -0.625) (xy 0.25 0) (xy -0.25 0.625) (xy -0.5 0.625)
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) (width 0))
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||||
))
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(pad 124 smd custom (at -4.775 -12.7) (size 0.2 0.2) (layers F.Cu F.Mask) (net 34 "DPC")
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(pad 124 smd custom (at -4.775 -12.7) (size 0.2 0.2) (layers F.Cu F.Mask) (net 33 "DPC")
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(zone_connect 2)
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(options (clearance outline) (anchor rect))
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(primitives
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@@ -1788,7 +1784,7 @@
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(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
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||||
) (width 0))
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||||
))
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(pad 1 smd custom (at 5.5 -12.7 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 42 "MCU1_1")
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||||
(pad 1 smd custom (at 5.5 -12.7 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 40 "MCU1_1")
|
||||
(zone_connect 2)
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(options (clearance outline) (anchor rect))
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(primitives
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||||
@@ -1798,7 +1794,7 @@
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||||
))
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(pad 24 smd custom (at -5.5 -12.7) (size 0.2 0.2) (layers B.Cu B.Mask) (net 41 "MCU1_24")
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||||
(pad 24 smd custom (at -5.5 -12.7) (size 0.2 0.2) (layers B.Cu B.Mask) (net 39 "MCU1_24")
|
||||
(zone_connect 2)
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||||
(options (clearance outline) (anchor rect))
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||||
(primitives
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||||
@@ -1817,7 +1813,7 @@
|
||||
))
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||||
|
||||
|
||||
(pad 124 smd custom (at 4.775 -12.7 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 34 "DPC")
|
||||
(pad 124 smd custom (at 4.775 -12.7 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 33 "DPC")
|
||||
(zone_connect 2)
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||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
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||||
@@ -1825,7 +1821,7 @@
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||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 1 smd custom (at 5.5 -12.7 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 42 "MCU1_1")
|
||||
(pad 1 smd custom (at 5.5 -12.7 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 40 "MCU1_1")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
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||||
@@ -1868,15 +1864,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 23 thru_hole circle (at -7.62 -10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 43 "MCU1_23"))
|
||||
(pad 2 thru_hole circle (at 7.62 -10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 44 "MCU1_2"))
|
||||
(pad 23 thru_hole circle (at -7.62 -10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 41 "MCU1_23"))
|
||||
(pad 2 thru_hole circle (at 7.62 -10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 42 "MCU1_2"))
|
||||
|
||||
|
||||
(pad 123 thru_hole circle (at -3.262 -10.16) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 35 "DPD"))
|
||||
(pad 123 thru_hole circle (at -3.262 -10.16) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 34 "DPD"))
|
||||
(pad 2 thru_hole circle (at 3.262 -10.16) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 28 "GND"))
|
||||
|
||||
|
||||
(pad 23 smd custom (at -5.5 -10.16) (size 0.2 0.2) (layers F.Cu F.Mask) (net 43 "MCU1_23")
|
||||
(pad 23 smd custom (at -5.5 -10.16) (size 0.2 0.2) (layers F.Cu F.Mask) (net 41 "MCU1_23")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -1884,7 +1880,7 @@
|
||||
(xy -0.5 -0.625) (xy -0.25 -0.625) (xy 0.25 0) (xy -0.25 0.625) (xy -0.5 0.625)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 123 smd custom (at -4.775 -10.16) (size 0.2 0.2) (layers F.Cu F.Mask) (net 35 "DPD")
|
||||
(pad 123 smd custom (at -4.775 -10.16) (size 0.2 0.2) (layers F.Cu F.Mask) (net 34 "DPD")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -1902,7 +1898,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 2 smd custom (at 5.5 -10.16 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 44 "MCU1_2")
|
||||
(pad 2 smd custom (at 5.5 -10.16 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 42 "MCU1_2")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -1912,7 +1908,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 23 smd custom (at -5.5 -10.16) (size 0.2 0.2) (layers B.Cu B.Mask) (net 43 "MCU1_23")
|
||||
(pad 23 smd custom (at -5.5 -10.16) (size 0.2 0.2) (layers B.Cu B.Mask) (net 41 "MCU1_23")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -1931,7 +1927,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 123 smd custom (at 4.775 -10.16 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 35 "DPD")
|
||||
(pad 123 smd custom (at 4.775 -10.16 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 34 "DPD")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -1939,7 +1935,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 2 smd custom (at 5.5 -10.16 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 44 "MCU1_2")
|
||||
(pad 2 smd custom (at 5.5 -10.16 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 42 "MCU1_2")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -1982,15 +1978,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 22 thru_hole circle (at -7.62 -7.619999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 45 "MCU1_22"))
|
||||
(pad 3 thru_hole circle (at 7.62 -7.619999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 46 "MCU1_3"))
|
||||
(pad 22 thru_hole circle (at -7.62 -7.619999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 43 "MCU1_22"))
|
||||
(pad 3 thru_hole circle (at 7.62 -7.619999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 44 "MCU1_3"))
|
||||
|
||||
|
||||
(pad 122 thru_hole circle (at -3.262 -7.619999999999999) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 28 "GND"))
|
||||
(pad 3 thru_hole circle (at 3.262 -7.619999999999999) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 29 "RST"))
|
||||
|
||||
|
||||
(pad 22 smd custom (at -5.5 -7.619999999999999) (size 0.2 0.2) (layers F.Cu F.Mask) (net 45 "MCU1_22")
|
||||
(pad 22 smd custom (at -5.5 -7.619999999999999) (size 0.2 0.2) (layers F.Cu F.Mask) (net 43 "MCU1_22")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2016,7 +2012,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 3 smd custom (at 5.5 -7.619999999999999 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 46 "MCU1_3")
|
||||
(pad 3 smd custom (at 5.5 -7.619999999999999 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 44 "MCU1_3")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2026,7 +2022,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 22 smd custom (at -5.5 -7.619999999999999) (size 0.2 0.2) (layers B.Cu B.Mask) (net 45 "MCU1_22")
|
||||
(pad 22 smd custom (at -5.5 -7.619999999999999) (size 0.2 0.2) (layers B.Cu B.Mask) (net 43 "MCU1_22")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2053,7 +2049,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 3 smd custom (at 5.5 -7.619999999999999 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 46 "MCU1_3")
|
||||
(pad 3 smd custom (at 5.5 -7.619999999999999 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 44 "MCU1_3")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2096,15 +2092,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 21 thru_hole circle (at -7.62 -5.079999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 47 "MCU1_21"))
|
||||
(pad 4 thru_hole circle (at 7.62 -5.079999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 48 "MCU1_4"))
|
||||
(pad 21 thru_hole circle (at -7.62 -5.079999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 45 "MCU1_21"))
|
||||
(pad 4 thru_hole circle (at 7.62 -5.079999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 46 "MCU1_4"))
|
||||
|
||||
|
||||
(pad 121 thru_hole circle (at -3.262 -5.079999999999999) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 28 "GND"))
|
||||
(pad 4 thru_hole circle (at 3.262 -5.079999999999999) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 30 "VCC"))
|
||||
|
||||
|
||||
(pad 21 smd custom (at -5.5 -5.079999999999999) (size 0.2 0.2) (layers F.Cu F.Mask) (net 47 "MCU1_21")
|
||||
(pad 21 smd custom (at -5.5 -5.079999999999999) (size 0.2 0.2) (layers F.Cu F.Mask) (net 45 "MCU1_21")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2130,7 +2126,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 4 smd custom (at 5.5 -5.079999999999999 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 48 "MCU1_4")
|
||||
(pad 4 smd custom (at 5.5 -5.079999999999999 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 46 "MCU1_4")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2140,7 +2136,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 21 smd custom (at -5.5 -5.079999999999999) (size 0.2 0.2) (layers B.Cu B.Mask) (net 47 "MCU1_21")
|
||||
(pad 21 smd custom (at -5.5 -5.079999999999999) (size 0.2 0.2) (layers B.Cu B.Mask) (net 45 "MCU1_21")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2167,7 +2163,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 4 smd custom (at 5.5 -5.079999999999999 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 48 "MCU1_4")
|
||||
(pad 4 smd custom (at 5.5 -5.079999999999999 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 46 "MCU1_4")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2210,15 +2206,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 20 thru_hole circle (at -7.62 -2.539999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 49 "MCU1_20"))
|
||||
(pad 5 thru_hole circle (at 7.62 -2.539999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 50 "MCU1_5"))
|
||||
(pad 20 thru_hole circle (at -7.62 -2.539999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 47 "MCU1_20"))
|
||||
(pad 5 thru_hole circle (at 7.62 -2.539999999999999) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 48 "MCU1_5"))
|
||||
|
||||
|
||||
(pad 120 thru_hole circle (at -3.262 -2.539999999999999) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 36 "F0"))
|
||||
(pad 120 thru_hole circle (at -3.262 -2.539999999999999) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 35 "F0"))
|
||||
(pad 5 thru_hole circle (at 3.262 -2.539999999999999) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 1 "C0"))
|
||||
|
||||
|
||||
(pad 20 smd custom (at -5.5 -2.539999999999999) (size 0.2 0.2) (layers F.Cu F.Mask) (net 49 "MCU1_20")
|
||||
(pad 20 smd custom (at -5.5 -2.539999999999999) (size 0.2 0.2) (layers F.Cu F.Mask) (net 47 "MCU1_20")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2226,7 +2222,7 @@
|
||||
(xy -0.5 -0.625) (xy -0.25 -0.625) (xy 0.25 0) (xy -0.25 0.625) (xy -0.5 0.625)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 120 smd custom (at -4.775 -2.539999999999999) (size 0.2 0.2) (layers F.Cu F.Mask) (net 36 "F0")
|
||||
(pad 120 smd custom (at -4.775 -2.539999999999999) (size 0.2 0.2) (layers F.Cu F.Mask) (net 35 "F0")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2244,7 +2240,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 5 smd custom (at 5.5 -2.539999999999999 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 50 "MCU1_5")
|
||||
(pad 5 smd custom (at 5.5 -2.539999999999999 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 48 "MCU1_5")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2254,7 +2250,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 20 smd custom (at -5.5 -2.539999999999999) (size 0.2 0.2) (layers B.Cu B.Mask) (net 49 "MCU1_20")
|
||||
(pad 20 smd custom (at -5.5 -2.539999999999999) (size 0.2 0.2) (layers B.Cu B.Mask) (net 47 "MCU1_20")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2273,7 +2269,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 120 smd custom (at 4.775 -2.539999999999999 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 36 "F0")
|
||||
(pad 120 smd custom (at 4.775 -2.539999999999999 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 35 "F0")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2281,7 +2277,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 5 smd custom (at 5.5 -2.539999999999999 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 50 "MCU1_5")
|
||||
(pad 5 smd custom (at 5.5 -2.539999999999999 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 48 "MCU1_5")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2324,15 +2320,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 19 thru_hole circle (at -7.62 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 51 "MCU1_19"))
|
||||
(pad 6 thru_hole circle (at 7.62 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 52 "MCU1_6"))
|
||||
(pad 19 thru_hole circle (at -7.62 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 49 "MCU1_19"))
|
||||
(pad 6 thru_hole circle (at 7.62 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 50 "MCU1_6"))
|
||||
|
||||
|
||||
(pad 119 thru_hole circle (at -3.262 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 37 "F1"))
|
||||
(pad 119 thru_hole circle (at -3.262 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 36 "F1"))
|
||||
(pad 6 thru_hole circle (at 3.262 0) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 4 "C1"))
|
||||
|
||||
|
||||
(pad 19 smd custom (at -5.5 0) (size 0.2 0.2) (layers F.Cu F.Mask) (net 51 "MCU1_19")
|
||||
(pad 19 smd custom (at -5.5 0) (size 0.2 0.2) (layers F.Cu F.Mask) (net 49 "MCU1_19")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2340,7 +2336,7 @@
|
||||
(xy -0.5 -0.625) (xy -0.25 -0.625) (xy 0.25 0) (xy -0.25 0.625) (xy -0.5 0.625)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 119 smd custom (at -4.775 0) (size 0.2 0.2) (layers F.Cu F.Mask) (net 37 "F1")
|
||||
(pad 119 smd custom (at -4.775 0) (size 0.2 0.2) (layers F.Cu F.Mask) (net 36 "F1")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2358,7 +2354,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 6 smd custom (at 5.5 0 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 52 "MCU1_6")
|
||||
(pad 6 smd custom (at 5.5 0 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 50 "MCU1_6")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2368,7 +2364,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 19 smd custom (at -5.5 0) (size 0.2 0.2) (layers B.Cu B.Mask) (net 51 "MCU1_19")
|
||||
(pad 19 smd custom (at -5.5 0) (size 0.2 0.2) (layers B.Cu B.Mask) (net 49 "MCU1_19")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2387,7 +2383,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 119 smd custom (at 4.775 0 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 37 "F1")
|
||||
(pad 119 smd custom (at 4.775 0 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 36 "F1")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2395,7 +2391,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 6 smd custom (at 5.5 0 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 52 "MCU1_6")
|
||||
(pad 6 smd custom (at 5.5 0 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 50 "MCU1_6")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2438,15 +2434,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 18 thru_hole circle (at -7.62 2.540000000000001) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 53 "MCU1_18"))
|
||||
(pad 7 thru_hole circle (at 7.62 2.540000000000001) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 54 "MCU1_7"))
|
||||
(pad 18 thru_hole circle (at -7.62 2.540000000000001) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 51 "MCU1_18"))
|
||||
(pad 7 thru_hole circle (at 7.62 2.540000000000001) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 52 "MCU1_7"))
|
||||
|
||||
|
||||
(pad 118 thru_hole circle (at -3.262 2.540000000000001) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 23 "R0"))
|
||||
(pad 7 thru_hole circle (at 3.262 2.540000000000001) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 8 "C2"))
|
||||
|
||||
|
||||
(pad 18 smd custom (at -5.5 2.540000000000001) (size 0.2 0.2) (layers F.Cu F.Mask) (net 53 "MCU1_18")
|
||||
(pad 18 smd custom (at -5.5 2.540000000000001) (size 0.2 0.2) (layers F.Cu F.Mask) (net 51 "MCU1_18")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2472,7 +2468,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 7 smd custom (at 5.5 2.540000000000001 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 54 "MCU1_7")
|
||||
(pad 7 smd custom (at 5.5 2.540000000000001 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 52 "MCU1_7")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2482,7 +2478,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 18 smd custom (at -5.5 2.540000000000001) (size 0.2 0.2) (layers B.Cu B.Mask) (net 53 "MCU1_18")
|
||||
(pad 18 smd custom (at -5.5 2.540000000000001) (size 0.2 0.2) (layers B.Cu B.Mask) (net 51 "MCU1_18")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2509,7 +2505,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 7 smd custom (at 5.5 2.540000000000001 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 54 "MCU1_7")
|
||||
(pad 7 smd custom (at 5.5 2.540000000000001 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 52 "MCU1_7")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2552,15 +2548,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 17 thru_hole circle (at -7.62 5.080000000000002) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 55 "MCU1_17"))
|
||||
(pad 8 thru_hole circle (at 7.62 5.080000000000002) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 56 "MCU1_8"))
|
||||
(pad 17 thru_hole circle (at -7.62 5.080000000000002) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 53 "MCU1_17"))
|
||||
(pad 8 thru_hole circle (at 7.62 5.080000000000002) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 54 "MCU1_8"))
|
||||
|
||||
|
||||
(pad 117 thru_hole circle (at -3.262 5.080000000000002) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 24 "R1"))
|
||||
(pad 8 thru_hole circle (at 3.262 5.080000000000002) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 12 "C3"))
|
||||
|
||||
|
||||
(pad 17 smd custom (at -5.5 5.080000000000002) (size 0.2 0.2) (layers F.Cu F.Mask) (net 55 "MCU1_17")
|
||||
(pad 17 smd custom (at -5.5 5.080000000000002) (size 0.2 0.2) (layers F.Cu F.Mask) (net 53 "MCU1_17")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2586,7 +2582,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
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|
||||
(pad 8 smd custom (at 5.5 5.080000000000002 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 56 "MCU1_8")
|
||||
(pad 8 smd custom (at 5.5 5.080000000000002 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 54 "MCU1_8")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2596,7 +2592,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 17 smd custom (at -5.5 5.080000000000002) (size 0.2 0.2) (layers B.Cu B.Mask) (net 55 "MCU1_17")
|
||||
(pad 17 smd custom (at -5.5 5.080000000000002) (size 0.2 0.2) (layers B.Cu B.Mask) (net 53 "MCU1_17")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2623,7 +2619,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 8 smd custom (at 5.5 5.080000000000002 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 56 "MCU1_8")
|
||||
(pad 8 smd custom (at 5.5 5.080000000000002 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 54 "MCU1_8")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2666,15 +2662,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 16 thru_hole circle (at -7.62 7.620000000000001) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 57 "MCU1_16"))
|
||||
(pad 9 thru_hole circle (at 7.62 7.620000000000001) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 58 "MCU1_9"))
|
||||
(pad 16 thru_hole circle (at -7.62 7.620000000000001) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 55 "MCU1_16"))
|
||||
(pad 9 thru_hole circle (at 7.62 7.620000000000001) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 56 "MCU1_9"))
|
||||
|
||||
|
||||
(pad 116 thru_hole circle (at -3.262 7.620000000000001) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 25 "R2"))
|
||||
(pad 9 thru_hole circle (at 3.262 7.620000000000001) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 16 "C4"))
|
||||
|
||||
|
||||
(pad 16 smd custom (at -5.5 7.620000000000001) (size 0.2 0.2) (layers F.Cu F.Mask) (net 57 "MCU1_16")
|
||||
(pad 16 smd custom (at -5.5 7.620000000000001) (size 0.2 0.2) (layers F.Cu F.Mask) (net 55 "MCU1_16")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2700,7 +2696,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 9 smd custom (at 5.5 7.620000000000001 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 58 "MCU1_9")
|
||||
(pad 9 smd custom (at 5.5 7.620000000000001 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 56 "MCU1_9")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2710,7 +2706,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 16 smd custom (at -5.5 7.620000000000001) (size 0.2 0.2) (layers B.Cu B.Mask) (net 57 "MCU1_16")
|
||||
(pad 16 smd custom (at -5.5 7.620000000000001) (size 0.2 0.2) (layers B.Cu B.Mask) (net 55 "MCU1_16")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2737,7 +2733,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 9 smd custom (at 5.5 7.620000000000001 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 58 "MCU1_9")
|
||||
(pad 9 smd custom (at 5.5 7.620000000000001 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 56 "MCU1_9")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2780,15 +2776,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 15 thru_hole circle (at -7.62 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 59 "MCU1_15"))
|
||||
(pad 10 thru_hole circle (at 7.62 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 60 "MCU1_10"))
|
||||
(pad 15 thru_hole circle (at -7.62 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 57 "MCU1_15"))
|
||||
(pad 10 thru_hole circle (at 7.62 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 58 "MCU1_10"))
|
||||
|
||||
|
||||
(pad 115 thru_hole circle (at -3.262 10.16) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 38 "R3"))
|
||||
(pad 10 thru_hole circle (at 3.262 10.16) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 31 "F14"))
|
||||
(pad 115 thru_hole circle (at -3.262 10.16) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 26 "R3"))
|
||||
(pad 10 thru_hole circle (at 3.262 10.16) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 21 "C5"))
|
||||
|
||||
|
||||
(pad 15 smd custom (at -5.5 10.16) (size 0.2 0.2) (layers F.Cu F.Mask) (net 59 "MCU1_15")
|
||||
(pad 15 smd custom (at -5.5 10.16) (size 0.2 0.2) (layers F.Cu F.Mask) (net 57 "MCU1_15")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2796,7 +2792,7 @@
|
||||
(xy -0.5 -0.625) (xy -0.25 -0.625) (xy 0.25 0) (xy -0.25 0.625) (xy -0.5 0.625)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 115 smd custom (at -4.775 10.16) (size 0.2 0.2) (layers F.Cu F.Mask) (net 38 "R3")
|
||||
(pad 115 smd custom (at -4.775 10.16) (size 0.2 0.2) (layers F.Cu F.Mask) (net 26 "R3")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2806,7 +2802,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 10 smd custom (at 4.775 10.16 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 31 "F14")
|
||||
(pad 10 smd custom (at 4.775 10.16 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 21 "C5")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2814,7 +2810,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 10 smd custom (at 5.5 10.16 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 60 "MCU1_10")
|
||||
(pad 10 smd custom (at 5.5 10.16 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 58 "MCU1_10")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2824,7 +2820,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 15 smd custom (at -5.5 10.16) (size 0.2 0.2) (layers B.Cu B.Mask) (net 59 "MCU1_15")
|
||||
(pad 15 smd custom (at -5.5 10.16) (size 0.2 0.2) (layers B.Cu B.Mask) (net 57 "MCU1_15")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2833,7 +2829,7 @@
|
||||
) (width 0))
|
||||
))
|
||||
|
||||
(pad 10 smd custom (at -4.775 10.16) (size 0.2 0.2) (layers B.Cu B.Mask) (net 31 "F14")
|
||||
(pad 10 smd custom (at -4.775 10.16) (size 0.2 0.2) (layers B.Cu B.Mask) (net 21 "C5")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2843,7 +2839,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 115 smd custom (at 4.775 10.16 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 38 "R3")
|
||||
(pad 115 smd custom (at 4.775 10.16 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 26 "R3")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2851,7 +2847,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 10 smd custom (at 5.5 10.16 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 60 "MCU1_10")
|
||||
(pad 10 smd custom (at 5.5 10.16 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 58 "MCU1_10")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2862,7 +2858,7 @@
|
||||
|
||||
|
||||
|
||||
(fp_text user F14 (at -3 10.16) (layer F.SilkS)
|
||||
(fp_text user C5 (at -3 10.16) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify left))
|
||||
)
|
||||
(fp_text user R3 (at 3 10.16) (layer F.SilkS)
|
||||
@@ -2873,7 +2869,7 @@
|
||||
(fp_text user R3 (at -3 10.16 180) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify right mirror))
|
||||
)
|
||||
(fp_text user F14 (at 3 10.16 180) (layer B.SilkS)
|
||||
(fp_text user C5 (at 3 10.16 180) (layer B.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)) (justify left mirror))
|
||||
)
|
||||
|
||||
@@ -2881,7 +2877,7 @@
|
||||
(fp_text user R3 (at -3.262 9.36) (layer F.Fab)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.08)))
|
||||
)
|
||||
(fp_text user F14 (at 3.262 9.36) (layer F.Fab)
|
||||
(fp_text user C5 (at 3.262 9.36) (layer F.Fab)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.08)))
|
||||
)
|
||||
|
||||
@@ -2889,20 +2885,20 @@
|
||||
(fp_text user R3 (at -3.262 9.36 180) (layer B.Fab)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.08)) (justify mirror))
|
||||
)
|
||||
(fp_text user F14 (at 3.262 9.36 180) (layer B.Fab)
|
||||
(fp_text user C5 (at 3.262 9.36 180) (layer B.Fab)
|
||||
(effects (font (size 0.5 0.5) (thickness 0.08)) (justify mirror))
|
||||
)
|
||||
|
||||
|
||||
(pad 14 thru_hole circle (at -7.62 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 61 "MCU1_14"))
|
||||
(pad 11 thru_hole circle (at 7.62 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 62 "MCU1_11"))
|
||||
(pad 14 thru_hole circle (at -7.62 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 59 "MCU1_14"))
|
||||
(pad 11 thru_hole circle (at 7.62 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 60 "MCU1_11"))
|
||||
|
||||
|
||||
(pad 114 thru_hole circle (at -3.262 12.7) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 39 "F8"))
|
||||
(pad 11 thru_hole circle (at 3.262 12.7) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 32 "F16"))
|
||||
(pad 114 thru_hole circle (at -3.262 12.7) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 37 "F8"))
|
||||
(pad 11 thru_hole circle (at 3.262 12.7) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 31 "F16"))
|
||||
|
||||
|
||||
(pad 14 smd custom (at -5.5 12.7) (size 0.2 0.2) (layers F.Cu F.Mask) (net 61 "MCU1_14")
|
||||
(pad 14 smd custom (at -5.5 12.7) (size 0.2 0.2) (layers F.Cu F.Mask) (net 59 "MCU1_14")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2910,7 +2906,7 @@
|
||||
(xy -0.5 -0.625) (xy -0.25 -0.625) (xy 0.25 0) (xy -0.25 0.625) (xy -0.5 0.625)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 114 smd custom (at -4.775 12.7) (size 0.2 0.2) (layers F.Cu F.Mask) (net 39 "F8")
|
||||
(pad 114 smd custom (at -4.775 12.7) (size 0.2 0.2) (layers F.Cu F.Mask) (net 37 "F8")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2920,7 +2916,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 11 smd custom (at 4.775 12.7 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 32 "F16")
|
||||
(pad 11 smd custom (at 4.775 12.7 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 31 "F16")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2928,7 +2924,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 11 smd custom (at 5.5 12.7 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 62 "MCU1_11")
|
||||
(pad 11 smd custom (at 5.5 12.7 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 60 "MCU1_11")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2938,7 +2934,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 14 smd custom (at -5.5 12.7) (size 0.2 0.2) (layers B.Cu B.Mask) (net 61 "MCU1_14")
|
||||
(pad 14 smd custom (at -5.5 12.7) (size 0.2 0.2) (layers B.Cu B.Mask) (net 59 "MCU1_14")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2947,7 +2943,7 @@
|
||||
) (width 0))
|
||||
))
|
||||
|
||||
(pad 11 smd custom (at -4.775 12.7) (size 0.2 0.2) (layers B.Cu B.Mask) (net 32 "F16")
|
||||
(pad 11 smd custom (at -4.775 12.7) (size 0.2 0.2) (layers B.Cu B.Mask) (net 31 "F16")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2957,7 +2953,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 114 smd custom (at 4.775 12.7 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 39 "F8")
|
||||
(pad 114 smd custom (at 4.775 12.7 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 37 "F8")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -2965,7 +2961,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 11 smd custom (at 5.5 12.7 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 62 "MCU1_11")
|
||||
(pad 11 smd custom (at 5.5 12.7 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 60 "MCU1_11")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3008,15 +3004,15 @@
|
||||
)
|
||||
|
||||
|
||||
(pad 13 thru_hole circle (at -7.62 15.240000000000002) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 63 "MCU1_13"))
|
||||
(pad 12 thru_hole circle (at 7.62 15.240000000000002) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 64 "MCU1_12"))
|
||||
(pad 13 thru_hole circle (at -7.62 15.240000000000002) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 61 "MCU1_13"))
|
||||
(pad 12 thru_hole circle (at 7.62 15.240000000000002) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 62 "MCU1_12"))
|
||||
|
||||
|
||||
(pad 113 thru_hole circle (at -3.262 15.240000000000002) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 40 "DPE"))
|
||||
(pad 12 thru_hole circle (at 3.262 15.240000000000002) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 33 "F10"))
|
||||
(pad 113 thru_hole circle (at -3.262 15.240000000000002) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 38 "DPE"))
|
||||
(pad 12 thru_hole circle (at 3.262 15.240000000000002) (size 0.8 0.8) (drill 0.4) (layers *.Cu *.Mask) (net 32 "F10"))
|
||||
|
||||
|
||||
(pad 13 smd custom (at -5.5 15.240000000000002) (size 0.2 0.2) (layers F.Cu F.Mask) (net 63 "MCU1_13")
|
||||
(pad 13 smd custom (at -5.5 15.240000000000002) (size 0.2 0.2) (layers F.Cu F.Mask) (net 61 "MCU1_13")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3024,7 +3020,7 @@
|
||||
(xy -0.5 -0.625) (xy -0.25 -0.625) (xy 0.25 0) (xy -0.25 0.625) (xy -0.5 0.625)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 113 smd custom (at -4.775 15.240000000000002) (size 0.2 0.2) (layers F.Cu F.Mask) (net 40 "DPE")
|
||||
(pad 113 smd custom (at -4.775 15.240000000000002) (size 0.2 0.2) (layers F.Cu F.Mask) (net 38 "DPE")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3034,7 +3030,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 12 smd custom (at 4.775 15.240000000000002 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 33 "F10")
|
||||
(pad 12 smd custom (at 4.775 15.240000000000002 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 32 "F10")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3042,7 +3038,7 @@
|
||||
(xy -0.65 -0.625) (xy 0.5 -0.625) (xy 0.5 0.625) (xy -0.65 0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 12 smd custom (at 5.5 15.240000000000002 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 64 "MCU1_12")
|
||||
(pad 12 smd custom (at 5.5 15.240000000000002 180) (size 0.2 0.2) (layers F.Cu F.Mask) (net 62 "MCU1_12")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3052,7 +3048,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 13 smd custom (at -5.5 15.240000000000002) (size 0.2 0.2) (layers B.Cu B.Mask) (net 63 "MCU1_13")
|
||||
(pad 13 smd custom (at -5.5 15.240000000000002) (size 0.2 0.2) (layers B.Cu B.Mask) (net 61 "MCU1_13")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3061,7 +3057,7 @@
|
||||
) (width 0))
|
||||
))
|
||||
|
||||
(pad 12 smd custom (at -4.775 15.240000000000002) (size 0.2 0.2) (layers B.Cu B.Mask) (net 33 "F10")
|
||||
(pad 12 smd custom (at -4.775 15.240000000000002) (size 0.2 0.2) (layers B.Cu B.Mask) (net 32 "F10")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3071,7 +3067,7 @@
|
||||
))
|
||||
|
||||
|
||||
(pad 113 smd custom (at 4.775 15.240000000000002 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 40 "DPE")
|
||||
(pad 113 smd custom (at 4.775 15.240000000000002 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 38 "DPE")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3079,7 +3075,7 @@
|
||||
(xy -0.65 0.625) (xy 0.5 0.625) (xy 0.5 -0.625) (xy -0.65 -0.625) (xy -0.15 0)
|
||||
) (width 0))
|
||||
))
|
||||
(pad 12 smd custom (at 5.5 15.240000000000002 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 64 "MCU1_12")
|
||||
(pad 12 smd custom (at 5.5 15.240000000000002 180) (size 0.2 0.2) (layers B.Cu B.Mask) (net 62 "MCU1_12")
|
||||
(zone_connect 2)
|
||||
(options (clearance outline) (anchor rect))
|
||||
(primitives
|
||||
@@ -3449,15 +3445,15 @@
|
||||
(fp_line (start 4.23 20.6) (end 4.23 18.6) (layer F.Fab) (width 0.15))
|
||||
(fp_line (start 4.23 18.6) (end 5.93 18.6) (layer F.Fab) (width 0.15))
|
||||
|
||||
(pad 14 smd rect (at -5.08 19.15 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 65 "DISP1_1"))
|
||||
(pad 15 smd rect (at -2.54 19.15 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 66 "DISP1_2"))
|
||||
(pad 16 smd rect (at 2.54 19.15 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 67 "DISP1_4"))
|
||||
(pad 17 smd rect (at 5.08 19.15 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 68 "DISP1_5"))
|
||||
(pad 14 smd rect (at -5.08 19.15 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 63 "DISP1_1"))
|
||||
(pad 15 smd rect (at -2.54 19.15 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 64 "DISP1_2"))
|
||||
(pad 16 smd rect (at 2.54 19.15 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 65 "DISP1_4"))
|
||||
(pad 17 smd rect (at 5.08 19.15 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 66 "DISP1_5"))
|
||||
|
||||
(pad 10 smd rect (at -5.08 20.05 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 35 "DPD"))
|
||||
(pad 11 smd rect (at -2.54 20.05 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 34 "DPC"))
|
||||
(pad 10 smd rect (at -5.08 20.05 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 34 "DPD"))
|
||||
(pad 11 smd rect (at -2.54 20.05 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 33 "DPC"))
|
||||
(pad 12 smd rect (at 2.54 20.05 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 28 "GND"))
|
||||
(pad 13 smd rect (at 5.08 20.05 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 40 "DPE"))
|
||||
(pad 13 smd rect (at 5.08 20.05 90) (size 0.6 1.2) (layers F.Cu F.Mask) (net 38 "DPE"))
|
||||
|
||||
(fp_line (start -5.93 18.6) (end -5.93 20.6) (layer B.Fab) (width 0.15))
|
||||
(fp_line (start -5.93 20.6) (end -4.23 20.6) (layer B.Fab) (width 0.15))
|
||||
@@ -3476,15 +3472,15 @@
|
||||
(fp_line (start 5.93 18.6) (end 4.23 18.6) (layer B.Fab) (width 0.15))
|
||||
(fp_line (start 4.23 18.6) (end 4.23 20.6) (layer B.Fab) (width 0.15))
|
||||
|
||||
(pad 24 smd rect (at 5.08 19.15 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 68 "DISP1_5"))
|
||||
(pad 25 smd rect (at 2.54 19.15 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 67 "DISP1_4"))
|
||||
(pad 26 smd rect (at -2.54 19.15 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 66 "DISP1_2"))
|
||||
(pad 27 smd rect (at -5.08 19.15 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 65 "DISP1_1"))
|
||||
(pad 24 smd rect (at 5.08 19.15 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 66 "DISP1_5"))
|
||||
(pad 25 smd rect (at 2.54 19.15 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 65 "DISP1_4"))
|
||||
(pad 26 smd rect (at -2.54 19.15 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 64 "DISP1_2"))
|
||||
(pad 27 smd rect (at -5.08 19.15 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 63 "DISP1_1"))
|
||||
|
||||
(pad 20 smd rect (at 5.08 20.05 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 35 "DPD"))
|
||||
(pad 21 smd rect (at 2.54 20.05 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 34 "DPC"))
|
||||
(pad 20 smd rect (at 5.08 20.05 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 34 "DPD"))
|
||||
(pad 21 smd rect (at 2.54 20.05 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 33 "DPC"))
|
||||
(pad 22 smd rect (at -2.54 20.05 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 28 "GND"))
|
||||
(pad 23 smd rect (at -5.08 20.05 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 40 "DPE"))
|
||||
(pad 23 smd rect (at -5.08 20.05 270) (size 0.6 1.2) (layers B.Cu B.Mask) (net 38 "DPE"))
|
||||
|
||||
(fp_text user DA (at -5.08 21.299999999999997 0) (layer F.SilkS)
|
||||
(effects (font (size 1 0.7) (thickness 0.1)))
|
||||
@@ -3517,11 +3513,11 @@
|
||||
(effects (font (size 1 0.7) (thickness 0.1)) (justify mirror))
|
||||
)
|
||||
|
||||
(pad 1 thru_hole oval (at -5.08 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 65 "DISP1_1"))
|
||||
(pad 2 thru_hole oval (at -2.54 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 66 "DISP1_2"))
|
||||
(pad 1 thru_hole oval (at -5.08 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 63 "DISP1_1"))
|
||||
(pad 2 thru_hole oval (at -2.54 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 64 "DISP1_2"))
|
||||
(pad 3 thru_hole oval (at 0 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 30 "VCC"))
|
||||
(pad 4 thru_hole oval (at 2.54 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 67 "DISP1_4"))
|
||||
(pad 5 thru_hole circle (at 5.08 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 68 "DISP1_5"))
|
||||
(pad 4 thru_hole oval (at 2.54 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 65 "DISP1_4"))
|
||||
(pad 5 thru_hole circle (at 5.08 16.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask) (net 66 "DISP1_5"))
|
||||
|
||||
(fp_line (start 5.4 13.4) (end 5.4 -11.9) (layer Dwgs.User) (width 0.15))
|
||||
(fp_line (start -5.4 13.4) (end -5.4 -11.9) (layer Dwgs.User) (width 0.15))
|
||||
@@ -3627,7 +3623,7 @@
|
||||
(pad "" smd rect (at -1.085 -3.65 90) (size 1 0.8) (layers F.Cu F.Paste F.Mask))
|
||||
(pad "" smd rect (at -1.085 3.65 90) (size 1 0.8) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 1 smd rect (at -1.735 2.25 90) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 2 smd rect (at -1.735 -0.75 90) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) (net 69 "BAT_P"))
|
||||
(pad 2 smd rect (at -1.735 -0.75 90) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) (net 67 "BAT_P"))
|
||||
(pad 3 smd rect (at -1.735 -2.25 90) (size 0.7 1.5) (layers F.Cu F.Paste F.Mask) (net 27 "RAW"))
|
||||
(pad "" smd rect (at 1.125 3.65 90) (size 1 0.8) (layers F.Cu F.Paste F.Mask))
|
||||
|
||||
@@ -3663,7 +3659,7 @@
|
||||
(pad "" smd rect (at 1.125 -3.65 270) (size 1 0.8) (layers B.Cu B.Paste B.Mask))
|
||||
(pad 4 smd rect (at -1.735 2.25 270) (size 0.7 1.5) (layers B.Cu B.Paste B.Mask))
|
||||
(pad "" smd rect (at -1.085 3.65 270) (size 1 0.8) (layers B.Cu B.Paste B.Mask))
|
||||
(pad 5 smd rect (at -1.735 0.75 270) (size 0.7 1.5) (layers B.Cu B.Paste B.Mask) (net 69 "BAT_P"))
|
||||
(pad 5 smd rect (at -1.735 0.75 270) (size 0.7 1.5) (layers B.Cu B.Paste B.Mask) (net 67 "BAT_P"))
|
||||
(pad 6 smd rect (at -1.735 -2.25 270) (size 0.7 1.5) (layers B.Cu B.Paste B.Mask) (net 27 "RAW"))
|
||||
(pad "" smd rect (at 1.125 3.65 270) (size 1 0.8) (layers B.Cu B.Paste B.Mask))
|
||||
|
||||
|
||||
+1
-9
@@ -315,7 +315,7 @@
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "R4"
|
||||
"pattern": "R3"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
@@ -333,10 +333,6 @@
|
||||
"netclass": "Default",
|
||||
"pattern": "VCC"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "F14"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "F16"
|
||||
@@ -361,10 +357,6 @@
|
||||
"netclass": "Default",
|
||||
"pattern": "F1"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "R3"
|
||||
},
|
||||
{
|
||||
"netclass": "Default",
|
||||
"pattern": "F8"
|
||||
|
||||
Reference in New Issue
Block a user