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synced 2025-12-06 06:36:31 +00:00
Make a5 and a6 work
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@@ -343,7 +343,7 @@ const instruction_t extended[][8] = {
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{.opcode = 0x04, .extended = -2, .name = "shl %s, 1", .mode = {R_M8, END}, .exec = &shl},
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{.opcode = 0x05, .extended = -2, .name = "shr %s, 1", .mode = {R_M8, END}, .exec = NULL},
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/**/{.opcode = 0x06, .extended = -2, .name = "invalid", .mode = {END}, .exec = NULL},
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{.opcode = 0x07, .extended = -2, .name = "sar %s, 1", .mode = {R_M8, END}, .exec = NULL},
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{.opcode = 0x07, .extended = -2, .name = "sar %s, 1", .mode = {R_M8, END}, .exec = &sar},
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},
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// 0xd1 extended
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{
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@@ -354,7 +354,7 @@ const instruction_t extended[][8] = {
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{.opcode = 0x04, .extended = -2, .name = "shl %s, 1", .mode = {R_M16, END}, .exec = &shl},
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{.opcode = 0x05, .extended = -2, .name = "shr %s, 1", .mode = {R_M16, END}, .exec = NULL},
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/**/{.opcode = 0x06, .extended = -2, .name = "invalid", .mode = {END}, .exec = NULL},
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{.opcode = 0x07, .extended = -2, .name = "sar %s, 1", .mode = {R_M16, END}, .exec = NULL},
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{.opcode = 0x07, .extended = -2, .name = "sar %s, 1", .mode = {R_M16, END}, .exec = &sar},
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},
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// 0xd2 extended
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{
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@@ -365,7 +365,7 @@ const instruction_t extended[][8] = {
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{.opcode = 0x04, .extended = -2, .name = "shl %s, cl", .mode = {R_M8, END}, .exec = &shl},
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{.opcode = 0x05, .extended = -2, .name = "shr %s, cl", .mode = {R_M8, END}, .exec = NULL},
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/**/{.opcode = 0x06, .extended = -2, .name = "invalid", .mode = {END}, .exec = NULL},
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{.opcode = 0x07, .extended = -2, .name = "sar %s, cl", .mode = {R_M8, END}, .exec = NULL},
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{.opcode = 0x07, .extended = -2, .name = "sar %s, cl", .mode = {R_M8, END}, .exec = &sar},
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},
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// 0xd3 extended
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{
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@@ -376,7 +376,7 @@ const instruction_t extended[][8] = {
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{.opcode = 0x04, .extended = -2, .name = "shl %s, cl", .mode = {R_M16, END}, .exec = &shl},
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{.opcode = 0x05, .extended = -2, .name = "shr %s, cl", .mode = {R_M16, END}, .exec = NULL},
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/**/{.opcode = 0x06, .extended = -2, .name = "invalid", .mode = {END}, .exec = NULL},
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{.opcode = 0x07, .extended = -2, .name = "sar %s, cl", .mode = {R_M16, END}, .exec = NULL},
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{.opcode = 0x07, .extended = -2, .name = "sar %s, cl", .mode = {R_M16, END}, .exec = &sar},
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},
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};
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@@ -44,4 +44,5 @@ void cbw(const instruction_t *self, state_t *state);
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void cwd(const instruction_t *self, state_t *state);
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void neg(const instruction_t *self, state_t *state);
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void shl(const instruction_t *self, state_t *state);
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void sar(const instruction_t *self, state_t *state);
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void xchg(const instruction_t *self, state_t *state);
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@@ -201,11 +201,34 @@ void shl(const instruction_t *self, state_t *state)
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write_op(to, new);
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state->cf = value >> (8 - shft);
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state->of = new != read_op(to);
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state->cf = value >> (8 - shft) & 1;
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state->sf = new & (is_operand_wide(self, 0) ? 0x8000 : 0x80);
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state->zf = new == 0;
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}
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void sar(const instruction_t *self, state_t *state)
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{
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operand_t to = get_operand(self, 0, state);
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unsigned value = read_op(to);
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uint8_t opgrp =state->binary[state->pc];
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unsigned shft = (opgrp == 0xd0 || opgrp == 0xd1) ? 1 : state->cl;
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unsigned signMask = (is_operand_wide(self, 0) ? 0x8000 : 0x80);
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unsigned new = value >> shft;
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if (value & signMask)
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new |= signMask;
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else
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new &= ~signMask;
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write_op(to, new);
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state->cf = (value >> (shft - 1)) & 1;
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state->sf = value & signMask;
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state->zf = new == 0;
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}
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void xchg(const instruction_t *self, state_t *state)
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{
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operand_t from = get_operand(self, 0, state);
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