Adding absolute addresses

This commit is contained in:
AnonymusRaccoon
2020-02-11 11:32:50 +01:00
parent fc08e503c8
commit 3f45f99991
3 changed files with 66 additions and 0 deletions

View File

@@ -294,4 +294,28 @@ namespace ComSquare::CPU
dp += this->_registers.y; dp += this->_registers.y;
return dp; return dp;
} }
uint24_t CPU::_getAbsoluteIndexedByXAddr()
{
uint16_t abs = this->_bus->read(this->_registers.pac++);
abs += this->_bus->read(this->_registers.pac++) << 8u;
uint24_t effective = abs + (this->_registers.dbr << 16u);
return effective + this->_registers.x;
}
uint24_t CPU::_getAbsoluteIndexedByYAddr()
{
uint16_t abs = this->_bus->read(this->_registers.pac++);
abs += this->_bus->read(this->_registers.pac++) << 8u;
uint24_t effective = abs + (this->_registers.dbr << 16u);
return effective + this->_registers.y;
}
uint24_t CPU::_getAbsoluteLongIndexedByXAddr()
{
uint24_t lng = this->_bus->read(this->_registers.pac++);
lng += this->_bus->read(this->_registers.pac++) << 8u;
lng += this->_bus->read(this->_registers.pac++) << 16u;
return lng + this->_registers.x;
}
} }

View File

@@ -212,6 +212,12 @@ namespace ComSquare::CPU
uint24_t _getDirectIndexedByXAddr(); uint24_t _getDirectIndexedByXAddr();
//! @brief The DP address is added to Y to form the effective address. The effective address is always in bank 0. //! @brief The DP address is added to Y to form the effective address. The effective address is always in bank 0.
uint24_t _getDirectIndexedByYAddr(); uint24_t _getDirectIndexedByYAddr();
//! @brief The absolute expression is added with X and combined with DBR to form the effective address.
uint24_t _getAbsoluteIndexedByXAddr();
//! @brief The absolute expression is added with Y and combined with DBR to form the effective address.
uint24_t _getAbsoluteIndexedByYAddr();
//! @brief The effective address is formed by adding the <long exp> with X.
uint24_t _getAbsoluteLongIndexedByXAddr();
//! @brief Execute a single instruction. //! @brief Execute a single instruction.

View File

@@ -126,4 +126,40 @@ Test(AddrMode, DirectIndexedByY)
pair.second.cpu->_registers.pac = 0x808000; pair.second.cpu->_registers.pac = 0x808000;
cr_assert_eq(pair.second.cpu->_getDirectIndexedByYAddr(), 0x1012, "Returned address was %x but was expecting 0x1012.", pair.second.cpu->_getDirectIndexedByYAddr()); cr_assert_eq(pair.second.cpu->_getDirectIndexedByYAddr(), 0x1012, "Returned address was %x but was expecting 0x1012.", pair.second.cpu->_getDirectIndexedByYAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808001); cr_assert_eq(pair.second.cpu->_registers.pac, 0x808001);
}
Test(AddrMode, AbsoluteIndexByX)
{
auto pair = Init();
pair.second.cpu->_registers.pac = 0x808000;
pair.second.cartridge->_data[0] = 0x10;
pair.second.cartridge->_data[1] = 0xAC;
pair.second.cpu->_registers.dbr = 0xEF;
pair.second.cpu->_registers.x = 0x0005;
cr_assert_eq(pair.second.cpu->_getAbsoluteIndexedByXAddr(), 0xEFAC15, "Returned address was %x but was expecting 0xEFAC15.", pair.second.cpu->_getAbsoluteIndexedByXAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808002);
}
Test(AddrMode, AbsoluteIndexByY)
{
auto pair = Init();
pair.second.cpu->_registers.pac = 0x808000;
pair.second.cartridge->_data[0] = 0x10;
pair.second.cartridge->_data[1] = 0xAC;
pair.second.cpu->_registers.dbr = 0xEF;
pair.second.cpu->_registers.y = 0x0005;
cr_assert_eq(pair.second.cpu->_getAbsoluteIndexedByYAddr(), 0xEFAC15, "Returned address was %x but was expecting 0xEFAC15.", pair.second.cpu->_getAbsoluteIndexedByYAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808002);
}
Test(AddrMode, AbsoluteLongIndexByX)
{
auto pair = Init();
pair.second.cpu->_registers.pac = 0x808000;
pair.second.cartridge->_data[0] = 0x10;
pair.second.cartridge->_data[1] = 0xAC;
pair.second.cartridge->_data[2] = 0xEF;
pair.second.cpu->_registers.x = 0x0005;
cr_assert_eq(pair.second.cpu->_getAbsoluteLongIndexedByXAddr(), 0xEFAC15, "Returned address was %x but was expecting 0xEFAC15.", pair.second.cpu->_getAbsoluteLongIndexedByXAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808003);
} }