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Adding more addressing modes

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This commit is contained in:
AnonymusRaccoon
2020-02-11 11:21:12 +01:00
parent 02760c469d
commit fc08e503c8
3 changed files with 90 additions and 0 deletions
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sources/CPU/CPU.cpp
+33
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@@ -261,4 +261,37 @@ namespace ComSquare::CPU
base += this->_registers.dbr << 16u;
return base + this->_registers.y;
}
uint24_t CPU::_getDirectIndirectIndexedLongAddr()
{
uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
uint24_t base = this->_bus->read(dp);
base += this->_bus->read(dp + 1) << 8u;
base += this->_bus->read(dp + 2) << 16u;
return base;
}
uint24_t CPU::_getDirectIndexedIndirectAddr()
{
uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
dp += this->_registers.x;
uint24_t base = this->_bus->read(dp);
base += this->_bus->read(dp + 1) << 8u;
base += this->_registers.dbr << 16u;
return base;
}
uint24_t CPU::_getDirectIndexedByXAddr()
{
uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
dp += this->_registers.x;
return dp;
}
uint24_t CPU::_getDirectIndexedByYAddr()
{
uint16_t dp = this->_bus->read(this->_registers.pac++) + this->_registers.d;
dp += this->_registers.y;
return dp;
}
}
sources/CPU/CPU.hpp
+8
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@@ -204,6 +204,14 @@ namespace ComSquare::CPU
uint24_t _getAbsoluteLongAddr();
//! @brief The address is DBR:$(read($($Value + D)) + Y). (This functions returns the 24bit space address of the value).
uint24_t _getDirectIndirectIndexedAddr();
//! @brief This mode is like the previous addressing mode, but the difference is that rather than pulling 2 bytes from the DP address, it pulls 3 bytes to form the effective address.
uint24_t _getDirectIndirectIndexedLongAddr();
//! @brief The direct page address is calculated and added with x. 2 bytes from the dp address combined with DBR will form the effective address.
uint24_t _getDirectIndexedIndirectAddr();
//! @brief The DP address is added to X to form the effective address. The effective address is always in bank 0.
uint24_t _getDirectIndexedByXAddr();
//! @brief The DP address is added to Y to form the effective address. The effective address is always in bank 0.
uint24_t _getDirectIndexedByYAddr();
//! @brief Execute a single instruction.
tests/CPU/testAddressingMode.cpp
+49
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@@ -77,4 +77,53 @@ Test(AddrMode, DirectIndirectIndexed)
pair.second.cpu->_registers.d = 0x1000;
cr_assert_eq(pair.second.cpu->_getDirectIndirectIndexedAddr(), 0x804031, "Returned address was %x but was expecting 0x804031.", pair.second.cpu->_getDirectIndirectIndexedAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808001);
}
Test(AddrMode, DirectIndirectIndexedLong)
{
auto pair = Init();
pair.second.cpu->_registers.pac = 0x808000;
pair.second.cpu->_registers.d = 0x1000;
pair.second.cartridge->_data[0] = 0x10;
pair.second.wram->_data[0x1010] = 0x30;
pair.second.wram->_data[0x1011] = 0x40;
pair.second.wram->_data[0x1012] = 0x23;
cr_assert_eq(pair.second.cpu->_getDirectIndirectIndexedLongAddr(), 0x234030, "Returned address was %x but was expecting 0x234030.", pair.second.cpu->_getDirectIndirectIndexedLongAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808001);
}
Test(AddrMode, DirectIndexedIndirect)
{
auto pair = Init();
pair.second.cartridge->_data[0] = 0x10;
pair.second.cpu->_registers.d = 0x1000;
pair.second.cpu->_registers.x = 0x0002;
pair.second.wram->_data[0x1012] = 0x30;
pair.second.wram->_data[0x1013] = 0x40;
pair.second.cpu->_registers.dbr = 0x80;
pair.second.cpu->_registers.pac = 0x808000;
cr_assert_eq(pair.second.cpu->_getDirectIndexedIndirectAddr(), 0x804030, "Returned address was %x but was expecting 0x804030.", pair.second.cpu->_getDirectIndexedIndirectAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808001);
}
Test(AddrMode, DirectIndexedByX)
{
auto pair = Init();
pair.second.cartridge->_data[0] = 0x10;
pair.second.cpu->_registers.d = 0x1000;
pair.second.cpu->_registers.x = 0x0002;
pair.second.cpu->_registers.pac = 0x808000;
cr_assert_eq(pair.second.cpu->_getDirectIndexedByXAddr(), 0x1012, "Returned address was %x but was expecting 0x1012.", pair.second.cpu->_getDirectIndexedByXAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808001);
}
Test(AddrMode, DirectIndexedByY)
{
auto pair = Init();
pair.second.cartridge->_data[0] = 0x10;
pair.second.cpu->_registers.d = 0x1000;
pair.second.cpu->_registers.y = 0x0002;
pair.second.cpu->_registers.pac = 0x808000;
cr_assert_eq(pair.second.cpu->_getDirectIndexedByYAddr(), 0x1012, "Returned address was %x but was expecting 0x1012.", pair.second.cpu->_getDirectIndexedByYAddr());
cr_assert_eq(pair.second.cpu->_registers.pac, 0x808001);
}