zoriya/ComSquare
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147 Commits 8 Branches 0 Tags
3f45f99991c5ad9b907676173f344b67a251b55d
Commit Graph

19 Commits

Author SHA1 Message Date
AnonymusRaccoon
3f45f99991 Adding absolute addresses 2020-02-11 11:32:50 +01:00
AnonymusRaccoon
fc08e503c8 Adding more addressing modes 2020-02-11 11:21:12 +01:00
AnonymusRaccoon
02760c469d Solving bugs with the rectangle shadow 2020-02-11 10:57:35 +01:00
AnonymusRaccoon
04ea6f25d0 Implementing some addressing modes 2020-02-10 17:50:48 +01:00
AnonymusRaccoon
f516e7ec66 Adding more tests for the data bus 2020-02-10 17:09:12 +01:00
AnonymusRaccoon
a25daa18b6 Starting to test addressings modes 2020-02-10 14:47:25 +01:00
AnonymusRaccoon
bd681c49a1 Reworking the test for the CPU 2020-02-10 11:39:32 +01:00
AnonymusRaccoon
fc94563b41 Starting to implement addressing modes 2020-02-07 18:56:24 +01:00
AnonymusRaccoon
36d615ba64 Finishing the first opcode 2020-02-07 17:24:15 +01:00
AnonymusRaccoon
d86b09dbb6 Creating a common CPU class 2020-02-05 16:15:45 +01:00
AnonymusRaccoon
6429e9a284 Implementing a rectangle memory accesor for the Cartridge (for the LoRom) 2020-01-29 18:03:29 +01:00
AnonymusRaccoon
235f147109 Adding shadows 2020-01-28 17:29:41 +01:00
AnonymusRaccoon
87ecd6c23d Adding documentation and implementations for Ram, VRam, SRam 2020-01-28 14:04:53 +01:00
AnonymusRaccoon
8698642636 Adding implementations of read/write for the CPU's internal registers 2020-01-28 13:24:49 +01:00
AnonymusRaccoon
208d1b14d6 Adding internal registers for the CPU 2020-01-28 11:48:13 +01:00
AnonymusRaccoon
c1cfcf6881 Creating a doxyfile 2020-01-27 18:43:21 +01:00
AnonymusRaccoon
3b96a6f44d Creating a main and a cartridge reader 2020-01-27 18:18:12 +01:00
AnonymusRaccoon
9d7bb1b6a5 Finishing the CPU header 2020-01-27 14:14:50 +01:00
AnonymusRaccoon
b36fb69804 Finishing the registers for the CPU 2020-01-24 17:32:19 +01:00